net: sxgbe: add WOL(Wakeup-On-Lan)support for Samsung sxgbe

index 7937493..30adc81 100644
@@ -121,9 +121,18 @@ struct sxgbe_mtl_ops;
 #define RX_ENTRY_LPI_MODE	0x40
 #define RX_EXIT_LPI_MODE	0x80
 
+/* PMT mode bits */
+#define PMT_PWRDWN		BIT(0)
+#define PMT_MGPKT_EN		BIT(1)
+#define PMT_RWKPKT_EN		BIT(2)
+#define PMT_GUCAST_EN		BIT(9)
+
 /* EEE-LPI Interrupt status flag */
 #define LPI_INT_STATUS		BIT(5)
 
+/* PMT Interrupt status */
+#define PMT_INT_STATUS		BIT(4)
+
 /* EEE-LPI Default timer values */
 #define LPI_LINK_STATUS_TIMER	0x3E8
 #define LPI_MAC_WAIT_TIMER	0x00

@@ -225,6 +234,7 @@ struct sxgbe_extra_stats {
 	unsigned long rx_desc_access_err;
 	unsigned long rx_buffer_access_err;
 	unsigned long rx_data_transfer_err;
+	unsigned long pmt_irq_event_n;
 
 	/* EEE-LPI stats */
 	unsigned long tx_lpi_entry_n;

@@ -489,6 +499,11 @@ struct sxgbe_priv_data {
 	int eee_enabled;
 	int eee_active;
 	int tx_lpi_timer;
+
+	/* PM-WOL specific members */
+	int wolopts;
+	int wolenabled;
+	int wol_irq;
 };
 
 /* Function prototypes */

index 5885fd6..334d196 100644
@@ -78,12 +78,41 @@ static int sxgbe_core_host_irq_status(void __iomem *ioaddr,
 	if (unlikely(irq_status & LPI_INT_STATUS))
 		status |= sxgbe_get_lpi_status(ioaddr, irq_status);
 
+	if (unlikely(irq_status & PMT_INT_STATUS)) {
+		/* clear the PMT bits 5 and 6 by reading the PMT status reg */
+		readl(ioaddr + SXGBE_CORE_PMT_CTL_STATUS_REG);
+		x->pmt_irq_event_n++;
+	}
+
 	return status;
 }
 
 /* Set power management mode (e.g. magic frame) */
 static void sxgbe_core_pmt(void __iomem *ioaddr, unsigned long mode)
 {
+	unsigned int pmt = 0;
+
+	if (mode & WAKE_MAGIC) {
+		pr_debug("WOL Magic frame\n");
+		pmt |= PMT_MGPKT_EN;
+	}
+	if (mode & WAKE_UCAST) {
+		pr_debug("WOL on global unicast\n");
+		pmt |= PMT_GUCAST_EN;
+	}
+	if (mode & (WAKE_MCAST | WAKE_BCAST)) {
+		pr_debug("WOL on any other packet\n");
+		pmt |= PMT_RWKPKT_EN;
+	}
+
+	writel(pmt, ioaddr + SXGBE_CORE_PMT_CTL_STATUS_REG);
+
+	/* Enable power down bit if any of the requested mode is enabled */
+	if (pmt) {
+		writel(SXGBE_RX_ENABLE, ioaddr + SXGBE_CORE_RX_CONFIG_REG);
+		pmt |= PMT_PWRDWN;
+		writel(pmt, ioaddr + SXGBE_CORE_PMT_CTL_STATUS_REG);
+	}
 }
 
 /* Set/Get Unicast MAC addresses */

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index 7e4810c..b2f3f10 100644
@@ -97,6 +97,10 @@ struct sxgbe_mtl_ops {
 	void (*mtl_fup_enable)(void __iomem *ioaddr, int queue_num);
 
 	void (*mtl_fup_disable)(void __iomem *ioaddr, int queue_num);
+
+	int (*mtl_flush_txqueue)(void __iomem *ioaddr, int queue_num);
+
+	int (*mtl_readout_rxqueue)(void __iomem *ioaddr, int queue_num);
 };
 
 const struct sxgbe_mtl_ops *sxgbe_get_mtl_ops(void);

index b23ec57..482a6e4 100644
@@ -164,6 +164,10 @@ static int sxgbe_platform_probe(struct platform_device *pdev)
 	if (priv->lpi_irq == -ENXIO)
 		priv->lpi_irq = priv->dev->irq;
 
+	priv->wol_irq = irq_of_parse_and_map(dev->of_node, loop++);
+	if (priv->wol_irq == -ENXIO)
+		priv->wol_irq = priv->dev->irq;
+
 	platform_set_drvdata(pdev, priv->dev);
 
 	pr_debug("platform driver registration completed\n");

index 85a7b31..bd85923 100644
@@ -257,6 +257,9 @@
 #define SXGBE_MTL_SFMODE		BIT(1)
 #define SXGBE_MTL_FIFO_LSHIFT		16
 #define SXGBE_MTL_ENABLE_QUEUE		0x00000008
+#define SXGBE_MTL_TXQ_EMPTY_STAT	BIT(4)
+#define SXGBE_MTL_TXQ_WRITE_STAT	BIT(3)
+
 #define SXGBE_MTL_TXQ_UNDERFLOW_REG(qnum)			\
 	(SXGBE_MTL_TC_TXBASE_REG + (qnum * 0x80) + 0x04)
 #define SXGBE_MTL_TXQ_DEBUG_REG(qnum)				\