armv8: cache_v8: mmu setup have the wrong pte attribute

Hi all

I do some test on my board which have two armv8 CA53 core, and I found some region (1MB size) don't be correctly mapped by MMU. Through ds5 I can't find this region were mapped.
I did some deep debug and found add_map function in cache_v8.c files maybe have some wrong operation for Some region which size equal to 1MB. For 1MB size region need three level translation and the descriptor of level 3 is different with level 1 and level 2. Look like current add_map function can't handle this case.
Did someone hit this bug? By the way I use the 2017.05 version.

Any feedback would be appreciate.

Thanks,
Jay

hi

Who's the maintainer of arch/arm/cpu/armv8? Please take a look at this issue, thanks a lot.

Thanks,
Jay

-----Original Message-----
From: U-Boot [mailto:u-boot-bounces at lists.denx.de] On Behalf Of Cao Jie
Sent: Friday, June 23, 2017 4:36 PM
To: u-boot at lists.denx.de
Subject: [U-Boot] armv8: cache_v8: mmu setup have the wrong pte attribute

Hi all

I do some test on my board which have two armv8 CA53 core, and I found some region (1MB size) don't be correctly mapped by MMU. Through ds5 I can't find this region were mapped. I did some deep debug and found add_map function in cache_v8.c files maybe have some wrong operation for Some region which size equal to 1MB.
For 1MB size region need three level translation and the descriptor of level
3 is different with level 1 and level 2. Look like current add_map function can't handle this case.
Did someone hit this bug? By the way I use the 2017.05 version.

Any feedback would be appreciate.

Thanks,
Jay

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