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ARM: dts: correct the dw-mshc timing properties as per binding

PATCH New Alim Akhtar 4 participants 4 messages Jan 7, 2013 – Jan 10, 2013

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Alim Akhtar

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#0 lore raw

PATCH 1/1 ARM: dts: correct the dw-mshc timing properties as per binding

As per the current exynos-dw-mshc bindings, dw-mshc-sdr-timing and dw-mshc-ddr-timing properties are having only two cells, these properties are wrongly set for exynos5250 based cros5250 and smdk5250 platfroms. This patch corrects above timing propreties for above platfroms

---
 arch/arm/boot/dts/cros5250-common.dtsi    | 12 ++++++------
 arch/arm/boot/dts/exynos5250-smdk5250.dts |  8 ++++----
 2 files changed, 10 insertions(+), 10 deletions(-)
arch/arm/boot/dts/cros5250-common.dtsi +6 -6
index fddd174..46c0980 100644
@@ -96,8 +96,8 @@
 		fifo-depth = <0x80>;
 		card-detect-delay = <200>;
 		samsung,dw-mshc-ciu-div = <3>;
-		samsung,dw-mshc-sdr-timing = <2 3 3>;
-		samsung,dw-mshc-ddr-timing = <1 2 3>;
+		samsung,dw-mshc-sdr-timing = <2 3>;
+		samsung,dw-mshc-ddr-timing = <1 2>;
 
 		slot@0 {
 			reg = <0>;
@@ -120,8 +120,8 @@
 		fifo-depth = <0x80>;
 		card-detect-delay = <200>;
 		samsung,dw-mshc-ciu-div = <3>;
-		samsung,dw-mshc-sdr-timing = <2 3 3>;
-		samsung,dw-mshc-ddr-timing = <1 2 3>;
+		samsung,dw-mshc-sdr-timing = <2 3>;
+		samsung,dw-mshc-ddr-timing = <1 2>;
 
 		slot@0 {
 			reg = <0>;
@@ -141,8 +141,8 @@
 		fifo-depth = <0x80>;
 		card-detect-delay = <200>;
 		samsung,dw-mshc-ciu-div = <3>;
-		samsung,dw-mshc-sdr-timing = <2 3 3>;
-		samsung,dw-mshc-ddr-timing = <1 2 3>;
+		samsung,dw-mshc-sdr-timing = <2 3>;
+		samsung,dw-mshc-ddr-timing = <1 2>;
 
 		slot@0 {
 			reg = <0>;
arch/arm/boot/dts/exynos5250-smdk5250.dts +4 -4
index 942d576..e05b18f 100644
@@ -115,8 +115,8 @@
 		fifo-depth = <0x80>;
 		card-detect-delay = <200>;
 		samsung,dw-mshc-ciu-div = <3>;
-		samsung,dw-mshc-sdr-timing = <2 3 3>;
-		samsung,dw-mshc-ddr-timing = <1 2 3>;
+		samsung,dw-mshc-sdr-timing = <2 3>;
+		samsung,dw-mshc-ddr-timing = <1 2>;
 
 		slot@0 {
 			reg = <0>;
@@ -139,8 +139,8 @@
 		fifo-depth = <0x80>;
 		card-detect-delay = <200>;
 		samsung,dw-mshc-ciu-div = <3>;
-		samsung,dw-mshc-sdr-timing = <2 3 3>;
-		samsung,dw-mshc-ddr-timing = <1 2 3>;
+		samsung,dw-mshc-sdr-timing = <2 3>;
+		samsung,dw-mshc-ddr-timing = <1 2>;
 
 		slot@0 {
 			reg = <0>;
Signature · 1 line
1.8.0
#1 lore raw

PATCH 1/1 ARM: dts: correct the dw-mshc timing properties as per binding

Alim,

Quoted 4 lines · Alim Akhtar

As per the current exynos-dw-mshc bindings, dw-mshc-sdr-timing and dw-mshc-ddr-timing properties are having only two cells, these properties are wrongly set for exynos5250 based cros5250 and smdk5250 platfroms. This patch corrects above timing propreties for above platfroms

Thanks for catching this. Given that this just removes a number from the dts file that isn't read by the code, I don't expect any functional change and I don't see any.

I also double-checked usage and compared to the current Chrome OS tree. The third number (that you removed) is already correctly specified in the dts as "samsung,dw-mshc-ciu-div". :)

Quoted 1 line
#2 lore raw

PATCH 1/1 ARM: dts: correct the dw-mshc timing properties as per binding

Hi Doug,

Quoted 9 lines · Doug Anderson

Alim,

Quoted 4 lines · Alim Akhtar

As per the current exynos-dw-mshc bindings, dw-mshc-sdr-timing and dw-mshc-ddr-timing properties are having only two cells, these properties are wrongly set for exynos5250 based cros5250 and smdk5250 platfroms. This patch corrects above timing propreties for above platfroms

Quoted 7 lines

Thanks for catching this. Given that this just removes a number from the dts file that isn't read by the code, I don't expect any functional change and I don't see any.

I also double-checked usage and compared to the current Chrome OS tree. The third number (that you removed) is already correctly specified in the dts as "samsung,dw-mshc-ciu-div". :)

Yes, no functional changes as the removed number is passed using
dw-mshc-ciu-div property now as mentioned by you.

Quoted 7 lines
Quoted 4 lines

Thanks!!!

Quoted 5 lines

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