arch:omap[2/3]4xx.h macro-defines cleanup

PATCH In review Girish 2 participants 2 messages Nov 2, 2007 – Nov 17, 2007

Subsystems (4)

Arm (32-bit) Arm sub-architectures OMAP2+ support OMAP clock framework support

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Girish

author

2007-11-02 14:43 UTC #0 lore raw

PATCH 3/3 arch:omap[2/3]4xx.h macro-defines cleanup

This cleans up omap24xx.h macro defines. All the dependent files also been modified. We will see more such patches on omap34xx.h

Signed-off-by Girish S G <[email protected]>

---
 arch/arm/mach-omap2/clock34xx.h      |   12 ++++++------
 arch/arm/plat-omap/devices.c         |    4 ++--
 include/asm-arm/arch-omap/omap24xx.h |    9 +++++++--
 include/asm-arm/arch-omap/omap34xx.h |    8 ++++----
 4 files changed, 19 insertions(+), 14 deletions(-)

arch/arm/mach-omap2/clock34xx.h +6 -6

Index: linux-omap-git/arch/arm/mach-omap2/clock34xx.h
===================================================================
@@ -23,7 +23,7 @@
 /* CONTROL_DEVCONF0 bits */
 #define OMAP3430_MCBSP2_CLKS_MASK		    (1 << 6)
 #define OMAP3430_MCBSP1_CLKS_MASK		    (1 << 2)
-/* OMAP34XX_CONTROL_DEVCONF1 bits */
+/* OMAP2_CONTROL_DEVCONF1 bits */
 #define OMAP3430_MCBSP5_CLKS_MASK		    (1 << 4)
 #define OMAP3430_MCBSP4_CLKS_MASK		    (1 << 2)
 #define OMAP3430_MCBSP3_CLKS_MASK		    (1 << 0)

@@ -913,7 +913,7 @@
 	.init		= &omap2_init_clksel_parent,
 	.enable_reg	= OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
 	.enable_bit	= OMAP3430_EN_MCBSP5_SHIFT,
-	.clksel_reg	= (void __iomem *)IO_ADDRESS(OMAP34XX_CONTROL_DEVCONF1),
+	.clksel_reg	= (void __iomem *)IO_ADDRESS(OMAP2_CONTROL_DEVCONF1),
 	.clksel_mask	= OMAP3430_MCBSP5_CLKS_MASK,
 	.clksel		= mcbsp_15_clksel,
 	.flags		= CLOCK_IN_OMAP343X,

@@ -925,7 +925,7 @@
 	.init		= &omap2_init_clksel_parent,
 	.enable_reg	= OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
 	.enable_bit	= OMAP3430_EN_MCBSP1_SHIFT,
-	.clksel_reg	= (void __iomem *)IO_ADDRESS(OMAP34XX_CONTROL_DEVCONF0),
+	.clksel_reg	= (void __iomem *)IO_ADDRESS(OMAP2_CONTROL_DEVCONF0),
 	.clksel_mask	= OMAP3430_MCBSP1_CLKS_MASK,
 	.clksel		= mcbsp_15_clksel,
 	.flags		= CLOCK_IN_OMAP343X,

@@ -1970,7 +1970,7 @@
 	.init		= &omap2_init_clksel_parent,
 	.enable_reg	= OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
 	.enable_bit	= OMAP3430_EN_MCBSP2_SHIFT,
-	.clksel_reg	= (void __iomem *)IO_ADDRESS(OMAP34XX_CONTROL_DEVCONF0),
+	.clksel_reg	= (void __iomem *)IO_ADDRESS(OMAP2_CONTROL_DEVCONF0),
 	.clksel_mask	= OMAP3430_MCBSP2_CLKS_MASK,
 	.clksel		= mcbsp_234_clksel,
 	.flags		= CLOCK_IN_OMAP343X,

@@ -1982,7 +1982,7 @@
 	.init		= &omap2_init_clksel_parent,
 	.enable_reg	= OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
 	.enable_bit	= OMAP3430_EN_MCBSP3_SHIFT,
-	.clksel_reg	= (void __iomem *)IO_ADDRESS(OMAP34XX_CONTROL_DEVCONF1),
+	.clksel_reg	= (void __iomem *)IO_ADDRESS(OMAP2_CONTROL_DEVCONF1),
 	.clksel_mask	= OMAP3430_MCBSP3_CLKS_MASK,
 	.clksel		= mcbsp_234_clksel,
 	.flags		= CLOCK_IN_OMAP343X,

@@ -1994,7 +1994,7 @@
 	.init		= &omap2_init_clksel_parent,
 	.enable_reg	= OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
 	.enable_bit	= OMAP3430_EN_MCBSP4_SHIFT,
-	.clksel_reg	= (void __iomem *)IO_ADDRESS(OMAP34XX_CONTROL_DEVCONF1),
+	.clksel_reg	= (void __iomem *)IO_ADDRESS(OMAP2_CONTROL_DEVCONF1),
 	.clksel_mask	= OMAP3430_MCBSP4_CLKS_MASK,
 	.clksel		= mcbsp_234_clksel,
 	.flags		= CLOCK_IN_OMAP343X,

arch/arm/plat-omap/devices.c +2 -2

Index: linux-omap-git/arch/arm/plat-omap/devices.c
===================================================================
@@ -345,9 +345,9 @@
 			 * Module Input Clock selection
 			 */
 			if (cpu_is_omap24xx()) {
-				u32 v = omap_readl(OMAP2_CONTROL_DEVCONF);
+				u32 v = omap_readl(OMAP2_CONTROL_DEVCONF0);
 				v |= (1 << 24);
-				omap_writel(v, OMAP2_CONTROL_DEVCONF);
+				omap_writel(v, OMAP2_CONTROL_DEVCONF0);
 			}
 		}
 		mmc1_conf = *mmc;

include/asm-arm/arch-omap/omap24xx.h +7 -2

Index: linux-omap-git/include/asm-arm/arch-omap/omap24xx.h
===================================================================
@@ -99,16 +99,21 @@
 #define OMAP2_SMS_BASE		OMAP243X_SMS_BASE
 #define OMAP2_L4_BASE		L4_24XX_BASE
 #define OMAP2_VA_IC_BASE	IO_ADDRESS(OMAP24XX_IC_BASE)
-#define OMAP2_CTRL_BASE		OMAP243X_CTRL_BASE
+#define OMAP2_CTRL_BASE 	OMAP243X_CTRL_BASE
+#define OMAP2_CONTROL_PBIAS_1	L4_WK_243X_BASE + 0x24A0
 
 #endif
 
+#if defined(CONFIG_ARCH_OMAP24XX)
+
 /* Control module */
 #define OMAP2_CONTROL_DEVCONF0	(OMAP2_CTRL_BASE + 0x274)
 #define OMAP2_CONTROL_DEVCONF1	(OMAP2_CTRL_BASE + 0x2e8)
-#define OMAP2_CONTROL_DEVCONF   OMAP2_CONTROL_DEVCONF0
 
 #define OMAP2_CONTROL_STATUS	(OMAP2_CTRL_BASE + 0x2f8)
+#define OMAP2_HDQ_BASE		(OMAP2_L4_BASE + 0xb2000)
+
+#endif
 
 #endif /* __ASM_ARCH_OMAP24XX_H */

include/asm-arm/arch-omap/omap34xx.h +4 -4

Index: linux-omap-git/include/asm-arm/arch-omap/omap34xx.h
===================================================================
@@ -53,7 +53,7 @@
 #define IRQ_SIR_IRQ		0x0040
 
 
-#if defined(CONFIG_ARCH_OMAP3430)
+#if defined(CONFIG_ARCH_OMAP34XX)
 
 /*
  * REVISIT: OMAP3430 has two CONTROL_DEVCONF registers, CONTROL_DEVCONF0

@@ -68,9 +68,9 @@
 #define OMAP2_SMS_BASE			OMAP343X_SMS_BASE
 #define OMAP2_L4_BASE			L4_34XX_BASE
 #define OMAP2_VA_IC_BASE		IO_ADDRESS(OMAP34XX_IC_BASE)
-#define OMAP2_CTRL_BASE			OMAP3430_CTRL_BASE
-#define OMAP34XX_CONTROL_DEVCONF0	(L4_34XX_BASE + 0x2274)
-#define OMAP34XX_CONTROL_DEVCONF1	(L4_34XX_BASE + 0x22D8)
+#define OMAP2_CTRL_BASE 		OMAP3430_CTRL_BASE
+#define OMAP2_CONTROL_DEVCONF0		(L4_34XX_BASE + 0x2274)
+#define OMAP2_CONTROL_DEVCONF1		(L4_34XX_BASE + 0x22D8)
 #define OMAP2_CONTROL_STATUS		(OMAP2_CTRL_BASE + 0x2f0)
 
 #endif

Tony Lindgren

maintainer

2007-11-17 00:07 UTC #1 lore raw

Quoted 2 lines · Girish

This cleans up omap24xx.h macro defines. All the dependent files also been modified. We will see more such patches on omap34xx.h

This should not be needed any longer after we apply Paul's "Runtime constants" patch 4/4 posted today.

Tony