drm/i915: Export total subslice and EU counts
Subsystems (3)
PATCH 1/1 drm/i915: Export total subslice and EU counts
From: Jeff McGee <[email protected]>
Setup new I915_GETPARAM ioctl entries for subslice total and EU total. Userspace drivers need these values when constructing GPGPU commands. This kernel query method is intended to replace the PCI ID-based tables that userspace drivers currently maintain. The kernel driver can employ fuse register reads as needed to ensure the most accurate determination of GT config attributes. This first became important with Cherryview in which the config could differ between devices with the same PCI ID.
The kernel detection of these values is device-specific and not included in this patch. Because zero is not a valid value for any of these parameters, a value of zero is interpreted as unknown for the device. Userspace drivers should continue to maintain ID-based tables for older devices not supported by the new query method.
For: VIZ-4636
--- drivers/gpu/drm/i915/i915_dma.c | 10 ++++++++++ include/uapi/drm/i915_drm.h | 2 ++ 2 files changed, 12 insertions(+)
drivers/gpu/drm/i915/i915_dma.c +10 -0
@@ -150,6 +150,16 @@ static int i915_getparam(struct drm_device *dev, void *data,case I915_PARAM_MMAP_VERSION : value =1 ;break ; +case I915_PARAM_SUBSLICE_TOTAL : + value =INTEL_INFO (dev)->subslice_total; +if (!value) +return -ENODEV ; +break ; +case I915_PARAM_EU_TOTAL : + value =INTEL_INFO (dev)->eu_total; +if (!value) +return -ENODEV ; +break ;default :DRM_DEBUG ("Unknown parameter %d\n" , param->param);return -EINVAL ;
include/uapi/drm/i915_drm.h +2 -0
@@ -347,6 +347,8 @@ typedef struct drm_i915_irq_wait {#define I915_PARAM_HAS_COHERENT_PHYS_GTT 29#define I915_PARAM_MMAP_VERSION 30#define I915_PARAM_HAS_BSD2 31 +#define I915_PARAM_SUBSLICE_TOTAL 32 +#define I915_PARAM_EU_TOTAL 33 typedef struct drm_i915_getparam { int param;
Signature · 6 lines
2.3.0 _______________________________________________ dri-devel mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/dri-devel
Quoted 11 lines · On Mon, Mar 02, 2015 at 03:37:32PM -0800, [email protected] wrote:
From: Jeff McGee <[email protected]>
Setup new
I915_GETPARAMioctl entries for subslice total and EU total. Userspace drivers need these values when constructing GPGPU commands. This kernel query method is intended to replace the PCI ID-based tables that userspace drivers currently maintain. The kernel driver can employ fuse register reads as needed to ensure the most accurate determination of GT config attributes. This first became important with Cherryview in which the config could differ between devices with the same PCI ID.
Quoted 6 lines
The kernel detection of these values is device-specific and not included in this patch. Because zero is not a valid value for any of these parameters, a value of zero is interpreted as unknown for the device. Userspace drivers should continue to maintain ID-based tables for older devices not supported by the new query method.
We already have total EU detection support for Cherryview but we need to add detection of total subslice. That support is included in the below-linked series which has been reviewed but not yet merged.
http://lists.freedesktop.org/archives/intel-gfx/2015-February/060945.html
Jeff
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Quoted 31 lines · On Mon, Mar 02, 2015 at 03:37:32PM -0800, [email protected] wrote:
From: Jeff McGee <[email protected]>
Setup new
I915_GETPARAMioctl entries for subslice total and EU total. Userspace drivers need these values when constructing GPGPU commands. This kernel query method is intended to replace the PCI ID-based tables that userspace drivers currently maintain. The kernel driver can employ fuse register reads as needed to ensure the most accurate determination of GT config attributes. This first became important with Cherryview in which the config could differ between devices with the same PCI ID.The kernel detection of these values is device-specific and not included in this patch. Because zero is not a valid value for any of these parameters, a value of zero is interpreted as unknown for the device. Userspace drivers should continue to maintain ID-based tables for older devices not supported by the new query method.
For: VIZ-4636
Signed-off-by Jeff McGee <[email protected]>--- drivers/gpu/drm/i915/i915_dma.c | 10 ++++++++++ include/uapi/drm/i915_drm.h | 2 ++ 2 files changed, 12 insertions(+)drivers/gpu/drm/i915/i915_dma.c +0
-0@@ -150,6 +150,16 @@ static int i915_getparam(struct drm_device *dev, void *data,case I915_PARAM_MMAP_VERSION : value =1 ;
drivers/gpu/drm/i915/i915_dma.c static int i915_getparam(struct drm_device *dev, void *data, · line 161
Quoted 10 lines
drivers/gpu/drm/i915/i915_dma.c +9
-0break ; +case I915_PARAM_SUBSLICE_TOTAL : + value =INTEL_INFO (dev)->subslice_total; +if (!value) +return -ENODEV ; +break ; +case I915_PARAM_EU_TOTAL : + value =INTEL_INFO (dev)->eu_total; +if (!value) +return -ENODEV ;
I need the corresponding userspace support before I can merged this.
Thanks, Daniel
Quoted 24 lines
drivers/gpu/drm/i915/i915_dma.c +1
-0+break ;default :DRM_DEBUG ("Unknown parameter %d\n" , param->param);return -EINVAL ;include/uapi/drm/i915_drm.h +2
-0@@ -347,6 +347,8 @@ typedef struct drm_i915_irq_wait {#define I915_PARAM_HAS_COHERENT_PHYS_GTT 29#define I915_PARAM_MMAP_VERSION 30#define I915_PARAM_HAS_BSD2 31 +#define I915_PARAM_SUBSLICE_TOTAL 32 +#define I915_PARAM_EU_TOTAL 33 typedef struct drm_i915_getparam { int param;Signature · 6 lines
2.3.0 _______________________________________________ dri-devel mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/dri-devel
Signature · 7 lines
Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ dri-devel mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/dri-devel
Quoted 36 lines · Daniel Vetter
Quoted 35 lines · On Mon, Mar 02, 2015 at 03:37:32PM -0800, [email protected] wrote:
From: Jeff McGee <[email protected]>
Setup new
I915_GETPARAMioctl entries for subslice total and EU total. Userspace drivers need these values when constructing GPGPU commands. This kernel query method is intended to replace the PCI ID-based tables that userspace drivers currently maintain. The kernel driver can employ fuse register reads as needed to ensure the most accurate determination of GT config attributes. This first became important with Cherryview in which the config could differ between devices with the same PCI ID.The kernel detection of these values is device-specific and not included in this patch. Because zero is not a valid value for any of these parameters, a value of zero is interpreted as unknown for the device. Userspace drivers should continue to maintain ID-based tables for older devices not supported by the new query method.
For: VIZ-4636
Signed-off-by Jeff McGee <[email protected]>--- drivers/gpu/drm/i915/i915_dma.c | 10 ++++++++++ include/uapi/drm/i915_drm.h | 2 ++ 2 files changed, 12 insertions(+)drivers/gpu/drm/i915/i915_dma.c +3
-0@@ -150,6 +150,16 @@ static int i915_getparam(struct drm_device *dev, void *data,case I915_PARAM_MMAP_VERSION : value =1 ;break ; +case I915_PARAM_SUBSLICE_TOTAL : + value =INTEL_INFO (dev)->subslice_total; +if (!value)
Quoted 8 lines
drivers/gpu/drm/i915/i915_dma.c static int i915_getparam(struct drm_device *dev, void *data, · line 161
Quoted 6 lines
drivers/gpu/drm/i915/i915_dma.c +6
-0+return -ENODEV ; +break ; +case I915_PARAM_EU_TOTAL : + value =INTEL_INFO (dev)->eu_total; +if (!value) +return -ENODEV ;I need the corresponding userspace support before I can merged this.
Strike that, I've missed the beignet support. As soon as beignet maintainers have that reviewed I can pull this in. -Daniel
Signature · 7 lines
Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Task id: 5874 -------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV -4 278/278 274/278
ILK 308/308 308/308 SNB 284/284 284/284 IVB 380/380 380/380 BYT 294/294 294/294 HSW 387/387 387/387 BDW -1 316/316 315/316 -------------------------------------Detailed------------------------------------- Platform Test drm-intel-nightly Series Applied PNV igt_gem_userptr_blits_coherency-sync NO_RESULT(1)CRASH(5)NRUN(1)PASS(7) CRASH(1)PASS(1) PNV igt_gem_userptr_blits_coherency-unsync NO_RESULT(1)CRASH(4)PASS(6) CRASH(2) PNV igt_gen3_render_mixed_blits FAIL(6)PASS(9) FAIL(2) PNV igt_gem_fence_thrash_bo-write-verify-threaded-none FAIL(2)CRASH(4)PASS(4) CRASH(1)PASS(1) *BDW igt_gem_gtt_hog PASS(18) DMESG_WARN(1)PASS(1)
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There is one minor conflict when apply the KMD patch to latest drm-intel-nightly branch. It should be easy to fix.
Another issue is that IMO, we should bump libdrm's version number when increase these new APIs. Then in Beignet, we can check the libdrm version at build time and determine whether we will use these new interfaces. Thus, we can avoid breaking beignet on those systems which have previous libdrm/kernel installed.
The other parts of the whole patchset,
including patches for KMD/libdrm/Intel gpu tools and Beignet, all look good to me.
And I just tested it on BDW and SKL platforms, it works fine.
Thanks,
Zhigang Gong.
Quoted 65 lines · On Mon, Mar 02, 2015 at 03:37:32PM -0800, [email protected] wrote:
From: Jeff McGee <[email protected]>
Setup new
I915_GETPARAMioctl entries for subslice total and EU total. Userspace drivers need these values when constructing GPGPU commands. This kernel query method is intended to replace the PCI ID-based tables that userspace drivers currently maintain. The kernel driver can employ fuse register reads as needed to ensure the most accurate determination of GT config attributes. This first became important with Cherryview in which the config could differ between devices with the same PCI ID.The kernel detection of these values is device-specific and not included in this patch. Because zero is not a valid value for any of these parameters, a value of zero is interpreted as unknown for the device. Userspace drivers should continue to maintain ID-based tables for older devices not supported by the new query method.
For: VIZ-4636
Signed-off-by Jeff McGee <[email protected]>--- drivers/gpu/drm/i915/i915_dma.c | 10 ++++++++++ include/uapi/drm/i915_drm.h | 2 ++ 2 files changed, 12 insertions(+)drivers/gpu/drm/i915/i915_dma.c +10
-0@@ -150,6 +150,16 @@ static int i915_getparam(struct drm_device *dev, void *data,case I915_PARAM_MMAP_VERSION : value =1 ;break ; +case I915_PARAM_SUBSLICE_TOTAL : + value =INTEL_INFO (dev)->subslice_total; +if (!value) +return -ENODEV ; +break ; +case I915_PARAM_EU_TOTAL : + value =INTEL_INFO (dev)->eu_total; +if (!value) +return -ENODEV ; +break ;default :DRM_DEBUG ("Unknown parameter %d\n" , param->param);return -EINVAL ;include/uapi/drm/i915_drm.h +2
-0@@ -347,6 +347,8 @@ typedef struct drm_i915_irq_wait {#define I915_PARAM_HAS_COHERENT_PHYS_GTT 29#define I915_PARAM_MMAP_VERSION 30#define I915_PARAM_HAS_BSD2 31 +#define I915_PARAM_SUBSLICE_TOTAL 32 +#define I915_PARAM_EU_TOTAL 33 typedef struct drm_i915_getparam { int param;Signature · 6 lines
2.3.0 _______________________________________________ Beignet mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/beignet
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Quoted 9 lines · Zhigang Gong
There is one minor conflict when apply the KMD patch to latest drm-intel-nightly branch. It should be easy to fix.
Another issue is that IMO, we should bump libdrm's version number when increase these new APIs. Then in Beignet, we can check the libdrm version at build time and determine whether we will use these new interfaces. Thus, we can avoid breaking beignet on those systems which have previous libdrm/kernel installed.
Right. I can append a libdrm patch to bump the version. And then I suppose I will follow the process to make a new release. Not sure right now how that works. First time going through it.
Also, how should we test for the libdrm version and conditionally use the API? Is there a previous example of this in Beignet that I could follow?
Jeff
Quoted 71 lines
The other parts of the whole patchset,
including patches for KMD/libdrm/Intel gpu tools and Beignet, all look good to me.And I just tested it on BDW and SKL platforms, it works fine.
Thanks,
Zhigang Gong.Quoted 61 lines · On Mon, Mar 02, 2015 at 03:37:32PM -0800, [email protected] wrote:
From: Jeff McGee <[email protected]>
Setup new
I915_GETPARAMioctl entries for subslice total and EU total. Userspace drivers need these values when constructing GPGPU commands. This kernel query method is intended to replace the PCI ID-based tables that userspace drivers currently maintain. The kernel driver can employ fuse register reads as needed to ensure the most accurate determination of GT config attributes. This first became important with Cherryview in which the config could differ between devices with the same PCI ID.The kernel detection of these values is device-specific and not included in this patch. Because zero is not a valid value for any of these parameters, a value of zero is interpreted as unknown for the device. Userspace drivers should continue to maintain ID-based tables for older devices not supported by the new query method.
For: VIZ-4636
Signed-off-by Jeff McGee <[email protected]>--- drivers/gpu/drm/i915/i915_dma.c | 10 ++++++++++ include/uapi/drm/i915_drm.h | 2 ++ 2 files changed, 12 insertions(+)drivers/gpu/drm/i915/i915_dma.c +10
-0@@ -150,6 +150,16 @@ static int i915_getparam(struct drm_device *dev, void *data,case I915_PARAM_MMAP_VERSION : value =1 ;break ; +case I915_PARAM_SUBSLICE_TOTAL : + value =INTEL_INFO (dev)->subslice_total; +if (!value) +return -ENODEV ; +break ; +case I915_PARAM_EU_TOTAL : + value =INTEL_INFO (dev)->eu_total; +if (!value) +return -ENODEV ; +break ;default :DRM_DEBUG ("Unknown parameter %d\n" , param->param);return -EINVAL ;include/uapi/drm/i915_drm.h +2
-0@@ -347,6 +347,8 @@ typedef struct drm_i915_irq_wait {#define I915_PARAM_HAS_COHERENT_PHYS_GTT 29#define I915_PARAM_MMAP_VERSION 30#define I915_PARAM_HAS_BSD2 31 +#define I915_PARAM_SUBSLICE_TOTAL 32 +#define I915_PARAM_EU_TOTAL 33 typedef struct drm_i915_getparam { int param;Signature · 1 line
2.3.0
Quoted 8 lines
Quoted 4 lines
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Quoted 19 lines
-----Original Message-----
From: Beignet [mailto:[email protected]] On Behalf Of Jeff McGee
Sent: Saturday, March 7, 2015 2:44 AM
To: Zhigang Gong
Cc: [email protected]; [email protected]; [email protected]; [email protected]
Subject: Re: [Beignet] [PATCH] drm/i915: Export total subslice and EU countsQuoted 9 lines · Zhigang Gong
There is one minor conflict when apply the KMD patch to latest drm-intel-nightly branch. It should be easy to fix.
Another issue is that IMO, we should bump libdrm's version number when increase these new APIs. Then in Beignet, we can check the libdrm version at build time and determine whether we will use these new interfaces. Thus, we can avoid breaking beignet on those systems which have previous libdrm/kernel installed.
Quoted 5 lines
Right. I can append a libdrm patch to bump the version. And then I suppose I will follow the process to make a new release. Not sure right now how that works. First time going through it.
Also, how should we test for the libdrm version and conditionally use the API?
We can check the libdrm version at configuration time and define a macro to indicate whether we can use these new APIs in beignet.
Quoted 1 line
Is there a previous example of this in Beignet that I could follow?
Yes, one example is userptr. You can check the usage of DRM_INTEL_USERPTR and HAS_USERPTR In beignet.
Thanks,
Zhigang Gong.
Quoted 82 lines
Jeff
Quoted 33 lines
The other parts of the whole patchset, including patches for KMD/libdrm/Intel gpu tools and Beignet, all look good to me.
And I just tested it on BDW and SKL platforms, it works fine.
Thanks,
Zhigang Gong.Quoted 24 lines · On Mon, Mar 02, 2015 at 03:37:32PM -0800, [email protected] wrote:
From: Jeff McGee <[email protected]>
Setup new
I915_GETPARAMioctl entries for subslice total and EU total. Userspace drivers need these values when constructing GPGPU commands. This kernel query method is intended to replace the PCI ID-based tables that userspace drivers currently maintain. The kernel driver can employ fuse register reads as needed to ensure the most accurate determination of GT config attributes. This first became important with Cherryview in which the config could differ between devices with the same PCI ID.The kernel detection of these values is device-specific and not included in this patch. Because zero is not a valid value for any of these parameters, a value of zero is interpreted as unknown for the device. Userspace drivers should continue to maintain ID-based tables for older devices not supported by the new query method.
For: VIZ-4636
Signed-off-by Jeff McGee <[email protected]>--- drivers/gpu/drm/i915/i915_dma.c | 10 ++++++++++ include/uapi/drm/i915_drm.h | 2 ++ 2 files changed, 12 insertions(+)Quoted 5 lines
drivers/gpu/drm/i915/i915_dma.c static int i915_getparam(struct drm_device *dev,
Quoted 5 lines
(quoted diff) +0
-0
b/drivers/gpu/drm/i915/i915_dma.cindex 053e178..9350ea2 100644drivers/gpu/drm/i915/i915_dma.c +0
-0@@ -150,6 +150,16 @@ static int i915_getparam(struct drm_device *dev,void *data,
Quoted 32 lines
Quoted 32 lines
drivers/gpu/drm/i915/i915_dma.c +10
-0case I915_PARAM_MMAP_VERSION : value =1 ;break ; +case I915_PARAM_SUBSLICE_TOTAL : + value =INTEL_INFO (dev)->subslice_total; +if (!value) +return -ENODEV ; +break ; +case I915_PARAM_EU_TOTAL : + value =INTEL_INFO (dev)->eu_total; +if (!value) +return -ENODEV ; +break ;default :DRM_DEBUG ("Unknown parameter %d\n" , param->param);return -EINVAL ;(quoted diff) +0
-0
b/include/uapi/drm/i915_drm.hindex 6eed16b..8672efc 100644include/uapi/drm/i915_drm.h +0
-0@@ -347,6 +347,8 @@ typedef struct drm_i915_irq_wait { #define
I915_PARAM_HAS_COHERENT_PHYS_GTT29
#defineI915_PARAM_MMAP_VERSION30
#defineI915_PARAM_HAS_BSD231include/uapi/drm/i915_drm.h +2
-1+#define I915_PARAM_SUBSLICE_TOTAL 32 +#define I915_PARAM_EU_TOTAL 33 typedef struct drm_i915_getparam { int param; --2.3.0
Quoted 8 lines
Quoted 4 lines
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Quoted 4 lines
_______________________________________________
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Quoted 23 lines · Zhigang Gong
Quoted 23 lines
-----Original Message-----
From: Beignet [mailto:[email protected]] On Behalf Of Jeff McGee
Sent: Saturday, March 7, 2015 2:44 AM
To: Zhigang Gong
Cc: [email protected]; [email protected]; [email protected]; [email protected]
Subject: Re: [Beignet] [PATCH] drm/i915: Export total subslice and EU countsQuoted 9 lines · Zhigang Gong
There is one minor conflict when apply the KMD patch to latest drm-intel-nightly branch. It should be easy to fix.
Another issue is that IMO, we should bump libdrm's version number when increase these new APIs. Then in Beignet, we can check the libdrm version at build time and determine whether we will use these new interfaces. Thus, we can avoid breaking beignet on those systems which have previous libdrm/kernel installed.
Right. I can append a libdrm patch to bump the version. And then I suppose I will follow the process to make a new release. Not sure right now how that works. First time going through it.
Quoted 6 lines
Quoted 1 line
Also, how should we test for the libdrm version and conditionally use the API?
We can check the libdrm version at configuration time and define a macro to indicate whether we can use these new APIs in beignet.
Quoted 1 line
Is there a previous example of this in Beignet that I could follow?
Yes, one example is userptr. You can check the usage of
DRM_INTEL_USERPTRandHAS_USERPTRIn beignet.
Ok, applied the kernel patch. Please go ahead with libdrm&beignet parts.
Thanks, Daniel
Signature · 7 lines
Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Quoted 9 lines · Zhigang Gong
There is one minor conflict when apply the KMD patch to latest drm-intel-nightly branch. It should be easy to fix.
Another issue is that IMO, we should bump libdrm's version number when increase these new APIs. Then in Beignet, we can check the libdrm version at build time and determine whether we will use these new interfaces. Thus, we can avoid breaking beignet on those systems which have previous libdrm/kernel installed.
Quoted 6 lines
The other parts of the whole patchset,
including patches for KMD/libdrm/Intel gpu tools and Beignet, all look good to me.And I just tested it on BDW and SKL platforms, it works fine.
Can you add your Reviewed-by tag to at least the Beignet patches? I think Daniel wants to see that before moving forward with the rest. Thanks
Jeff
Quoted 65 lines
Thanks,
Zhigang Gong.Quoted 61 lines · On Mon, Mar 02, 2015 at 03:37:32PM -0800, [email protected] wrote:
From: Jeff McGee <[email protected]>
Setup new
I915_GETPARAMioctl entries for subslice total and EU total. Userspace drivers need these values when constructing GPGPU commands. This kernel query method is intended to replace the PCI ID-based tables that userspace drivers currently maintain. The kernel driver can employ fuse register reads as needed to ensure the most accurate determination of GT config attributes. This first became important with Cherryview in which the config could differ between devices with the same PCI ID.The kernel detection of these values is device-specific and not included in this patch. Because zero is not a valid value for any of these parameters, a value of zero is interpreted as unknown for the device. Userspace drivers should continue to maintain ID-based tables for older devices not supported by the new query method.
For: VIZ-4636
Signed-off-by Jeff McGee <[email protected]>--- drivers/gpu/drm/i915/i915_dma.c | 10 ++++++++++ include/uapi/drm/i915_drm.h | 2 ++ 2 files changed, 12 insertions(+)drivers/gpu/drm/i915/i915_dma.c +10
-0@@ -150,6 +150,16 @@ static int i915_getparam(struct drm_device *dev, void *data,case I915_PARAM_MMAP_VERSION : value =1 ;break ; +case I915_PARAM_SUBSLICE_TOTAL : + value =INTEL_INFO (dev)->subslice_total; +if (!value) +return -ENODEV ; +break ; +case I915_PARAM_EU_TOTAL : + value =INTEL_INFO (dev)->eu_total; +if (!value) +return -ENODEV ; +break ;default :DRM_DEBUG ("Unknown parameter %d\n" , param->param);return -EINVAL ;include/uapi/drm/i915_drm.h +2
-0@@ -347,6 +347,8 @@ typedef struct drm_i915_irq_wait {#define I915_PARAM_HAS_COHERENT_PHYS_GTT 29#define I915_PARAM_MMAP_VERSION 30#define I915_PARAM_HAS_BSD2 31 +#define I915_PARAM_SUBSLICE_TOTAL 32 +#define I915_PARAM_EU_TOTAL 33 typedef struct drm_i915_getparam { int param;Signature · 1 line
2.3.0
Quoted 8 lines
Quoted 4 lines
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PATCH v2 1/1 drm/i915: Export total subslice and EU counts
In reply to [email protected]From: Jeff McGee <[email protected]>
Setup new I915_GETPARAM ioctl entries for subslice total and EU total. Userspace drivers need these values when constructing GPGPU commands. This kernel query method is intended to replace the PCI ID-based tables that userspace drivers currently maintain. The kernel driver can employ fuse register reads as needed to ensure the most accurate determination of GT config attributes. This first became important with Cherryview in which the config could differ between devices with the same PCI ID.
The kernel detection of these values is device-specific and not included in this patch. Because zero is not a valid value for any of these parameters, a value of zero is interpreted as unknown for the device. Userspace drivers should continue to maintain ID-based tables for older devices not supported by the new query method.
v2: Increment our I915_GETPARAM indices to fit after REVISION
which was merged ahead of us.
For: VIZ-4636
--- drivers/gpu/drm/i915/i915_dma.c | 10 ++++++++++ include/uapi/drm/i915_drm.h | 2 ++ 2 files changed, 12 insertions(+)
drivers/gpu/drm/i915/i915_dma.c +10 -0
@@ -153,6 +153,16 @@ static int i915_getparam(struct drm_device *dev, void *data,case I915_PARAM_MMAP_VERSION : value =1 ;break ; +case I915_PARAM_SUBSLICE_TOTAL : + value =INTEL_INFO (dev)->subslice_total; +if (!value) +return -ENODEV ; +break ; +case I915_PARAM_EU_TOTAL : + value =INTEL_INFO (dev)->eu_total; +if (!value) +return -ENODEV ; +break ;default :DRM_DEBUG ("Unknown parameter %d\n" , param->param);return -EINVAL ;
include/uapi/drm/i915_drm.h +2 -0
@@ -348,6 +348,8 @@ typedef struct drm_i915_irq_wait {#define I915_PARAM_MMAP_VERSION 30#define I915_PARAM_HAS_BSD2 31#define I915_PARAM_REVISION 32 +#define I915_PARAM_SUBSLICE_TOTAL 33 +#define I915_PARAM_EU_TOTAL 34 typedef struct drm_i915_getparam { int param;
Signature · 6 lines
2.3.0 _______________________________________________ Beignet mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/beignet
Task id: 5922 -------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 282/282 282/282 ILK 308/308 308/308 SNB 307/307 307/307 IVB 375/375 375/375 BYT 294/294 294/294 HSW 385/385 385/385 BDW 315/315 315/315
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
Note: You need to pay more attention to line start with '*'
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