ARM: dts: exynos4: fix pwm-cells in pwm node

PATCH New Jaewon Kim 3 participants 3 messages Jun 19, 2014 – Jun 23, 2014

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Device tree bindings Arm Samsung Exynos

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Jaewon Kim

author

2014-06-19 02:03 UTC #0 lore raw

PATCH v2 1/1 ARM: dts: exynos4: fix pwm-cells in pwm node

pwm-cells should be 3. Third cell is optional PWM flags. And This flag supported by this binding is PWM_POLARITY_INVERTED.

Signed-off-by Jaewon Kim <[email protected]>

---

Changes in v2:
- Remove unnecessary handle.

 arch/arm/boot/dts/exynos4.dtsi |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

arch/arm/boot/dts/exynos4.dtsi +1 -1

index b8ece4b..e118356 100644
@@ -554,7 +554,7 @@
 		interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
 		clocks = <&clock CLK_PWM>;
 		clock-names = "timers";
-		#pwm-cells = <2>;
+		#pwm-cells = <3>;
 		status = "disabled";
 	};

Signature · 1 line

1.7.9.5

Sachin Kamat

2014-06-19 06:07 UTC #1 lore raw

PATCH v2 1/1 ARM: dts: exynos4: fix pwm-cells in pwm node

Hi Jaewon,

Quoted 17 lines · Jaewon Kim

pwm-cells should be 3. Third cell is optional PWM flags. And This flag supported by this binding is PWM_POLARITY_INVERTED.
Signed-off-by Jaewon Kim <[email protected]>
---
Changes in v2:
- Remove unnecessary handle.
 arch/arm/boot/dts/exynos4.dtsi |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/exynos4.dtsi +0 -0
index b8ece4b..e118356 100644

arch/arm/boot/dts/exynos4.dtsi line 559

Quoted 7 lines

arch/arm/boot/dts/exynos4.dtsi +1 -1

@@ -554,7 +554,7 @@
                interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
                clocks = <&clock CLK_PWM>;
                clock-names = "timers";
-               #pwm-cells = <2>;
+               #pwm-cells = <3>;
                status = "disabled";
        };

I think I had already reviewed this patch. Anyway,

Reviewed-by Sachin Kamat <[email protected]>

Kukjin Kim

Applied

2014-06-23 00:48 UTC #2 lore raw

PATCH v2 1/1 ARM: dts: exynos4: fix pwm-cells in pwm node

Quoted 30 lines · Sachin Kamat

Hi Jaewon,
Quoted 17 lines · Jaewon Kim
pwm-cells should be 3. Third cell is optional PWM flags. And This flag supported by this binding is PWM_POLARITY_INVERTED.
Signed-off-by Jaewon Kim <[email protected]>
---
Changes in v2:
- Remove unnecessary handle.
 arch/arm/boot/dts/exynos4.dtsi |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/exynos4.dtsi +0 -0
index b8ece4b..e118356 100644
arch/arm/boot/dts/exynos4.dtsi line 559
Quoted 7 lines
arch/arm/boot/dts/exynos4.dtsi +1 -1
@@ -554,7 +554,7 @@
                interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
                clocks = <&clock CLK_PWM>;
                clock-names = "timers";
-               #pwm-cells = <2>;
+               #pwm-cells = <3>;
                status = "disabled";
        };
I think I had already reviewed this patch. Anyway,

Quoted 1 line

Reviewed-by Sachin Kamat <[email protected]>

Applied, thanks.

- Kukjin