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arm: mct: Don't reset the counter during boot and resume

PATCH New Chirantan Ekbote 3 participants 3 messages Jun 3, 2014 – Jun 4, 2014

Subsystems (2)
Arm Samsung Exynos Clocksource, clockevent drivers
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Chirantan Ekbote

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#0 lore raw

PATCH 1/1 arm: mct: Don't reset the counter during boot and resume

Unfortunately on some exynos systems, resetting the mct counter also resets the architected timer counter. This can cause problems if the architected timer driver has already been initialized because the kernel will think that the counter has wrapped around, causing a big jump in printk timestamps and delaying any scheduled clock events until the counter reaches the value it had before it was reset.

The kernel code makes no assumptions about the initial value of the mct counter so there is no reason from a software perspective to clear the counter before starting it. This also fixes the problems described in the previous paragraph.

Cc Olof Johansson <[email protected]>
Cc Doug Anderson <[email protected]>
Cc Kukjin Kim <[email protected]>
Cc Tomasz Figa <[email protected]>
Cc linux-arm-kernel at lists.infradead.org
Cc linux-samsung-soc at vger.kernel.org
Signed-off-by Chirantan Ekbote <[email protected]>
---
 drivers/clocksource/exynos_mct.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)
drivers/clocksource/exynos_mct.c +3 -6
index acf5a32..9b4a0ae 100644
@@ -152,13 +152,10 @@ static void exynos4_mct_write(unsigned int value, unsigned long offset)
 }
 
 /* Clocksource handling */
-static void exynos4_mct_frc_start(u32 hi, u32 lo)
+static void exynos4_mct_frc_start(void)
 {
 	u32 reg;
 
-	exynos4_mct_write(lo, EXYNOS4_MCT_G_CNT_L);
-	exynos4_mct_write(hi, EXYNOS4_MCT_G_CNT_U);
-
 	reg = __raw_readl(reg_base + EXYNOS4_MCT_G_TCON);
 	reg |= MCT_G_TCON_START;
 	exynos4_mct_write(reg, EXYNOS4_MCT_G_TCON);

@@ -180,7 +177,7 @@ static cycle_t exynos4_frc_read(struct clocksource *cs)
 
 static void exynos4_frc_resume(struct clocksource *cs)
 {
-	exynos4_mct_frc_start(0, 0);
+	exynos4_mct_frc_start();
 }
 
 struct clocksource mct_frc = {

@@ -194,7 +191,7 @@ struct clocksource mct_frc = {
 
 static void __init exynos4_clocksource_init(void)
 {
-	exynos4_mct_frc_start(0, 0);
+	exynos4_mct_frc_start();
 
 	if (clocksource_register_hz(&mct_frc, clk_rate))
 		panic("%s: can't register clocksource\n", mct_frc.name);
Signature · 1 line
1.9.1.423.g4596e3a
#1 lore raw

PATCH 1/1 arm: mct: Don't reset the counter during boot and resume

Chirantan,

Quoted 19 lines · Chirantan Ekbote

Unfortunately on some exynos systems, resetting the mct counter also resets the architected timer counter. This can cause problems if the architected timer driver has already been initialized because the kernel will think that the counter has wrapped around, causing a big jump in printk timestamps and delaying any scheduled clock events until the counter reaches the value it had before it was reset.

The kernel code makes no assumptions about the initial value of the mct counter so there is no reason from a software perspective to clear the counter before starting it. This also fixes the problems described in the previous paragraph.

Cc Olof Johansson <[email protected]>
Cc Doug Anderson <[email protected]>
Cc Kukjin Kim <[email protected]>
Cc Tomasz Figa <[email protected]>
Cc linux-arm-kernel at lists.infradead.org
Cc linux-samsung-soc at vger.kernel.org
Signed-off-by Chirantan Ekbote <[email protected]>
Quoted 3 lines
---
 drivers/clocksource/exynos_mct.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

I can confirm that this fixes problems I described in
<http://www.spinics.net/lists/linux-samsung-soc/msg29085.html>. Now when I boot there's no mysterious delay and there's no big jump in time.

I'd love to see this in 3.16 so we can get rid of this annoying delay.

Reviewed-by Doug Anderson <[email protected]>
Tested-by Doug Anderson <[email protected]>
#2 lore raw

PATCH 1/1 arm: mct: Don't reset the counter during boot and resume

Quoted 33 lines · Doug Anderson

Chirantan,

Quoted 19 lines · Chirantan Ekbote

Unfortunately on some exynos systems, resetting the mct counter also resets the architected timer counter. This can cause problems if the architected timer driver has already been initialized because the kernel will think that the counter has wrapped around, causing a big jump in printk timestamps and delaying any scheduled clock events until the counter reaches the value it had before it was reset.

The kernel code makes no assumptions about the initial value of the mct counter so there is no reason from a software perspective to clear the counter before starting it. This also fixes the problems described in the previous paragraph.

Cc Olof Johansson <[email protected]>
Cc Doug Anderson <[email protected]>
Cc Kukjin Kim <[email protected]>
Cc Tomasz Figa <[email protected]>
Cc linux-arm-kernel at lists.infradead.org
Cc linux-samsung-soc at vger.kernel.org
Signed-off-by Chirantan Ekbote <[email protected]>
Quoted 3 lines
---
 drivers/clocksource/exynos_mct.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

I can confirm that this fixes problems I described in
<http://www.spinics.net/lists/linux-samsung-soc/msg29085.html>. Now when I boot there's no mysterious delay and there's no big jump in time.

Quoted 4 lines

I'd love to see this in 3.16 so we can get rid of this annoying delay.

Reviewed-by Doug Anderson <[email protected]>
Tested-by Doug Anderson <[email protected]>

OK, I will queue this patch into fixes for 3.16.

Thanks,
Kukjin