Skip to contentSkip to conversation

drm: tilcdc: Add revision handling for FB_CEILING

PATCH In review Daniel Schultz 2 participants 5 messages Oct 28, 2016 – Oct 31, 2016

Subsystems (3)
lore
Share & tools
lore
#0 lore raw

PATCH 1/2 drm: tilcdc: Add revision handling for FB_CEILING

The commit d8ff0c63fbcb ("drm/tilcdc: Adjust the FB_CEILING address") added an adjustment of the FB_CEILING address. This is done by decrementing the address by one.

On the AM335x (rev 0x4F201000) the framebuffer is rotated left over the display border, because the ceiling address is 8f276fff instead of 8f277000. Since this adjustment isn't necessary for the LCDC v2, the origin ceiling address should be used.

---
 drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)
drivers/gpu/drm/tilcdc/tilcdc_crtc.c +5 -1
index 788999e..fe1d088 100644
@@ -69,6 +69,7 @@ static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb)
 {
 	struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
 	struct drm_device *dev = crtc->dev;
+	struct tilcdc_drm_private *priv = dev->dev_private;
 	struct drm_gem_cma_object *gem;
 	unsigned int depth, bpp;
 	dma_addr_t start, end;
@@ -88,7 +89,10 @@ static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb)
 	 * unlikely that LCDC would fetch the DMA addresses in the middle of
 	 * an update.
 	 */
-	dma_base_and_ceiling = (u64)(end - 1) << 32 | start;
+	if (priv->rev == 1)
+		end -= 1;
+
+	dma_base_and_ceiling = (u64)end << 32 | start;
 	tilcdc_write64(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, dma_base_and_ceiling);
 
 	if (tilcdc_crtc->curr_fb)
Signature · 1 line
1.9.1
#1 lore raw

PATCH 2/2 drm: tilcdc: Correct misspelling in error message

This error message will be printed when a FIFO underflow irq has triggered. Since this happens sometimes and the error message will be displayed on the console, it should have a correct spelling.

---
 drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/gpu/drm/tilcdc/tilcdc_crtc.c +1 -1
index fe1d088..63caed4 100644
@@ -769,7 +769,7 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc)
 	}
 
 	if (stat & LCDC_FIFO_UNDERFLOW)
-		dev_err_ratelimited(dev->dev, "%s(0x%08x): FIFO underfow",
+		dev_err_ratelimited(dev->dev, "%s(0x%08x): FIFO underflow",
 				    __func__, stat);
 
 	/* For revision 2 only */
Signature · 1 line
1.9.1
#2 lore raw

Re: [PATCH 2/2] drm: tilcdc: Correct misspelling in error message

Quoted 5 lines · Daniel Schultz

This error message will be printed when a FIFO underflow irq has triggered. Since this happens sometimes and the error message will be displayed on the console, it should have a correct spelling.

Picked up for my next pull request.

Best regards,
Jyri

Quoted 10 lines
---
 drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/gpu/drm/tilcdc/tilcdc_crtc.c +0 -0
index fe1d088..63caed4 100644

drivers/gpu/drm/tilcdc/tilcdc_crtc.c irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc) · line 775

Quoted 8 lines
drivers/gpu/drm/tilcdc/tilcdc_crtc.c +1 -1
@@ -769,7 +769,7 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc)
 	}
 
 	if (stat & LCDC_FIFO_UNDERFLOW)
-		dev_err_ratelimited(dev->dev, "%s(0x%08x): FIFO underfow",
+		dev_err_ratelimited(dev->dev, "%s(0x%08x): FIFO underflow",
 				    __func__, stat);
 
 	/* For revision 2 only */

_______________________________________________
dri-devel mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/dri-devel

#3 lore raw

Re: [PATCH 2/2] drm: tilcdc: Correct misspelling in error message

Quoted 9 lines · Jyri Sarha
Quoted 5 lines · Daniel Schultz

This error message will be printed when a FIFO underflow irq has triggered. Since this happens sometimes and the error message will be displayed on the console, it should have a correct spelling.

Picked up for my next pull request.

Oh, and I'll change the subject to match the current prefix convention.

Quoted 20 lines
Quoted 19 lines
---
 drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/gpu/drm/tilcdc/tilcdc_crtc.c +1 -1
index fe1d088..63caed4 100644
@@ -769,7 +769,7 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc)
 	}
 
 	if (stat & LCDC_FIFO_UNDERFLOW)
-		dev_err_ratelimited(dev->dev, "%s(0x%08x): FIFO underfow",
+		dev_err_ratelimited(dev->dev, "%s(0x%08x): FIFO underflow",
 				    __func__, stat);
 
 	/* For revision 2 only */
#4 lore raw
In reply to Daniel Schultz
Quoted 9 lines · Daniel Schultz

The commit d8ff0c63fbcb ("drm/tilcdc: Adjust the FB_CEILING address") added an adjustment of the FB_CEILING address. This is done by decrementing the address by one.

On the AM335x (rev 0x4F201000) the framebuffer is rotated left over the display border, because the ceiling address is 8f276fff instead of 8f277000. Since this adjustment isn't necessary for the LCDC v2, the origin ceiling address should be used.

I can not see the rotation on any of my HW. However, there is no harm in taking this patch either, so I'll take your word for it and pick this up for my next pull request.

Best regards,
Jyri

Quoted 20 lines
---
 drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)
drivers/gpu/drm/tilcdc/tilcdc_crtc.c +1 -0
index 788999e..fe1d088 100644
@@ -69,6 +69,7 @@ static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb)
 {
 	struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
 	struct drm_device *dev = crtc->dev;
+	struct tilcdc_drm_private *priv = dev->dev_private;
 	struct drm_gem_cma_object *gem;
 	unsigned int depth, bpp;
 	dma_addr_t start, end;
@@ -88,7 +89,10 @@ static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb)
 	 * unlikely that LCDC would fetch the DMA addresses in the middle of

drivers/gpu/drm/tilcdc/tilcdc_crtc.c static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb) · line 98

Quoted 10 lines
drivers/gpu/drm/tilcdc/tilcdc_crtc.c +4 -1
 	 * an update.
 	 */
-	dma_base_and_ceiling = (u64)(end - 1) << 32 | start;
+	if (priv->rev == 1)
+		end -= 1;
+
+	dma_base_and_ceiling = (u64)end << 32 | start;
 	tilcdc_write64(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, dma_base_and_ceiling);
 
 	if (tilcdc_crtc->curr_fb)

_______________________________________________
dri-devel mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/dri-devel