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ARM: dts: specify all the per-cpu interrupts of arch timer for exynos5440

PATCH New Kukjin Kim 7 participants 11 messages Jan 22, 2013 – Feb 4, 2013

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Kukjin Kim

author
#0 lore raw

PATCH 1/1 ARM: dts: specify all the per-cpu interrupts of arch timer for exynos5440

From: Thomas Abraham <[email protected]>

Need to be changed requirements in the 'cpus' node for exynos5440 to specify all the per-cpu interrupts of arch timer.

---
 arch/arm/boot/dts/exynos5440.dtsi |   20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)
arch/arm/boot/dts/exynos5440.dtsi +16 -4
index 5406689..c5bd8ed 100644
@@ -28,7 +28,10 @@
 			compatible = "arm,cortex-a15";
 			timer {
 				compatible = "arm,armv7-timer";
-				interrupts = <1 13 0xf08>;
+				interrupts = <1 13 0xf08>,
+					     <1 14 0xf08>,
+					     <1 11 0xf08>,
+					     <1 10 0xf08>;
 				clock-frequency = <1000000>;
 			};
 		};
@@ -36,7 +39,10 @@
 			compatible = "arm,cortex-a15";
 			timer {
 				compatible = "arm,armv7-timer";
-				interrupts = <1 14 0xf08>;
+				interrupts = <1 13 0xf08>;
+					     <1 14 0xf08>,
+					     <1 11 0xf08>,
+					     <1 10 0xf08>;
 				clock-frequency = <1000000>;
 			};
 		};
@@ -44,7 +50,10 @@
 			compatible = "arm,cortex-a15";
 			timer {
 				compatible = "arm,armv7-timer";
-				interrupts = <1 14 0xf08>;
+				interrupts = <1 13 0xf08>;
+					     <1 14 0xf08>,
+					     <1 11 0xf08>,
+					     <1 10 0xf08>;
 				clock-frequency = <1000000>;
 			};
 		};
@@ -52,7 +61,10 @@
 			compatible = "arm,cortex-a15";
 			timer {
 				compatible = "arm,armv7-timer";
-				interrupts = <1 14 0xf08>;
+				interrupts = <1 13 0xf08>;
+					     <1 14 0xf08>,
+					     <1 11 0xf08>,
+					     <1 10 0xf08>;
 				clock-frequency = <1000000>;
 			};
 		};
Signature · 1 line
1.7.10.4
#1 lore raw

PATCH 1/1 ARM: dts: specify all the per-cpu interrupts of arch timer for exynos5440

Quoted 4 lines · Kukjin Kim

From: Thomas Abraham <[email protected]>

Need to be changed requirements in the 'cpus' node for exynos5440 to specify all the per-cpu interrupts of arch timer.

The node(s) for the arch timer should not be in the cpus/cpu at N nodes. Instead, there should be one node (in the root of the tree).

If this works currently it's only because the driver picks up one of the nodes, and luckily it's the same as the others. This is not guaranteed to work in future, and will likely break.

Quoted 12 lines
---
 arch/arm/boot/dts/exynos5440.dtsi |   20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)
arch/arm/boot/dts/exynos5440.dtsi +0 -0
index 5406689..c5bd8ed 100644

arch/arm/boot/dts/exynos5440.dtsi line 34

Quoted 8 lines
arch/arm/boot/dts/exynos5440.dtsi +4 -1
@@ -28,7 +28,10 @@
 			compatible = "arm,cortex-a15";
 			timer {
 				compatible = "arm,armv7-timer";
-				interrupts = <1 13 0xf08>;
+				interrupts = <1 13 0xf08>,
+					     <1 14 0xf08>,
+					     <1 11 0xf08>,
+					     <1 10 0xf08>;

Also, this interrupts list is updated differently to all the other nodes. Typo?

Quoted 48 lines
arch/arm/boot/dts/exynos5440.dtsi +12 -3
 				clock-frequency = <1000000>;
 			};
 		};
@@ -36,7 +39,10 @@
 			compatible = "arm,cortex-a15";
 			timer {
 				compatible = "arm,armv7-timer";
-				interrupts = <1 14 0xf08>;
+				interrupts = <1 13 0xf08>;
+					     <1 14 0xf08>,
+					     <1 11 0xf08>,
+					     <1 10 0xf08>;
 				clock-frequency = <1000000>;
 			};
 		};
@@ -44,7 +50,10 @@
 			compatible = "arm,cortex-a15";
 			timer {
 				compatible = "arm,armv7-timer";
-				interrupts = <1 14 0xf08>;
+				interrupts = <1 13 0xf08>;
+					     <1 14 0xf08>,
+					     <1 11 0xf08>,
+					     <1 10 0xf08>;
 				clock-frequency = <1000000>;
 			};
 		};
@@ -52,7 +61,10 @@
 			compatible = "arm,cortex-a15";
 			timer {
 				compatible = "arm,armv7-timer";
-				interrupts = <1 14 0xf08>;
+				interrupts = <1 13 0xf08>;
+					     <1 14 0xf08>,
+					     <1 11 0xf08>,
+					     <1 10 0xf08>;
 				clock-frequency = <1000000>;
 			};
 		};
Signature · 7 lines
1.7.10.4


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Please fix this up to only have one timer node, in the root of the tree.

Thanks,
Mark.

author
#2 lore raw

PATCH 1/1 ARM: dts: specify all the per-cpu interrupts of arch timer for exynos5440

Quoted 1 line · Mark Rutland

+ devicetree-discuss, Grant Likely, Rob Herring and Tony Lindgren

Quoted 9 lines · Kukjin Kim
Quoted 4 lines

From: Thomas Abraham <[email protected]>

Need to be changed requirements in the 'cpus' node for exynos5440 to specify all the per-cpu interrupts of arch timer.

The node(s) for the arch timer should not be in the cpus/cpu at N nodes. Instead, there should be one node (in the root of the tree).

Well, I don't think so. As per my understanding, the local timers are attached to every ARM cores (cpus) and it generates certain interrupt to the GIC. So the correct representation for this in device tree is to include the interrupts in the cpu nodes in dts file. Your comments refer to a limitation in the Linux kernel implementation of the arch_timer and it should not result in representing the hardware details incorrectly in the dts file.

Quoted 1 line

If this works currently it's only because the driver picks up one of the

nodes,

Quoted 3 lines

and luckily it's the same as the others. This is not guaranteed to work in future, and will likely break.

It is up to the Linux kernel implementation of arch_timer to handle the hardware details in dts file accordingly.

Quoted 9 lines

Review

Quoted 8 lines
---
 arch/arm/boot/dts/exynos5440.dtsi |   20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)
(quoted diff) +0 -0

b/arch/arm/boot/dts/exynos5440.dtsi

Quoted 14 lines

arch/arm/boot/dts/exynos5440.dtsi line 34

Quoted 12 lines

index 5406689..c5bd8ed 100644

arch/arm/boot/dts/exynos5440.dtsi +4 -1
@@ -28,7 +28,10 @@
 			compatible = "arm,cortex-a15";
 			timer {
 				compatible = "arm,armv7-timer";
-				interrupts = <1 13 0xf08>;
+				interrupts = <1 13 0xf08>,
+					     <1 14 0xf08>,
+					     <1 11 0xf08>,
+					     <1 10 0xf08>;

Also, this interrupts list is updated differently to all the other nodes.

Typo?

Quoted 1 line

Hmm, I think this should be fine. If any concerns, please let me know in detail.

[...]

Thanks.

- Kukjin

#3 lore raw

PATCH 1/1 ARM: dts: specify all the per-cpu interrupts of arch timer for exynos5440

Quoted 13 lines · Kukjin Kim
Quoted 1 line · Mark Rutland

+ devicetree-discuss, Grant Likely, Rob Herring and Tony Lindgren

Quoted 9 lines · Kukjin Kim
Quoted 4 lines

From: Thomas Abraham <[email protected]>

Need to be changed requirements in the 'cpus' node for exynos5440 to specify all the per-cpu interrupts of arch timer.

The node(s) for the arch timer should not be in the cpus/cpu at N nodes. Instead, there should be one node (in the root of the tree).

Quoted 7 lines

Well, I don't think so. As per my understanding, the local timers are attached to every ARM cores (cpus) and it generates certain interrupt to the GIC. So the correct representation for this in device tree is to include the interrupts in the cpu nodes in dts file. Your comments refer to a limitation in the Linux kernel implementation of the arch_timer and it should not result in representing the hardware details incorrectly in the dts file.

I disagree. The "correct representation" is whatever the devicetree binding documentation describes. It does not describe placing timer nodes in the cpu nodes.

Quoted 8 lines
Quoted 2 lines

If this works currently it's only because the driver picks up one of the

nodes,

Quoted 3 lines

and luckily it's the same as the others. This is not guaranteed to work in future, and will likely break.

It is up to the Linux kernel implementation of arch_timer to handle the hardware details in dts file accordingly.

The binding specification does not specify that there should be multiple timer nodes, nor does it specify that they should be under cpu nodes. The timers, being a banked resource, can be described with one node.

It is not up to the Linux kernel to handle undocumented variations of bindings.

Quoted 24 lines
Quoted 10 lines

Review

Quoted 9 lines
---
 arch/arm/boot/dts/exynos5440.dtsi |   20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)
(quoted diff) +0 -0

b/arch/arm/boot/dts/exynos5440.dtsi

Quoted 14 lines

arch/arm/boot/dts/exynos5440.dtsi line 34

Quoted 12 lines

index 5406689..c5bd8ed 100644

arch/arm/boot/dts/exynos5440.dtsi +4 -1
@@ -28,7 +28,10 @@
 			compatible = "arm,cortex-a15";
 			timer {
 				compatible = "arm,armv7-timer";
-				interrupts = <1 13 0xf08>;
+				interrupts = <1 13 0xf08>,
+					     <1 14 0xf08>,
+					     <1 11 0xf08>,
+					     <1 10 0xf08>;

Also, this interrupts list is updated differently to all the other nodes.

Quoted 4 lines

Typo?

Quoted 1 line

Hmm, I think this should be fine. If any concerns, please let me know in detail.

Sorry, I misread the diff. Your patch in fact corrects them to be consistent where they weren't previously.

Quoted 8 lines

[...]

Thanks.

- Kukjin

Thanks,
Mark.

#4 lore raw

PATCH 1/1 ARM: dts: specify all the per-cpu interrupts of arch timer for exynos5440

Looping Marc, Benoit

Quoted 22 lines · Mark Rutland
Quoted 13 lines · Kukjin Kim
Quoted 1 line · Mark Rutland

+ devicetree-discuss, Grant Likely, Rob Herring and Tony Lindgren

Quoted 9 lines · Kukjin Kim
Quoted 4 lines

From: Thomas Abraham <[email protected]>

Need to be changed requirements in the 'cpus' node for exynos5440 to specify all the per-cpu interrupts of arch timer.

The node(s) for the arch timer should not be in the cpus/cpu@N nodes. Instead, there should be one node (in the root of the tree).

Quoted 7 lines

Well, I don't think so. As per my understanding, the local timers are attached to every ARM cores (cpus) and it generates certain interrupt to the GIC. So the correct representation for this in device tree is to include the interrupts in the cpu nodes in dts file. Your comments refer to a limitation in the Linux kernel implementation of the arch_timer and it should not result in representing the hardware details incorrectly in the dts file.

Quoted 4 lines

I disagree. The "correct representation" is whatever the devicetree binding documentation describes. It does not describe placing timer nodes in the cpu nodes.

This seems to be exact same topic what is getting discussed here [1] Technically DT is suppose to represent how the hardware is rather than how the bindings are done.

But as Marc pointed out, the approach taken currently is to not duplicate the banked information. The thread [1] isn't concluded yet but looks like we might want to avoid duplicating the information
considering, more of such duplication needs to follow. e.g gic i/f

Am still waiting on what Benoit has to say ?

Regards,
Santosh

[1] http://www.spinics.net/lists/linux-omap/msg85110.html

#5 lore raw

PATCH 1/1 ARM: dts: specify all the per-cpu interrupts of arch timer for exynos5440

Hi Santosh,

Quoted 38 lines · Santosh Shilimkar

Looping Marc, Benoit

Quoted 25 lines · Mark Rutland
Quoted 13 lines · Kukjin Kim
Quoted 1 line · Mark Rutland

+ devicetree-discuss, Grant Likely, Rob Herring and Tony Lindgren

Quoted 9 lines · Kukjin Kim
Quoted 4 lines

From: Thomas Abraham <[email protected]>

Need to be changed requirements in the 'cpus' node for exynos5440 to specify all the per-cpu interrupts of arch timer.

The node(s) for the arch timer should not be in the cpus/cpu at N nodes. Instead, there should be one node (in the root of the tree).

Quoted 10 lines

Well, I don't think so. As per my understanding, the local timers are attached to every ARM cores (cpus) and it generates certain interrupt to the
GIC. So the correct representation for this in device tree is to include the
interrupts in the cpu nodes in dts file. Your comments refer to a limitation in the Linux kernel implementation of the arch_timer and it should not result in representing the hardware details incorrectly in the
dts file.

Quoted 6 lines

I disagree. The "correct representation" is whatever the devicetree binding
documentation describes. It does not describe placing timer nodes in the cpu
nodes.

This seems to be exact same topic what is getting discussed here [1] Technically DT is suppose to represent how the hardware is rather than how the bindings are done.

Quoted 6 lines

But as Marc pointed out, the approach taken currently is to not duplicate the banked information. The thread [1] isn't concluded yet but looks like we might want to avoid duplicating the information considering, more of such duplication needs to follow. e.g gic i/f

Am still waiting on what Benoit has to say ?

I agree with you :-)

I'm not sure the binding was properly done to reflect the HW accurately.

A local timer for my point of view should be located in the cpu node like a L1 cache. Or at least referenced in each cpu by a phandle.

What was the rational to put it in the root?

Regards,
Benoit

#6 lore raw

PATCH 1/1 ARM: dts: specify all the per-cpu interrupts of arch timer for exynos5440

Quoted 48 lines · Benoit Cousson

Hi Santosh,

Quoted 38 lines · Santosh Shilimkar

Looping Marc, Benoit

Quoted 25 lines · Mark Rutland
Quoted 13 lines · Kukjin Kim
Quoted 1 line · Mark Rutland

+ devicetree-discuss, Grant Likely, Rob Herring and Tony Lindgren

Quoted 9 lines · Kukjin Kim
Quoted 4 lines

From: Thomas Abraham <[email protected]>

Need to be changed requirements in the 'cpus' node for exynos5440 to specify all the per-cpu interrupts of arch timer.

The node(s) for the arch timer should not be in the cpus/cpu at N nodes. Instead, there should be one node (in the root of the tree).

Quoted 10 lines

Well, I don't think so. As per my understanding, the local timers are attached to every ARM cores (cpus) and it generates certain interrupt to the
GIC. So the correct representation for this in device tree is to include the
interrupts in the cpu nodes in dts file. Your comments refer to a limitation in the Linux kernel implementation of the arch_timer and it should not result in representing the hardware details incorrectly in the
dts file.

Quoted 6 lines

I disagree. The "correct representation" is whatever the devicetree binding
documentation describes. It does not describe placing timer nodes in the cpu
nodes.

This seems to be exact same topic what is getting discussed here [1] Technically DT is suppose to represent how the hardware is rather than how the bindings are done.

Quoted 6 lines

But as Marc pointed out, the approach taken currently is to not duplicate the banked information. The thread [1] isn't concluded yet but looks like we might want to avoid duplicating the information considering, more of such duplication needs to follow. e.g gic i/f

Am still waiting on what Benoit has to say ?

Quoted 9 lines

I agree with you :-)

I'm not sure the binding was properly done to reflect the HW accurately.

A local timer for my point of view should be located in the cpu node like a L1 cache. Or at least referenced in each cpu by a phandle.

What was the rational to put it in the root?

From Marc's answer it seems to avoid the duplication of data but
I let him elaborate it.

Regards,
Santosh

#7 lore raw

PATCH 1/1 ARM: dts: specify all the per-cpu interrupts of arch timer for exynos5440

In reply to Benoit Cousson

Hi Benoit,

Quoted 48 lines · Benoit Cousson

Hi Santosh,

Quoted 38 lines · Santosh Shilimkar

Looping Marc, Benoit

Quoted 25 lines · Mark Rutland
Quoted 13 lines · Kukjin Kim
Quoted 1 line · Mark Rutland

+ devicetree-discuss, Grant Likely, Rob Herring and Tony Lindgren

Quoted 9 lines · Kukjin Kim
Quoted 4 lines

From: Thomas Abraham <[email protected]>

Need to be changed requirements in the 'cpus' node for exynos5440 to specify all the per-cpu interrupts of arch timer.

The node(s) for the arch timer should not be in the cpus/cpu at N nodes. Instead, there should be one node (in the root of the tree).

Quoted 10 lines

Well, I don't think so. As per my understanding, the local timers are attached to every ARM cores (cpus) and it generates certain interrupt to the
GIC. So the correct representation for this in device tree is to include the
interrupts in the cpu nodes in dts file. Your comments refer to a limitation in the Linux kernel implementation of the arch_timer and it should not result in representing the hardware details incorrectly in the
dts file.

Quoted 6 lines

I disagree. The "correct representation" is whatever the devicetree binding
documentation describes. It does not describe placing timer nodes in the cpu
nodes.

This seems to be exact same topic what is getting discussed here [1] Technically DT is suppose to represent how the hardware is rather than how the bindings are done.

Quoted 6 lines

But as Marc pointed out, the approach taken currently is to not duplicate the banked information. The thread [1] isn't concluded yet but looks like we might want to avoid duplicating the information considering, more of such duplication needs to follow. e.g gic i/f

Am still waiting on what Benoit has to say ?

Quoted 8 lines

I agree with you :-)

I'm not sure the binding was properly done to reflect the HW accurately.

A local timer for my point of view should be located in the cpu node like a L1 cache. Or at least referenced in each cpu by a phandle.

What was the rational to put it in the root?

The rational was to follow what we already do for most (all?) banked resources. We already have TWD, GIC and PMU that have a root node, avoiding duplicated resources. I think consistency is an important thing to have.

If we decide to move everything into CPU nodes and duplicate all the banked resources, fine. But that has impacts that reach far beyond the simple case of the timer.

In particular, good luck with the GIC distributor interface, where the 32 first interrupts are per CPU. This would also mandate a redesign of the way we specify a PPI, as the CPU mask in the third field doesn't mean a thing anymore.

If you insist on having a phandle to a timer node, fine by me.

Cheers,

	M.
Signature · 1 line
Jazz is not dead. It just smells funny...
#8 lore raw

PATCH 1/1 ARM: dts: specify all the per-cpu interrupts of arch timer for exynos5440

Benoit,

Quoted 69 lines · Marc Zyngier

Hi Benoit,

Quoted 48 lines · Benoit Cousson

Hi Santosh,

Quoted 38 lines · Santosh Shilimkar

Looping Marc, Benoit

Quoted 25 lines · Mark Rutland
Quoted 13 lines · Kukjin Kim
Quoted 1 line · Mark Rutland

+ devicetree-discuss, Grant Likely, Rob Herring and Tony Lindgren

Quoted 9 lines · Kukjin Kim
Quoted 4 lines

From: Thomas Abraham <[email protected]>

Need to be changed requirements in the 'cpus' node for exynos5440 to specify all the per-cpu interrupts of arch timer.

The node(s) for the arch timer should not be in the cpus/cpu@N nodes. Instead, there should be one node (in the root of the tree).

Quoted 10 lines

Well, I don't think so. As per my understanding, the local timers are attached to every ARM cores (cpus) and it generates certain interrupt to the
GIC. So the correct representation for this in device tree is to include the
interrupts in the cpu nodes in dts file. Your comments refer to a limitation in the Linux kernel implementation of the arch_timer and it should not result in representing the hardware details incorrectly in the
dts file.

Quoted 6 lines

I disagree. The "correct representation" is whatever the devicetree binding
documentation describes. It does not describe placing timer nodes in the cpu
nodes.

This seems to be exact same topic what is getting discussed here [1] Technically DT is suppose to represent how the hardware is rather than how the bindings are done.

Quoted 6 lines

But as Marc pointed out, the approach taken currently is to not duplicate the banked information. The thread [1] isn't concluded yet but looks like we might want to avoid duplicating the information considering, more of such duplication needs to follow. e.g gic i/f

Am still waiting on what Benoit has to say ?

Quoted 8 lines

I agree with you :-)

I'm not sure the binding was properly done to reflect the HW accurately.

A local timer for my point of view should be located in the cpu node like a L1 cache. Or at least referenced in each cpu by a phandle.

What was the rational to put it in the root?

The rational was to follow what we already do for most (all?) banked resources. We already have TWD, GIC and PMU that have a root node, avoiding duplicated resources. I think consistency is an important thing to have.

If we decide to move everything into CPU nodes and duplicate all the banked resources, fine. But that has impacts that reach far beyond the simple case of the timer.

Quoted 7 lines

In particular, good luck with the GIC distributor interface, where the 32 first interrupts are per CPU. This would also mandate a redesign of the way we specify a PPI, as the CPU mask in the third field doesn't mean a thing anymore.

If you insist on having a phandle to a timer node, fine by me.

Can you please comment on it so that we can conclude this thread ? I would like to update my patches and hence the push.

Regards,
Santosh

#9 lore raw

PATCH 1/1 ARM: dts: specify all the per-cpu interrupts of arch timer for exynos5440

Quoted 19 lines · Santosh Shilimkar

Benoit,

Quoted 15 lines · Marc Zyngier

Hi Benoit,

Quoted 12 lines · Benoit Cousson

Hi Santosh,

Quoted 9 lines · Santosh Shilimkar

Looping Marc, Benoit

Quoted 6 lines · Mark Rutland
Quoted 5 lines · Kukjin Kim
Quoted 1 line · Mark Rutland

+ devicetree-discuss, Grant Likely, Rob Herring and Tony Lindgren

Quoted 1 line · Kukjin Kim
Quoted 11 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines

From: Thomas Abraham <[email protected]>

Need to be changed requirements in the 'cpus' node for

exynos5440

Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 1 line

to specify all the per-cpu interrupts of arch timer.

The node(s) for the arch timer should not be in the cpus/cpu at N

nodes.

Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 2 lines

Instead, there should be one node (in the root of the tree).

Well, I don't think so. As per my understanding, the local timers

are

Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line

attached to every ARM cores (cpus) and it generates certain

interrupt

Quoted 5 lines
Quoted 5 lines
Quoted 5 lines
Quoted 5 lines
Quoted 5 lines
Quoted 5 lines

to the
GIC. So the correct representation for this in device tree is to include the
interrupts in the cpu nodes in dts file. Your comments refer to a limitation in the Linux kernel implementation of the arch_timer and

it

Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line

should not result in representing the hardware details incorrectly

in

Quoted 18 lines
Quoted 18 lines
Quoted 18 lines
Quoted 18 lines
Quoted 9 lines
Quoted 2 lines

the
dts file.

I disagree. The "correct representation" is whatever the devicetree binding
documentation describes. It does not describe placing timer nodes in the cpu
nodes.

This seems to be exact same topic what is getting discussed here [1] Technically DT is suppose to represent how the hardware is rather than how the bindings are done.

But as Marc pointed out, the approach taken currently is to not duplicate the banked information. The thread [1] isn't concluded yet but looks like we might want to avoid duplicating the information considering, more of such duplication needs to follow. e.g gic i/f

Quoted 5 lines
Quoted 5 lines
Quoted 5 lines
Quoted 1 line

Am still waiting on what Benoit has to say ?

I agree with you :-)

I'm not sure the binding was properly done to reflect the HW

accurately.

Quoted 20 lines
Quoted 20 lines
Quoted 5 lines

A local timer for my point of view should be located in the cpu node like a L1 cache. Or at least referenced in each cpu by a phandle.

What was the rational to put it in the root?

The rational was to follow what we already do for most (all?) banked resources. We already have TWD, GIC and PMU that have a root node, avoiding duplicated resources. I think consistency is an important thing to have.

If we decide to move everything into CPU nodes and duplicate all the banked resources, fine. But that has impacts that reach far beyond the simple case of the timer.

In particular, good luck with the GIC distributor interface, where the 32 first interrupts are per CPU. This would also mandate a redesign of the way we specify a PPI, as the CPU mask in the third field doesn't mean a thing anymore.

Quoted 5 lines
Quoted 2 lines

If you insist on having a phandle to a timer node, fine by me.

Can you please comment on it so that we can conclude this thread ? I would like to update my patches and hence the push.

Hmm...it's time to decide for now.

Let me add timer node for ARM arch timer at this moment. Then if any change is required, will do it later.

If any objection, let me know. If not, I will queue following patch for v3.9.

Thanks.

- Kukjin

---------8<------------------------------8<--------------------------------- -

From: Kukjin Kim <[email protected]>
Subject: [PATCH] ARM: dts: re-organized cpu node for exynos5440

This patch adds timer node and re-organizes cpu node for exynos5440.

---
 arch/arm/boot/dts/exynos5440.dtsi |   37
+++++++++++++++++--------------------
 1 file changed, 17 insertions(+), 20 deletions(-)
(quoted diff) +0 -0

b/arch/arm/boot/dts/exynos5440.dtsi
index 1e7a2b0..5c5a699 100644

arch/arm/boot/dts/exynos5440.dtsi +17 -20
@@ -24,40 +24,37 @@
 	};
 
 	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
 		cpu at 0 {
 			compatible = "arm,cortex-a15";
-			timer {
-				compatible = "arm,armv7-timer";
-				interrupts = <1 13 0xf08>;
-				clock-frequency = <1000000>;
-			};
+			reg = <0>;
 		};
 		cpu at 1 {
 			compatible = "arm,cortex-a15";
-			timer {
-				compatible = "arm,armv7-timer";
-				interrupts = <1 14 0xf08>;
-				clock-frequency = <1000000>;
-			};
+			reg = <1>;
 		};
 		cpu at 2 {
 			compatible = "arm,cortex-a15";
-			timer {
-				compatible = "arm,armv7-timer";
-				interrupts = <1 14 0xf08>;
-				clock-frequency = <1000000>;
-			};
+			reg = <2>;
 		};
 		cpu at 3 {
 			compatible = "arm,cortex-a15";
-			timer {
-				compatible = "arm,armv7-timer";
-				interrupts = <1 14 0xf08>;
-				clock-frequency = <1000000>;
-			};
+			reg = <3>;
 		};
 	};
 
+	timer {
+		compatible = "arm,cortex-a15-timer",
+			     "arm,armv7-timer";
+		interrupts = <1 13 0xf08>,
+			     <1 14 0xf08>,
+			     <1 11 0xf08>,
+			     <1 10 0xf08>;
+		clock-frequency = <50000000>;
+	};
+
 	serial at B0000 {
 		compatible = "samsung,exynos4210-uart";
 		reg = <0xB0000 0x1000>;
Signature · 1 line
1.7.10.4
#10 lore raw

PATCH 1/1 ARM: dts: specify all the per-cpu interrupts of arch timer for exynos5440

In reply to Mark Rutland
Quoted 22 lines · Mark Rutland
Quoted 13 lines · Kukjin Kim
Quoted 1 line · Mark Rutland

+ devicetree-discuss, Grant Likely, Rob Herring and Tony Lindgren

Quoted 9 lines · Kukjin Kim
Quoted 4 lines

From: Thomas Abraham <[email protected]>

Need to be changed requirements in the 'cpus' node for exynos5440 to specify all the per-cpu interrupts of arch timer.

The node(s) for the arch timer should not be in the cpus/cpu at N nodes. Instead, there should be one node (in the root of the tree).

Quoted 7 lines

Well, I don't think so. As per my understanding, the local timers are attached to every ARM cores (cpus) and it generates certain interrupt to the GIC. So the correct representation for this in device tree is to include the interrupts in the cpu nodes in dts file. Your comments refer to a limitation in the Linux kernel implementation of the arch_timer and it should not result in representing the hardware details incorrectly in the dts file.

Quoted 3 lines

I disagree. The "correct representation" is whatever the devicetree binding documentation describes. It does not describe placing timer nodes in the cpu nodes.

I don't think we should add other nodes to /cpus besides cpu nodes.

The presence of architected timers is defined by the cpu being a Cortex-A15. So you don't really need a timer node at all. All that is really needed is the interrupt. You could add interrupts property directly to each cpu node. The location of PMU nodes has come up recently as well, and the PMU interrupt could be added as well.

Whether we should change the binding at this point is questionable. Normally, we wouldn't want to do that, but as this is all pretty new it may be okay to make an exception here. However, I don't see anything that is fundamentally broken with the current binding. Multi-cluster could introduce some issues.

Quoted 6 lines
Quoted 6 lines
Quoted 2 lines

If this works currently it's only because the driver picks up one of the

nodes,

Quoted 3 lines

and luckily it's the same as the others. This is not guaranteed to work in future, and will likely break.

Quoted 8 lines
Quoted 2 lines

It is up to the Linux kernel implementation of arch_timer to handle the hardware details in dts file accordingly.

The binding specification does not specify that there should be multiple timer nodes, nor does it specify that they should be under cpu nodes. The timers, being a banked resource, can be described with one node.

It is not up to the Linux kernel to handle undocumented variations of bindings.

Except things done before documentation was enforced.

Rob