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Implement RTC support for S3C2443/S3C2416/S3C2450

PATCH Superseded Heiko Stübner 4 participants 13 messages Dec 12, 2011 – Dec 29, 2011

Subsystems (4)

v2 of 4 Superseded Latest is v4 →

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#0 lore raw

v2 cover Implement RTC support for S3C2443/S3C2416/S3C2450

Similar to the ADC the RTC of S3C2443 and S3C2416/2450 has some slight variances when compared to the existing types.

This series adds support for those SoCs.

As with the ADC patches, these changes where tested on S3C2416 hardware. The S3C2443 quirks are a subset of those and are done according to the datasheet, but not tested on real hardware (as I do not own a S3C2443 device).

changes since v1:
address comments from Thomas Abraham, reducing number of ifdefs and duplicate code

Heiko Stuebner (4):
ARM: SAMSUNG: cleanup of rtc register definitions
rtc-s3c: make room for more variants in devicetree block
rtc-s3c: add variants for S3C2443 and S3C2416
ARM: S3C2443/S3C2416: add s3c_rtc_setname and rename rtc devices

 arch/arm/mach-s3c2416/s3c2416.c               |    2 +
 arch/arm/mach-s3c2443/s3c2443.c               |    2 +
 arch/arm/plat-samsung/include/plat/regs-rtc.h |   92 +++++++++++++++---------
 arch/arm/plat-samsung/include/plat/rtc-core.h |   27 +++++++
 drivers/rtc/rtc-s3c.c                         |   74 ++++++++++++++++----
 5 files changed, 149 insertions(+), 48 deletions(-)
 create mode 100644 arch/arm/plat-samsung/include/plat/rtc-core.h
Signature · 1 line
1.7.5.4
#1 lore raw

PATCH v2 1/4 ARM: SAMSUNG: cleanup of rtc register definitions

regs-rtc.h uses a mixture of tabs and spaces and also (x<<y) to format bits. So, before adding new stuff clean up the formatting and also add spaces to the bit definitions (i.e. (x << y) )

---
 arch/arm/plat-samsung/include/plat/regs-rtc.h |   66 ++++++++++++-------------
 1 files changed, 32 insertions(+), 34 deletions(-)
arch/arm/plat-samsung/include/plat/regs-rtc.h +32 -34
index 30b7cc1..d9d9bdc 100644
@@ -18,51 +18,49 @@
 #define S3C2410_INTP_ALM	(1 << 1)
 #define S3C2410_INTP_TIC	(1 << 0)
 
-#define S3C2410_RTCCON	      S3C2410_RTCREG(0x40)
-#define S3C2410_RTCCON_RTCEN  (1<<0)
-#define S3C2410_RTCCON_CLKSEL (1<<1)
-#define S3C2410_RTCCON_CNTSEL (1<<2)
-#define S3C2410_RTCCON_CLKRST (1<<3)
-#define S3C64XX_RTCCON_TICEN  (1<<8)
+#define S3C2410_RTCCON		S3C2410_RTCREG(0x40)
+#define S3C2410_RTCCON_RTCEN	(1 << 0)
+#define S3C2410_RTCCON_CLKSEL	(1 << 1)
+#define S3C2410_RTCCON_CNTSEL	(1 << 2)
+#define S3C2410_RTCCON_CLKRST	(1 << 3)
+#define S3C64XX_RTCCON_TICEN	(1 << 8)
 
-#define S3C64XX_RTCCON_TICMSK (0xF<<7)
-#define S3C64XX_RTCCON_TICSHT (7)
+#define S3C64XX_RTCCON_TICMSK	(0xF << 7)
+#define S3C64XX_RTCCON_TICSHT	(7)
 
-#define S3C2410_TICNT	      S3C2410_RTCREG(0x44)
-#define S3C2410_TICNT_ENABLE  (1<<7)
+#define S3C2410_TICNT		S3C2410_RTCREG(0x44)
+#define S3C2410_TICNT_ENABLE	(1 << 7)
 
-#define S3C2410_RTCALM	      S3C2410_RTCREG(0x50)
-#define S3C2410_RTCALM_ALMEN  (1<<6)
-#define S3C2410_RTCALM_YEAREN (1<<5)
-#define S3C2410_RTCALM_MONEN  (1<<4)
-#define S3C2410_RTCALM_DAYEN  (1<<3)
-#define S3C2410_RTCALM_HOUREN (1<<2)
-#define S3C2410_RTCALM_MINEN  (1<<1)
-#define S3C2410_RTCALM_SECEN  (1<<0)
+#define S3C2410_RTCALM		S3C2410_RTCREG(0x50)
+#define S3C2410_RTCALM_ALMEN	(1 << 6)
+#define S3C2410_RTCALM_YEAREN	(1 << 5)
+#define S3C2410_RTCALM_MONEN	(1 << 4)
+#define S3C2410_RTCALM_DAYEN	(1 << 3)
+#define S3C2410_RTCALM_HOUREN	(1 << 2)
+#define S3C2410_RTCALM_MINEN	(1 << 1)
+#define S3C2410_RTCALM_SECEN	(1 << 0)
 
 #define S3C2410_RTCALM_ALL \
   S3C2410_RTCALM_ALMEN | S3C2410_RTCALM_YEAREN | S3C2410_RTCALM_MONEN |\
   S3C2410_RTCALM_DAYEN | S3C2410_RTCALM_HOUREN | S3C2410_RTCALM_MINEN |\
   S3C2410_RTCALM_SECEN
 
+#define S3C2410_ALMSEC		S3C2410_RTCREG(0x54)
+#define S3C2410_ALMMIN		S3C2410_RTCREG(0x58)
+#define S3C2410_ALMHOUR		S3C2410_RTCREG(0x5c)
 
-#define S3C2410_ALMSEC	      S3C2410_RTCREG(0x54)
-#define S3C2410_ALMMIN	      S3C2410_RTCREG(0x58)
-#define S3C2410_ALMHOUR	      S3C2410_RTCREG(0x5c)
+#define S3C2410_ALMDATE		S3C2410_RTCREG(0x60)
+#define S3C2410_ALMMON		S3C2410_RTCREG(0x64)
+#define S3C2410_ALMYEAR		S3C2410_RTCREG(0x68)
 
-#define S3C2410_ALMDATE	      S3C2410_RTCREG(0x60)
-#define S3C2410_ALMMON	      S3C2410_RTCREG(0x64)
-#define S3C2410_ALMYEAR	      S3C2410_RTCREG(0x68)
-
-#define S3C2410_RTCRST	      S3C2410_RTCREG(0x6c)
-
-#define S3C2410_RTCSEC	      S3C2410_RTCREG(0x70)
-#define S3C2410_RTCMIN	      S3C2410_RTCREG(0x74)
-#define S3C2410_RTCHOUR	      S3C2410_RTCREG(0x78)
-#define S3C2410_RTCDATE	      S3C2410_RTCREG(0x7c)
-#define S3C2410_RTCDAY	      S3C2410_RTCREG(0x80)
-#define S3C2410_RTCMON	      S3C2410_RTCREG(0x84)
-#define S3C2410_RTCYEAR	      S3C2410_RTCREG(0x88)
+#define S3C2410_RTCRST		S3C2410_RTCREG(0x6c)
 
+#define S3C2410_RTCSEC		S3C2410_RTCREG(0x70)
+#define S3C2410_RTCMIN		S3C2410_RTCREG(0x74)
+#define S3C2410_RTCHOUR		S3C2410_RTCREG(0x78)
+#define S3C2410_RTCDATE		S3C2410_RTCREG(0x7c)
+#define S3C2410_RTCDAY		S3C2410_RTCREG(0x80)
+#define S3C2410_RTCMON		S3C2410_RTCREG(0x84)
+#define S3C2410_RTCYEAR		S3C2410_RTCREG(0x88)
 
 #endif /* __ASM_ARCH_REGS_RTC_H */
Signature · 1 line
1.7.5.4
#2 lore raw

PATCH v2 1/4 ARM: SAMSUNG: cleanup of rtc register definitions

Quoted 8 lines · Heiko St?bner

regs-rtc.h uses a mixture of tabs and spaces and also (x<<y) to format bits. So, before adding new stuff clean up the formatting and also add spaces to the bit definitions (i.e. (x << y) )

---
 arch/arm/plat-samsung/include/plat/regs-rtc.h |   66

++++++++++++---------

Quoted 93 lines

----

 1 files changed, 32 insertions(+), 34 deletions(-)
arch/arm/plat-samsung/include/plat/regs-rtc.h +32 -35
index 30b7cc1..d9d9bdc 100644
@@ -18,51 +18,49 @@
 #define S3C2410_INTP_ALM	(1 << 1)
 #define S3C2410_INTP_TIC	(1 << 0)
 
-#define S3C2410_RTCCON	      S3C2410_RTCREG(0x40)
-#define S3C2410_RTCCON_RTCEN  (1<<0)
-#define S3C2410_RTCCON_CLKSEL (1<<1)
-#define S3C2410_RTCCON_CNTSEL (1<<2)
-#define S3C2410_RTCCON_CLKRST (1<<3)
-#define S3C64XX_RTCCON_TICEN  (1<<8)
+#define S3C2410_RTCCON		S3C2410_RTCREG(0x40)
+#define S3C2410_RTCCON_RTCEN	(1 << 0)
+#define S3C2410_RTCCON_CLKSEL	(1 << 1)
+#define S3C2410_RTCCON_CNTSEL	(1 << 2)
+#define S3C2410_RTCCON_CLKRST	(1 << 3)
+#define S3C64XX_RTCCON_TICEN	(1 << 8)
 
-#define S3C64XX_RTCCON_TICMSK (0xF<<7)
-#define S3C64XX_RTCCON_TICSHT (7)
+#define S3C64XX_RTCCON_TICMSK	(0xF << 7)
+#define S3C64XX_RTCCON_TICSHT	(7)
 
-#define S3C2410_TICNT	      S3C2410_RTCREG(0x44)
-#define S3C2410_TICNT_ENABLE  (1<<7)
+#define S3C2410_TICNT		S3C2410_RTCREG(0x44)
+#define S3C2410_TICNT_ENABLE	(1 << 7)
 
-#define S3C2410_RTCALM	      S3C2410_RTCREG(0x50)
-#define S3C2410_RTCALM_ALMEN  (1<<6)
-#define S3C2410_RTCALM_YEAREN (1<<5)
-#define S3C2410_RTCALM_MONEN  (1<<4)
-#define S3C2410_RTCALM_DAYEN  (1<<3)
-#define S3C2410_RTCALM_HOUREN (1<<2)
-#define S3C2410_RTCALM_MINEN  (1<<1)
-#define S3C2410_RTCALM_SECEN  (1<<0)
+#define S3C2410_RTCALM		S3C2410_RTCREG(0x50)
+#define S3C2410_RTCALM_ALMEN	(1 << 6)
+#define S3C2410_RTCALM_YEAREN	(1 << 5)
+#define S3C2410_RTCALM_MONEN	(1 << 4)
+#define S3C2410_RTCALM_DAYEN	(1 << 3)
+#define S3C2410_RTCALM_HOUREN	(1 << 2)
+#define S3C2410_RTCALM_MINEN	(1 << 1)
+#define S3C2410_RTCALM_SECEN	(1 << 0)
 
 #define S3C2410_RTCALM_ALL \
   S3C2410_RTCALM_ALMEN | S3C2410_RTCALM_YEAREN | S3C2410_RTCALM_MONEN |\
   S3C2410_RTCALM_DAYEN | S3C2410_RTCALM_HOUREN | S3C2410_RTCALM_MINEN |\
   S3C2410_RTCALM_SECEN
 
+#define S3C2410_ALMSEC		S3C2410_RTCREG(0x54)
+#define S3C2410_ALMMIN		S3C2410_RTCREG(0x58)
+#define S3C2410_ALMHOUR		S3C2410_RTCREG(0x5c)
 
-#define S3C2410_ALMSEC	      S3C2410_RTCREG(0x54)
-#define S3C2410_ALMMIN	      S3C2410_RTCREG(0x58)
-#define S3C2410_ALMHOUR	      S3C2410_RTCREG(0x5c)
+#define S3C2410_ALMDATE		S3C2410_RTCREG(0x60)
+#define S3C2410_ALMMON		S3C2410_RTCREG(0x64)
+#define S3C2410_ALMYEAR		S3C2410_RTCREG(0x68)
 
-#define S3C2410_ALMDATE	      S3C2410_RTCREG(0x60)
-#define S3C2410_ALMMON	      S3C2410_RTCREG(0x64)
-#define S3C2410_ALMYEAR	      S3C2410_RTCREG(0x68)
-
-#define S3C2410_RTCRST	      S3C2410_RTCREG(0x6c)
-
-#define S3C2410_RTCSEC	      S3C2410_RTCREG(0x70)
-#define S3C2410_RTCMIN	      S3C2410_RTCREG(0x74)
-#define S3C2410_RTCHOUR	      S3C2410_RTCREG(0x78)
-#define S3C2410_RTCDATE	      S3C2410_RTCREG(0x7c)
-#define S3C2410_RTCDAY	      S3C2410_RTCREG(0x80)
-#define S3C2410_RTCMON	      S3C2410_RTCREG(0x84)
-#define S3C2410_RTCYEAR	      S3C2410_RTCREG(0x88)
+#define S3C2410_RTCRST		S3C2410_RTCREG(0x6c)
 
+#define S3C2410_RTCSEC		S3C2410_RTCREG(0x70)
+#define S3C2410_RTCMIN		S3C2410_RTCREG(0x74)
+#define S3C2410_RTCHOUR		S3C2410_RTCREG(0x78)
+#define S3C2410_RTCDATE		S3C2410_RTCREG(0x7c)
+#define S3C2410_RTCDAY		S3C2410_RTCREG(0x80)
+#define S3C2410_RTCMON		S3C2410_RTCREG(0x84)
+#define S3C2410_RTCYEAR		S3C2410_RTCREG(0x88)
 
 #endif /* __ASM_ARCH_REGS_RTC_H */
--
Quoted 1 line

1.7.5.4

Looks good to me, but how about cleanup useless definitions together like following?

Actually, S3C2410_RTCCON_CLKSEL, S3C64XX_RTCCON_TICMSK, S3C64XX_RTCCON_TICSHT, S3C2410_RTCALM_ALL, S3C2410_RTCRST and S3C2410_RTCDAY are not used.

And I'm not sure we really need to define the S3C2410_RTCREG(x), but this can be sorted out next time with similar others.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.

#3 lore raw

PATCH v2 2/4 rtc-s3c: make room for more variants in devicetree block

In reply to Heiko Stübner

Use the data field of of_device_id to hold the type for s3c_cpu_type.

---
 drivers/rtc/rtc-s3c.c |   31 ++++++++++++++++++++++---------
 1 files changed, 22 insertions(+), 9 deletions(-)
drivers/rtc/rtc-s3c.c +22 -9
index 175067a..2885b25 100644
@@ -428,6 +428,20 @@ static int __devexit s3c_rtc_remove(struct platform_device *dev)
 	return 0;
 }
 
+static const struct of_device_id s3c_rtc_dt_match[];
+
+static inline int s3c_rtc_get_driver_data(struct platform_device *pdev)
+{
+#ifdef CONFIG_OF
+	if (pdev->dev.of_node) {
+		const struct of_device_id *match;
+		match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
+		return match->data;
+	}
+#endif
+	return platform_get_device_id(pdev)->driver_data;
+}
+
 static int __devinit s3c_rtc_probe(struct platform_device *pdev)
 {
 	struct rtc_device *rtc;
@@ -508,13 +522,7 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
 		goto err_nortc;
 	}
 
-#ifdef CONFIG_OF
-	if (pdev->dev.of_node)
-		s3c_rtc_cpu_type = of_device_is_compatible(pdev->dev.of_node,
-			"samsung,s3c6410-rtc") ? TYPE_S3C64XX : TYPE_S3C2410;
-	else
-#endif
-		s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;
+	s3c_rtc_cpu_type = s3c_rtc_get_driver_data(pdev);
 
 	/* Check RTC Time */
 
@@ -638,8 +646,13 @@ static int s3c_rtc_resume(struct platform_device *pdev)
 
 #ifdef CONFIG_OF
 static const struct of_device_id s3c_rtc_dt_match[] = {
-	{ .compatible = "samsung,s3c2410-rtc" },
-	{ .compatible = "samsung,s3c6410-rtc" },
+	{
+		.compatible = "samsung,s3c2410-rtc"
+		.data = TYPE_S3C2410,
+	}, {
+		.compatible = "samsung,s3c6410-rtc"
+		.data = TYPE_S3C64XX,
+	},
 	{},
 };
 MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
Signature · 1 line
1.7.5.4
#4 lore raw

PATCH v2 3/4 rtc-s3c: add variants for S3C2443 and S3C2416

In reply to Heiko Stübner

Especially the TICNT registers are different from the two rtc types that currently exists.

---
 arch/arm/plat-samsung/include/plat/regs-rtc.h |   24 ++++++++++++++
 drivers/rtc/rtc-s3c.c                         |   43 ++++++++++++++++++++++--
 2 files changed, 63 insertions(+), 4 deletions(-)
arch/arm/plat-samsung/include/plat/regs-rtc.h +24 -0
index d9d9bdc..fa6066a 100644
@@ -23,14 +23,33 @@
 #define S3C2410_RTCCON_CLKSEL	(1 << 1)
 #define S3C2410_RTCCON_CNTSEL	(1 << 2)
 #define S3C2410_RTCCON_CLKRST	(1 << 3)
+#define S3C2443_RTCCON_TICSEL	(1 << 4)
 #define S3C64XX_RTCCON_TICEN	(1 << 8)
 
 #define S3C64XX_RTCCON_TICMSK	(0xF << 7)
 #define S3C64XX_RTCCON_TICSHT	(7)
 
+#define S3C2416_RTCCON_TICMSK	(0x1F << 7)
+
 #define S3C2410_TICNT		S3C2410_RTCREG(0x44)
 #define S3C2410_TICNT_ENABLE	(1 << 7)
 
+/* S3C2443: tick count is 15 bit wide
+ * TICNT[6:0] contains upper 7 bits
+ * TICNT1[7:0] contains lower 8 bits
+ */
+#define S3C2443_TICNT_PART(x)	((x & 0x7f00) >> 8)
+#define S3C2443_TICNT1		S3C2410_RTCREG(0x4C)
+#define S3C2443_TICNT1_PART(x)	(x & 0xff)
+
+/* S3C2416: tick count is 32 bit wide
+ * TICNT[6:0] contains bits [14:8]
+ * TICNT1[7:0] contains lower 8 bits
+ * TICNT2[16:0] contains upper 17 bits
+ */
+#define S3C2416_TICNT2		S3C2410_RTCREG(0x48)
+#define S3C2416_TICNT2_PART(x)	((x & 0xffff8000) >> 15)
+
 #define S3C2410_RTCALM		S3C2410_RTCREG(0x50)
 #define S3C2410_RTCALM_ALMEN	(1 << 6)
 #define S3C2410_RTCALM_YEAREN	(1 << 5)
@@ -63,4 +82,9 @@
 #define S3C2410_RTCMON		S3C2410_RTCREG(0x84)
 #define S3C2410_RTCYEAR		S3C2410_RTCREG(0x88)
 
+#define S3C2443_TICKCNT		S3C2410_RTCREG(0x90)
+
+#define S3C2443_RTCLBAT		S3C2410_RTCREG(0x94)
+#define S3C2443_RTCLBAT_CLEAR	(1 << 0)
+
 #endif /* __ASM_ARCH_REGS_RTC_H */
drivers/rtc/rtc-s3c.c +39 -4

99 lines not on this page · raw message

Signature · 1 line
1.7.5.4
#5 lore raw

PATCH v2 4/4 ARM: S3C2443/S3C2416: add s3c_rtc_setname and rename rtc devices

In reply to Heiko Stübner

As the S3C24xx SoCs use the same rtc device a renaming capability like in the adc driver is necessary.

This patch adds a s3c_rtc_setname function and names the rtc devices for S3C2443 and S3C2416 accordingly.

---
 arch/arm/mach-s3c2416/s3c2416.c               |    2 +
 arch/arm/mach-s3c2443/s3c2443.c               |    2 +
 arch/arm/plat-samsung/include/plat/rtc-core.h |   27 +++++++++++++++++++++++++
 3 files changed, 31 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/plat-samsung/include/plat/rtc-core.h
arch/arm/mach-s3c2416/s3c2416.c +2 -0
index ee214bc..604cf98 100644
@@ -61,6 +61,7 @@
 #include <plat/fb-core.h>
 #include <plat/nand-core.h>
 #include <plat/adc-core.h>
+#include <plat/rtc-core.h>
 
 static struct map_desc s3c2416_iodesc[] __initdata = {
 	IODESC_ENT(WATCHDOG),
@@ -99,6 +100,7 @@ int __init s3c2416_init(void)
 	s3c_fb_setname("s3c2443-fb");
 
 	s3c_adc_setname("s3c2416-adc");
+	s3c_rtc_setname("s3c2416-rtc");
 
 #ifdef CONFIG_PM
 	register_syscore_ops(&s3c2416_pm_syscore_ops);
arch/arm/mach-s3c2443/s3c2443.c +2 -0
index a22b771..9e6be20 100644
@@ -42,6 +42,7 @@
 #include <plat/fb-core.h>
 #include <plat/nand-core.h>
 #include <plat/adc-core.h>
+#include <plat/rtc-core.h>
 
 static struct map_desc s3c2443_iodesc[] __initdata = {
 	IODESC_ENT(WATCHDOG),
@@ -72,6 +73,7 @@ int __init s3c2443_init(void)
 	s3c_fb_setname("s3c2443-fb");
 
 	s3c_adc_setname("s3c2443-adc");
+	s3c_rtc_setname("s3c2443-rtc");
 
 	/* change WDT IRQ number */
 	s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT;
arch/arm/plat-samsung/include/plat/rtc-core.h new file +27 -0
new file mode 100644
index 0000000..21d8594
@@ -0,0 +1,27 @@
+/* linux/arch/arm/plat-samsung/include/plat/rtc-core.h
+ *
+ * Copyright (c) 2011 Heiko Stuebner <[email protected]>
+ *
+ * Samsung RTC Controller core functions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_PLAT_RTC_CORE_H
+#define __ASM_PLAT_RTC_CORE_H __FILE__
+
+/* These functions are only for use with the core support code, such as
+ * the cpu specific initialisation code
+ */
+
+/* re-define device name depending on support. */
+static inline void s3c_rtc_setname(char *name)
+{
+#if defined(CONFIG_SAMSUNG_DEV_RTC) || defined(CONFIG_PLAT_S3C24XX)
+	s3c_device_rtc.name = name;
+#endif
+}
+
+#endif /* __ASM_PLAT_RTC_CORE_H */
Signature · 1 line
1.7.5.4
#6 lore raw

v2 cover Implement RTC support for S3C2443/S3C2416/S3C2450

In reply to Heiko Stübner
Quoted 22 lines · Heiko St?bner

Similar to the ADC the RTC of S3C2443 and S3C2416/2450 has some slight variances when compared to the existing types.

This series adds support for those SoCs.

As with the ADC patches, these changes where tested on S3C2416 hardware. The S3C2443 quirks are a subset of those and are done according to the datasheet, but not tested on real hardware (as I do not own a S3C2443 device).

changes since v1:
address comments from Thomas Abraham, reducing number of ifdefs and duplicate code

Heiko Stuebner (4):
ARM: SAMSUNG: cleanup of rtc register definitions
rtc-s3c: make room for more variants in devicetree block
rtc-s3c: add variants for S3C2443 and S3C2416
ARM: S3C2443/S3C2416: add s3c_rtc_setname and rename rtc devices

Quoted 3 lines
 arch/arm/mach-s3c2416/s3c2416.c               |    2 +
 arch/arm/mach-s3c2443/s3c2443.c               |    2 +
 arch/arm/plat-samsung/include/plat/regs-rtc.h |   92

+++++++++++++++------

Quoted 8 lines
---
 arch/arm/plat-samsung/include/plat/rtc-core.h |   27 +++++++
 drivers/rtc/rtc-s3c.c                         |   74 ++++++++++++++++----
 5 files changed, 149 insertions(+), 48 deletions(-)
 create mode 100644 arch/arm/plat-samsung/include/plat/rtc-core.h

--
1.7.5.4

Hi Heiko,

There were small comments on 1st patch and others looks ok to me. If you're ok on my comments, please re-send it so that I can request to pull this series to Alessandro or Andrew with my ack.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.

#7 lore raw

v2 cover Implement RTC support for S3C2443/S3C2416/S3C2450

Am Mittwoch, 21. Dezember 2011, 08:25:53 schrieb Kukjin Kim:

Quoted 35 lines
Quoted 20 lines · Heiko St?bner

Similar to the ADC the RTC of S3C2443 and S3C2416/2450 has some slight variances when compared to the existing types.

This series adds support for those SoCs.

As with the ADC patches, these changes where tested on S3C2416 hardware. The S3C2443 quirks are a subset of those and are done according to the datasheet, but not tested on real hardware (as I do not own a S3C2443 device).

changes since v1:
address comments from Thomas Abraham, reducing number of ifdefs and duplicate code

Heiko Stuebner (4):
ARM: SAMSUNG: cleanup of rtc register definitions
rtc-s3c: make room for more variants in devicetree block
rtc-s3c: add variants for S3C2443 and S3C2416
ARM: S3C2443/S3C2416: add s3c_rtc_setname and rename rtc devices

Quoted 3 lines
 arch/arm/mach-s3c2416/s3c2416.c               |    2 +
 arch/arm/mach-s3c2443/s3c2443.c               |    2 +
 arch/arm/plat-samsung/include/plat/regs-rtc.h |   92

+++++++++++++++------

Quoted 8 lines

---

 arch/arm/plat-samsung/include/plat/rtc-core.h |   27 +++++++
 drivers/rtc/rtc-s3c.c                         |   74
 ++++++++++++++++---- 5 files changed, 149 insertions(+), 48
 deletions(-)
 create mode 100644 arch/arm/plat-samsung/include/plat/rtc-core.h
Quoted 8 lines
Quoted 2 lines

--
1.7.5.4

Hi Heiko,

There were small comments on 1st patch and others looks ok to me. If you're ok on my comments, please re-send it so that I can request to pull this series to Alessandro or Andrew with my ack.

I'm on it now.

Who is Andrew and should I include him in the recipients? I only found Alessandro Zummo in the MAINTAINERS file for rtc stuff and am lacking any comment from the rtc-side until now.

Heiko

#8 lore raw
Quoted 9 lines · Heiko St?bner

Am Mittwoch, 21. Dezember 2011, 08:25:53 schrieb Kukjin Kim:

Quoted 3 lines

There were small comments on 1st patch and others looks ok to me. If you're ok on my comments, please re-send it so that I can request to pull this series to Alessandro or Andrew with my ack.

Who is Andrew and should I include him in the recipients? I only found Alessandro Zummo in the MAINTAINERS file for rtc stuff and am lacking any comment from the rtc-side until now.

Andrew Morton. Alessandro hasn't been terribly active for a while now.

#9 lore raw
Quoted 5 lines · On Fri, 23 Dec 2011 11:43:00 +0000 Mark Brown…
Quoted 3 lines

Who is Andrew and should I include him in the recipients? I only found Alessandro Zummo in the MAINTAINERS file for rtc stuff and am lacking any comment from the rtc-side until now.

Andrew Morton. Alessandro hasn't been terribly active for a while now.

But I'm still keeping an eye on the patches ;)

Signature · 6 lines
 Best regards,

 Alessandro Zummo,
  Tower Technologies - Torino, Italy

  http://www.towertech.it
#10 lore raw
Quoted 4 lines · Alessandro Zummo

On Fri, 23 Dec 2011 11:43:00 +0000
Mark Brown <[email protected]> wrote:

Quoted 9 lines
Quoted 2 lines
Quoted 2 lines

Who is Andrew and should I include him in the recipients? I only found Alessandro Zummo in the MAINTAINERS file for rtc stuff and am lacking

any

Quoted 3 lines
Quoted 1 line

comment from the rtc-side until now.

Andrew Morton. Alessandro hasn't been terribly active for a while now.

But I'm still keeping an eye on the patches ;)

Hi Alessandro,

Good to see you again :)

Please check next-samsung-devel-rtc branch in my tree,
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git

And if you're ok to send to upstream via samsung tree, please let me know so that I can add your ack on rtc patches. Of course, if any problems, let me revert them and they should be re-worked.

As a note, it depends on next-samsung-devel-dt1 which includes support device tree for Samsung stuff, so I rebased on it.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.

#11 lore raw
Quoted 6 lines · On Tue, 27 Dec 2011 09:44:52 +0900 Kukjin Kim <[email protected]> wrote:

Please check next-samsung-devel-rtc branch in my tree,
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git

And if you're ok to send to upstream via samsung tree, please let me know so that I can add your ack on rtc patches. Of course, if any problems, let me revert them and they should be re-worked.

Checked. Please send it via samsung tree. I can only visually check the code but don't really know if it works and I guess you are in a better position to know ;)

Signature · 6 lines
 Best regards,

 Alessandro Zummo,
  Tower Technologies - Torino, Italy

  http://www.towertech.it
#12 lore raw
Quoted 10 lines · Alessandro Zummo
Quoted 4 lines · On Tue, 27 Dec 2011 09:44:52 +0900 Kukjin Kim <[email protected]> wrote:

Please check next-samsung-devel-rtc branch in my tree,
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git

And if you're ok to send to upstream via samsung tree, please let me

know so

Quoted 1 line

that I can add your ack on rtc patches. Of course, if any problems, let

Quoted 9 lines

me

Quoted 1 line

revert them and they should be re-worked.

Checked. Please send it via samsung tree. I can only visually check the code but don't really know if it works and I guess you are in a better position to know ;)

Hi Alessandro,

Thanks for your ack.
This series will be sent to upstream via arm-soc tree.

Happy New Year 2012 :)

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.