Hexagon: Add interrupts
PATCH v5 17/36 Hexagon: Add interrupts
Signed-off-by Richard Kuo <[email protected]>
Signed-off-by Linas Vepstas <[email protected]>
Reviewed-by Thomas Gleixner <[email protected]>
Acked-by Arnd Bergmann <[email protected]>
--- arch/hexagon/include/asm/irq.h | 36 ++++++++++++++++ arch/hexagon/kernel/irq_cpu.c | 90 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 126 insertions(+), 0 deletions(-) create mode 100644 arch/hexagon/include/asm/irq.h create mode 100644 arch/hexagon/kernel/irq_cpu.c
arch/hexagon/include/asm/irq.h new file +36 -0
@@ -0,0 +1,36 @@ +/* +* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 and +* only version 2 as published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA +* 02110-1301, USA. +*/ + +#ifndef _ASM_IRQ_H_ +#define _ASM_IRQ_H_ + +/* Number of first-level interrupts associated with the CPU core. */ +#define HEXAGON_CPUINTS 32 + +/* +* Must define NR_IRQS before including <asm-generic/irq.h> +* 64 == the two SIRC's, 176 == the two gpio's +* +* IRQ configuration is still in flux; defining this to a comfortably +* large number. +*/ +#define NR_IRQS 512 + +#include <asm-generic/irq.h> + +#endif
arch/hexagon/kernel/irq_cpu.c new file +90 -0
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Signature · 7 lines
1.7.1 -- Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.