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MIPS: Octeon: Add twsi interrupt initialization for OCTEON 3XXX, 5XXX, 63XX

PATCH New Eunbong Song 1 participant 1 message Apr 22, 2014 MIPS

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Eunbong Song

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PATCH 1/1 MIPS: Octeon: Add twsi interrupt initialization for OCTEON 3XXX, 5XXX, 63XX

In octeon_3xxx.dts file, there is a definiton for twsi/twsi2 interrupts. But there is no code for initialization of this interrupts. This patch adds code for initialization of twsi interrupts.

Signed-off-by Eunbong Song <[email protected]>
---
 arch/mips/cavium-octeon/octeon-irq.c           |    2 ++
 arch/mips/include/asm/mach-cavium-octeon/irq.h |    2 ++
 2 files changed, 4 insertions(+), 0 deletions(-)
arch/mips/cavium-octeon/octeon-irq.c +2 -0
index c2bb4f8..15bfcf9 100644
@@ -1260,11 +1260,13 @@ static void __init octeon_irq_init_ciu(void)
 	for (i = 0; i < 4; i++)
 		octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_PCI_MSI0, 0, i + 40);
 
+	octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_TWSI, 0, 45);
 	octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_RML, 0, 46);
 	for (i = 0; i < 4; i++)
 		octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_TIMER0, 0, i + 52);
 
 	octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_USB0, 0, 56);
+	octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_TWSI2, 0, 59);
 
 	/* CIU_1 */
 	for (i = 0; i < 16; i++)
arch/mips/include/asm/mach-cavium-octeon/irq.h +2 -0
index 60fc4c3..cceae32 100644
@@ -35,6 +35,8 @@ enum octeon_irq {
 	OCTEON_IRQ_PCI_MSI2,
 	OCTEON_IRQ_PCI_MSI3,
 
+	OCTEON_IRQ_TWSI,
+	OCTEON_IRQ_TWSI2,
 	OCTEON_IRQ_RML,
 	OCTEON_IRQ_TIMER0,
 	OCTEON_IRQ_TIMER1,
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