SB1 cache exception handler fails to compile [arch/mips/mm/cex-sb1.S]
PATCH 1/1 SB1 cache exception handler fails to compile [arch/mips/mm/cex-sb1.S]
The recent update to arch/mips/mm/cex-sb1.S (1.13) adds an include for <asm/processor.h> unnecessarily. This include file defines C structs and the like which the assembler chokes upon.
Kevin
Signature · 19 lines
Kevin Paul Herbert <[email protected]> cisco Systems, Inc. Index: arch/mips/mm/cex-sb1.S =================================================================== RCS file: /home/cvs/linux/arch/mips/mm/cex-sb1.S,v retrieving revision 1.13 diff -u -r1.13 cex-sb1.S --- arch/mips/mm/cex-sb1.S 14 Jan 2004 18:46:21 -0000 1.13 +++ arch/mips/mm/cex-sb1.S 15 Jan 2004 18:55:28 -0000 @@ -23,7 +23,6 @@ #include <asm/mipsregs.h> #include <asm/stackframe.h> #include <asm/cacheops.h> -#include <asm/processor.h> #include <asm/sibyte/board.h> #define C0_ERRCTL $26 /* CP0: Error info */