ppc64: Fix pSeries secondary CPU setup
PATCH 1/1 ppc64: Fix pSeries secondary CPU setup
Hi !
This patch fixes the setup of the secondary CPU(s) on pSeries, on non-LPAR platforms, especially with 970 CPUs, we need to copy some of the HID registers from CPU0 to the other ones as soon as they reach the early asm code. The PowerMac SMP entry did it already, but not the pSeries one.
Signed-off-by Benjamin Herrenschmidt <[email protected]>
arch/ppc64/kernel/smp.c +0 -3
@@ -833,9 +833,6 @@ max_cpus = smp_ops->probe (); -/* Backup CPU 0 state if necessary */ -__save_cpu_setup (); -smp_space_timers (max_cpus);for_each_cpu (cpu)
arch/ppc64/kernel/head.S +28 -20
78 lines not on this page · raw message
arch/ppc64/kernel/cpu_setup_power4.S +9 -0
@@ -156,6 +156,15 @@ cror 4*cr0+eq,4*cr0+eq,4*cr1+eq bne 1f + /* Before accessing memory, we make sure rm_ci is clear */ + li r0,0 + mfspr r3,SPRN_HID4 + rldimi r3,r0,40,23 /* clear bit 23 (rm_ci) */ + sync + mtspr SPRN_HID4,r3 + isync + sync + /* Clear interrupt prefix */ li r0,0 sync
Signature · 1 line
Benjamin Herrenschmidt <[email protected]>