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Move comon DMA nodes to exynos5.dtsi and

PATCH New Padmavathi Venna 3 participants 6 messages Jul 10, 2013 – Aug 14, 2013

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Device tree bindings Arm Samsung Exynos
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Padmavathi Venna

author
#0 lore raw

cover Move comon DMA nodes to exynos5.dtsi and

Exynos5250 and Exynos5420 has 4 DMA controllers in common. So this patch set moved the common nodes to exynos.dtsi keeping the clk info seperate for both the platforms. Exynos5420 has a separate DMA controller for audio IPs. So this patch set also adds the ADMA node on Exynos5420.

Padmavathi Venna (2):
ARM: dts: Move the common DMA controller nodes to exynos5.dtsi
ARM: dts: Add DMA controller node info on Exynos5420.

 arch/arm/boot/dts/exynos5.dtsi    |   44 +++++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/exynos5250.dtsi |   30 -------------------------
 arch/arm/boot/dts/exynos5420.dtsi |   33 +++++++++++++++++++++++++++
 3 files changed, 77 insertions(+), 30 deletions(-)
Signature · 1 line
1.7.4.4
author
#1 lore raw

PATCH 1/2 ARM: dts: Move the common DMA controller nodes to exynos5.dtsi

exynos5250 and exynos5420 has 4 DMA controllers in common. So this patch moves these nodes to common file keeping the dma controllers clk info in the exynos5250 dtsi file.

Signed-off-by Padmavathi Venna <[email protected]>
---
 arch/arm/boot/dts/exynos5.dtsi    |   44 +++++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/exynos5250.dtsi |   30 -------------------------
 2 files changed, 44 insertions(+), 30 deletions(-)
arch/arm/boot/dts/exynos5.dtsi +44 -0
index f65e124..cac35c8 100644
@@ -50,6 +50,50 @@
 		interrupts = <1 9 0xf04>;
 	};
 
+	amba {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "arm,amba-bus";
+		interrupt-parent = <&gic>;
+		ranges;
+
+		pdma0: pdma@121A0000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x121A0000 0x1000>;
+			interrupts = <0 34 0>;
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <32>;
+		};
+
+		pdma1: pdma@121B0000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x121B0000 0x1000>;
+			interrupts = <0 35 0>;
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <32>;
+		};
+
+		mdma0: mdma@10800000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x10800000 0x1000>;
+			interrupts = <0 33 0>;
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <1>;
+		};
+
+		mdma1: mdma@11C10000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x11C10000 0x1000>;
+			interrupts = <0 124 0>;
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <1>;
+		};
+	};
+
 	dwmmc_0: dwmmc0@12200000 {
 		compatible = "samsung,exynos5250-dw-mshc";
 		interrupts = <0 75 0>;
arch/arm/boot/dts/exynos5250.dtsi +0 -30
index 41cd625..3a474c4 100644
@@ -511,54 +511,24 @@
 	};
 
 	amba {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "arm,amba-bus";
-		interrupt-parent = <&gic>;
-		ranges;
-
 		pdma0: pdma@121A0000 {
-			compatible = "arm,pl330", "arm,primecell";
-			reg = <0x121A0000 0x1000>;
-			interrupts = <0 34 0>;
 			clocks = <&clock 275>;
 			clock-names = "apb_pclk";
-			#dma-cells = <1>;
-			#dma-channels = <8>;
-			#dma-requests = <32>;
 		};
 
 		pdma1: pdma@121B0000 {
-			compatible = "arm,pl330", "arm,primecell";
-			reg = <0x121B0000 0x1000>;
-			interrupts = <0 35 0>;
 			clocks = <&clock 276>;
 			clock-names = "apb_pclk";
-			#dma-cells = <1>;
-			#dma-channels = <8>;
-			#dma-requests = <32>;
 		};
 
 		mdma0: mdma@10800000 {
-			compatible = "arm,pl330", "arm,primecell";
-			reg = <0x10800000 0x1000>;
-			interrupts = <0 33 0>;
 			clocks = <&clock 271>;
 			clock-names = "apb_pclk";
-			#dma-cells = <1>;
-			#dma-channels = <8>;
-			#dma-requests = <1>;
 		};
 
 		mdma1: mdma@11C10000 {
-			compatible = "arm,pl330", "arm,primecell";
-			reg = <0x11C10000 0x1000>;
-			interrupts = <0 124 0>;
 			clocks = <&clock 271>;
 			clock-names = "apb_pclk";
-			#dma-cells = <1>;
-			#dma-channels = <8>;
-			#dma-requests = <1>;
 		};
 	};
Signature · 1 line
1.7.4.4
NAK
#2 lore raw

PATCH 1/2 ARM: dts: Move the common DMA controller nodes to exynos5.dtsi

Quoted 129 lines · Padmavathi Venna

exynos5250 and exynos5420 has 4 DMA controllers in common. So this patch moves these nodes to common file keeping the dma controllers clk info in the exynos5250 dtsi file.

Signed-off-by Padmavathi Venna <[email protected]>
---
 arch/arm/boot/dts/exynos5.dtsi    |   44
+++++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/exynos5250.dtsi |   30 -------------------------
 2 files changed, 44 insertions(+), 30 deletions(-)
arch/arm/boot/dts/exynos5.dtsi +44 -0
index f65e124..cac35c8 100644
@@ -50,6 +50,50 @@
 		interrupts = <1 9 0xf04>;
 	};
 
+	amba {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "arm,amba-bus";
+		interrupt-parent = <&gic>;
+		ranges;
+
+		pdma0: pdma at 121A0000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x121A0000 0x1000>;
+			interrupts = <0 34 0>;
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <32>;
+		};
+
+		pdma1: pdma at 121B0000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x121B0000 0x1000>;
+			interrupts = <0 35 0>;
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <32>;
+		};
+
+		mdma0: mdma at 10800000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x10800000 0x1000>;
+			interrupts = <0 33 0>;
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <1>;
+		};
+
+		mdma1: mdma at 11C10000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x11C10000 0x1000>;
+			interrupts = <0 124 0>;
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <1>;
+		};
+	};
+
 	dwmmc_0: dwmmc0 at 12200000 {
 		compatible = "samsung,exynos5250-dw-mshc";
 		interrupts = <0 75 0>;
arch/arm/boot/dts/exynos5250.dtsi +0 -31
index 41cd625..3a474c4 100644
@@ -511,54 +511,24 @@
 	};
 
 	amba {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "arm,amba-bus";
-		interrupt-parent = <&gic>;
-		ranges;
-
 		pdma0: pdma at 121A0000 {
-			compatible = "arm,pl330", "arm,primecell";
-			reg = <0x121A0000 0x1000>;
-			interrupts = <0 34 0>;
 			clocks = <&clock 275>;
 			clock-names = "apb_pclk";
-			#dma-cells = <1>;
-			#dma-channels = <8>;
-			#dma-requests = <32>;
 		};
 
 		pdma1: pdma at 121B0000 {
-			compatible = "arm,pl330", "arm,primecell";
-			reg = <0x121B0000 0x1000>;
-			interrupts = <0 35 0>;
 			clocks = <&clock 276>;
 			clock-names = "apb_pclk";
-			#dma-cells = <1>;
-			#dma-channels = <8>;
-			#dma-requests = <32>;
 		};
 
 		mdma0: mdma at 10800000 {
-			compatible = "arm,pl330", "arm,primecell";
-			reg = <0x10800000 0x1000>;
-			interrupts = <0 33 0>;
 			clocks = <&clock 271>;
 			clock-names = "apb_pclk";
-			#dma-cells = <1>;
-			#dma-channels = <8>;
-			#dma-requests = <1>;
 		};
 
 		mdma1: mdma at 11C10000 {
-			compatible = "arm,pl330", "arm,primecell";
-			reg = <0x11C10000 0x1000>;
-			interrupts = <0 124 0>;
 			clocks = <&clock 271>;
 			clock-names = "apb_pclk";
-			#dma-cells = <1>;
-			#dma-channels = <8>;
-			#dma-requests = <1>;
 		};
 	};
 
--
Quoted 1 line

1.7.4.4

NAK, because the dmac addresses are different on upcoming exynos5 and there are 2-mdma and only one pdma. So this change can make more complicated.

- Kukjin

author
#3 lore raw

PATCH 2/2 ARM: dts: Add DMA controller node info on Exynos5420.

In reply to Padmavathi Venna

Exynos5420 has one separate DMA controller for I2S0 and PCM0. This patch adds the same node on exynos5420 dtsi and adds the DMA clk info for the remaining DMA controllers.

Signed-off-by Padmavathi Venna <[email protected]>
---
 arch/arm/boot/dts/exynos5420.dtsi |   33 +++++++++++++++++++++++++++++++++
 1 files changed, 33 insertions(+), 0 deletions(-)
arch/arm/boot/dts/exynos5420.dtsi +33 -0
index a84f5f1..7035a4b 100644
@@ -137,6 +137,39 @@
 		interrupts = <0 47 0>;
 	};
 
+	amba {
+		pdma0: pdma@121A0000 {
+			clocks = <&clock 362>;
+			clock-names = "apb_pclk";
+		};
+
+		pdma1: pdma@121B0000 {
+			clocks = <&clock 363>;
+			clock-names = "apb_pclk";
+		};
+
+		mdma0: mdma@10800000 {
+			clocks = <&clock 473>;
+			clock-names = "apb_pclk";
+		};
+
+		mdma1: mdma@11C10000 {
+			clocks = <&clock 442>;
+			clock-names = "apb_pclk";
+		};
+
+		adma: adma@03880000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x03880000 0x1000>;
+			interrupts = <0 110 0>;
+			clocks = <&clock_audss EXYNOS_ADMA>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			#dma-channels = <6>;
+			#dma-requests = <16>;
+		};
+	};
+
 	serial@12C00000 {
 		clocks = <&clock 257>, <&clock 128>;
 		clock-names = "uart", "clk_uart_baud0";
Signature · 1 line
1.7.4.4
#4 lore raw

PATCH 2/2 ARM: dts: Add DMA controller node info on Exynos5420.

Quoted 8 lines · Padmavathi Venna

Exynos5420 has one separate DMA controller for I2S0 and PCM0. This patch adds the same node on exynos5420 dtsi and adds the DMA clk info for the remaining DMA controllers.

Signed-off-by Padmavathi Venna <[email protected]>
---
 arch/arm/boot/dts/exynos5420.dtsi |   33

+++++++++++++++++++++++++++++++++

Quoted 48 lines
 1 files changed, 33 insertions(+), 0 deletions(-)
arch/arm/boot/dts/exynos5420.dtsi +33 -1
index a84f5f1..7035a4b 100644
@@ -137,6 +137,39 @@
 		interrupts = <0 47 0>;
 	};
 
+	amba {
+		pdma0: pdma at 121A0000 {
+			clocks = <&clock 362>;
+			clock-names = "apb_pclk";
+		};
+
+		pdma1: pdma at 121B0000 {
+			clocks = <&clock 363>;
+			clock-names = "apb_pclk";
+		};
+
+		mdma0: mdma at 10800000 {
+			clocks = <&clock 473>;
+			clock-names = "apb_pclk";
+		};
+
+		mdma1: mdma at 11C10000 {
+			clocks = <&clock 442>;
+			clock-names = "apb_pclk";
+		};
+
+		adma: adma at 03880000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x03880000 0x1000>;
+			interrupts = <0 110 0>;
+			clocks = <&clock_audss EXYNOS_ADMA>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			#dma-channels = <6>;
+			#dma-requests = <16>;
+		};
+	};
+
 	serial at 12C00000 {
 		clocks = <&clock 257>, <&clock 128>;
 		clock-names = "uart", "clk_uart_baud0";
--
Quoted 1 line

1.7.4.4

See my comments on 1st patch and you need to re-spin for dmac on exynos5420.

Thanks,
Kukjin

#5 lore raw

cover Move comon DMA nodes to exynos5.dtsi and

In reply to Padmavathi Venna

Hi Kukjin,

Any comment on this patch set?
If not can you take into your tree?

Thanks
Padma

Quoted 17 lines · Padmavathi Venna

Exynos5250 and Exynos5420 has 4 DMA controllers in common. So this patch set moved the common nodes to exynos.dtsi keeping the clk info seperate for both the platforms. Exynos5420 has a separate DMA controller for audio IPs. So this patch set also adds the ADMA node on Exynos5420.

Padmavathi Venna (2):
ARM: dts: Move the common DMA controller nodes to exynos5.dtsi
ARM: dts: Add DMA controller node info on Exynos5420.

 arch/arm/boot/dts/exynos5.dtsi    |   44 +++++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/exynos5250.dtsi |   30 -------------------------
 arch/arm/boot/dts/exynos5420.dtsi |   33 +++++++++++++++++++++++++++
 3 files changed, 77 insertions(+), 30 deletions(-)

--
1.7.4.4