Skip to contentSkip to conversation

ppc32: Fix cpufreq problems

PATCH New Benjamin Herrenschmidt 1 participant 1 message Apr 5, 2005 PowerPC

lore
Share & tools
lore
#0 lore raw

PATCH 1/1 ppc32: Fix cpufreq problems

Hi Andrew !

This patch updates the PowerMac cpufreq driver. It depends on the addition of the suspend() method (my previous patch) and on the new flag I defined to silence some warnings that are normal for us.

It fixes various issues related to cpufreq on pmac, including some crashes on some models when sleeping the machine while in low speed, proper voltage control on some newer machines, and adds voltage control on 750FX based G3 laptops.

arch/ppc/platforms/pmac_feature.c +0 -26
Index: linux-work/arch/ppc/platforms/pmac_feature.c
===================================================================
@@ -1779,32 +1779,6 @@
 	if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
 		return -EPERM;
 
-#ifdef CONFIG_CPU_FREQ_PMAC
-	/* XXX should be elsewhere */
-	if (machine_is_compatible("PowerBook6,5") ||
-	    machine_is_compatible("PowerBook6,4") ||
-	    machine_is_compatible("PowerBook5,5") ||
-	    machine_is_compatible("PowerBook5,4")) {
-		struct device_node *volt_gpio_np;
-		u32 *reg = NULL;
-
-		volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
-		if (volt_gpio_np != NULL)
-			reg = (u32 *)get_property(volt_gpio_np, "reg", NULL);
-		if (reg != NULL) {
-			/* Set the CPU voltage high if sleeping */
-			if (value == 1) {
-				pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL,
-						  *reg, 0x05);
-			} else if (value == 0 && (mfspr(SPRN_HID1) & HID1_DFS)) {
-				pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL,
-						  *reg, 0x04);
-			}
-			mdelay(2);
-		}
-	}
-#endif /* CONFIG_CPU_FREQ_PMAC */
-
 	if (value == 1)
 		return core99_sleep();
 	else if (value == 0)
arch/ppc/platforms/pmac_cpufreq.c +191 -45

423 lines not on this page · raw message

include/asm-ppc/reg.h +1 -0
Index: linux-work/include/asm-ppc/reg.h
===================================================================
@@ -181,6 +181,7 @@
 #define HID1_PC3	(1<<13)		/* 7450 PLL_CFG[3] */
 #define HID1_SYNCBE	(1<<11)		/* 7450 ABE for sync, eieio */
 #define HID1_ABE	(1<<10)		/* 7450 Address Broadcast Enable */
+#define HID1_PS		(1<<16)		/* 750FX PLL selection */
 #define SPRN_HID2	0x3F8		/* Hardware Implementation Register 2 */
 #define SPRN_IABR	0x3F2	/* Instruction Address Breakpoint Register */
 #define SPRN_HID4	0x3F4		/* 970 HID4 */
arch/ppc/syslib/open_pic.c +1 -4
Index: linux-work/arch/ppc/syslib/open_pic.c
===================================================================
@@ -78,7 +78,6 @@
  */
 #ifdef notused
 static void openpic_enable_8259_pass_through(void);
-static u_int openpic_get_priority(void);
 static u_int openpic_get_spurious(void);
 static void openpic_set_sense(u_int irq, int sense);
 #endif /* notused */
@@ -465,8 +464,7 @@
 	(void)openpic_read(&OpenPIC->THIS_CPU.EOI);
 }
 
-#ifdef notused
-static u_int openpic_get_priority(void)
+u_int openpic_get_priority(void)
 {
 	DECL_THIS_CPU;
 
@@ -474,7 +472,6 @@
 	return openpic_readfield(&OpenPIC->THIS_CPU.Current_Task_Priority,
 				 OPENPIC_CURRENT_TASK_PRIORITY_MASK);
 }
-#endif /* notused */
 
 void openpic_set_priority(u_int pri)
 {
include/asm-ppc/open_pic.h +1 -0
Index: linux-work/include/asm-ppc/open_pic.h
===================================================================
@@ -56,6 +56,7 @@
 				     int wait);
 extern void openpic_set_k2_cascade(int irq);
 extern void openpic_set_priority(u_int pri);
+extern u_int openpic_get_priority(void);
 
 extern inline int openpic_to_irq(int irq)
 {