Add new MPC8548CDS board with DDR II

PATCH New Jon Loeliger 1 participant 1 message May 10, 2005

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Jon Loeliger

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2005-05-10 19:23 UTC #0 lore raw

PATCH 1/4 Add new MPC8548CDS board with DDR II

Wolfgang,

These 4 patch parts add support for the MPC8548CDS board. The primary new feature added here is support for DDR II through the use of SPD values. Applying these patches assumes the outstanding patches from me have already been applied as well.

Thanks!
jdl

* Patch by Jon Loeliger, 2005-05-05
- Implemented support for MPC8548CDS board.
- Added DDR II support based on SPD values for MPC85xx boards.

board/cds/mpc8541cds/mpc8541cds.c +2 -2

diff -Nru --exclude=CVS u-boot/board/cds/mpc8541cds/mpc8541cds.c u-boot-pq3/board/cds/mpc8541cds/mpc8541cds.c
@@ -32,7 +32,7 @@
 #include "../common/cadmus.h"
 #include "../common/eeprom.h"
 
-#if defined(CONFIG_DDR_ECC)
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 extern void ddr_enable_ecc(unsigned int dram_size);
 #endif

@@ -271,7 +271,7 @@
 #endif
 	dram_size = spd_sdram();
 
-#if defined(CONFIG_DDR_ECC)
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 	/*
 	 * Initialize and enable DDR ECC.
 	 */

board/cds/mpc8548cds/config.mk +30 -0

diff -Nru --exclude=CVS u-boot/board/cds/mpc8548cds/config.mk u-boot-pq3/board/cds/mpc8548cds/config.mk
@@ -0,0 +1,30 @@
+#
+# Copyright 2004 Freescale Semiconductor.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# mpc8548cds board
+#
+TEXT_BASE = 0xfff80000
+
+PLATFORM_CPPFLAGS += -DCONFIG_E500=1
+PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
+PLATFORM_CPPFLAGS += -DCONFIG_MPC8548=1

board/cds/mpc8548cds/init.S +255 -0

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board/cds/mpc8548cds/Makefile +51 -0

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board/cds/mpc8548cds/mpc8548cds.c +339 -0

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board/cds/mpc8548cds/u-boot.lds +147 -0

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board/cds/mpc8555cds/mpc8555cds.c +2 -2

diff -Nru --exclude=CVS u-boot/board/cds/mpc8555cds/mpc8555cds.c u-boot-pq3/board/cds/mpc8555cds/mpc8555cds.c
@@ -30,7 +30,7 @@
 #include "../common/cadmus.h"
 #include "../common/eeprom.h"
 
-#if defined(CONFIG_DDR_ECC)
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 extern void ddr_enable_ecc(unsigned int dram_size);
 #endif

@@ -269,7 +269,7 @@
 #endif
 	dram_size = spd_sdram();
 
-#if defined(CONFIG_DDR_ECC)
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 	/*
 	 * Initialize and enable DDR ECC.
 	 */

board/mpc8540ads/mpc8540ads.c +2 -2

diff -Nru --exclude=CVS u-boot/board/mpc8540ads/mpc8540ads.c u-boot-pq3/board/mpc8540ads/mpc8540ads.c
@@ -31,7 +31,7 @@
 #include <asm/immap_85xx.h>
 #include <spd.h>
 
-#if defined(CONFIG_DDR_ECC)
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 extern void ddr_enable_ecc(unsigned int dram_size);
 #endif

@@ -96,7 +96,7 @@
 	dram_size = fixed_sdram ();
 #endif
 
-#if defined(CONFIG_DDR_ECC)
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 	/*
 	 * Initialize and enable DDR ECC.
 	 */

board/mpc8560ads/mpc8560ads.c +2 -2

diff -Nru --exclude=CVS u-boot/board/mpc8560ads/mpc8560ads.c u-boot-pq3/board/mpc8560ads/mpc8560ads.c
@@ -33,7 +33,7 @@
 #include <spd.h>
 #include <miiphy.h>
 
-#if defined(CONFIG_DDR_ECC)
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 extern void ddr_enable_ecc(unsigned int dram_size);
 #endif

@@ -293,7 +293,7 @@
 	dram_size = fixed_sdram ();
 #endif
 
-#if defined(CONFIG_DDR_ECC)
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 	/*
 	 * Initialize and enable DDR ECC.
 	 */

cpu/mpc85xx/cpu.c +11 -3

diff -Nru --exclude=CVS u-boot/cpu/mpc85xx/cpu.c u-boot-pq3/cpu/mpc85xx/cpu.c
@@ -38,6 +38,7 @@
 	uint lcrr;		/* local bus clock ratio register */
 	uint clkdiv;		/* clock divider portion of lcrr */
 	uint pvr, svr;
+	uint fam;
 	uint ver;
 	uint major, minor;

@@ -60,6 +61,12 @@
 	case SVR_8560:
 		puts("8560");
 		break;
+	case SVR_8548:
+		puts("8548");
+		break;
+	case SVR_8548_E:
+		puts("8548_E");
+		break;
 	default:
 		puts("Unknown");
 		break;

@@ -67,13 +74,14 @@
 	printf(", Version: %d.%d, (0x%08x)\n", major, minor, svr);
 
 	pvr = get_pvr();
+	fam = PVR_FAM(pvr);
 	ver = PVR_VER(pvr);
 	major = PVR_MAJ(pvr);
 	minor = PVR_MIN(pvr);
 
 	printf("Core:  ");
-	switch (ver) {
-	case PVR_VER(PVR_85xx):
+	switch (fam) {
+	case PVR_FAM(PVR_85xx):
 	    puts("E500");
 	    break;
 	default:

@@ -84,7 +92,7 @@
 
 	get_sys_info(&sysinfo);
 
-	puts("Clocks Configuration:\n");
+	puts("Clock Configuration:\n");
 	printf("       CPU:%4lu MHz, ", sysinfo.freqProcessor / 1000000);
 	printf("CCB:%4lu MHz,\n", sysinfo.freqSystemBus / 1000000);
 	printf("       DDR:%4lu MHz, ", sysinfo.freqSystemBus / 2000000);

cpu/mpc85xx/cpu_init.c +29 ~~-13~~

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