about MPC 8XX SPI Driver

448 lines not on this page · raw message

new file mode 100644
@@ -0,0 +1,40 @@
+/*
+ * PRTPPC board definitions, loosely based on:
+ *   TQM8xx(L/M) board specific definitions
+ * 
+ * Author: David Jander <[email protected]>
+ *
+ * Copyright (c) 2005 Protonic Holland b.v.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __PRTPPC_H__
+#define __PRTPPC_H__
+
+#include <linux/config.h>
+
+#include <asm/ppcboot.h>
+
+#define BOARD_CHIP_NAME "MPC86X"
+
+#define	PRTPPC_IMMR_BASE	0xF8000000	/* phys. addr of IMMR */
+#define	PRTPPC_IMAP_SIZE	(64 * 1024)	/* size of mapped area */
+
+#define	IMAP_ADDR	PRTPPC_IMMR_BASE	/* physical base address of IMMR area */
+#define IMAP_SIZE	PRTPPC_IMAP_SIZE	/* mapped size of IMMR area */
+
+/* define IO_BASE for External bus devices */
+#define _IO_BASE        CONFIG_PRT_IOADDR
+#define _IO_BASE_SIZE  	CONFIG_PRT_IOSIZE
+
+#define	FEC_INTERRUPT		 9	/* = SIU_LEVEL4			*/
+
+/* We don't use the 8259.
+*/
+#define NR_8259_INTS	0
+
+#endif	/* __PRTPPC_H__ */

100 lines not on this page · raw message

88 lines not on this page · raw message

@@ -367,7 +367,7 @@ m8xx_map_io(void)
 #ifdef CONFIG_PCI
         io_block_mapping(PCI_CSR_ADDR, PCI_CSR_ADDR, PCI_CSR_SIZE, _PAGE_IO);
 #endif
-#if defined(CONFIG_NETTA)
+#if defined(CONFIG_NETTA) || defined (CONFIG_PRTPPC)
 	io_block_mapping(_IO_BASE,_IO_BASE,_IO_BASE_SIZE, _PAGE_IO);
 #endif
 }

@@ -365,6 +365,33 @@ struct isp116x_ep {
 #define	IRQ_TEST()	do{}while(0)
 #endif
 
+#if defined(CONFIG_PRTPPC)
+/* On the PRTPPC the ISP1160 is connected through an 8-bit bus via a CPLD
+ * which translates the 8-bit data to 16-bit back and forth.
+ * The UPM splits the 16-bit bus-cycles up into two 8-bit cycles.
+ * The only caveat is that on writing, we have to write to the higher address first
+ * and then to the lower address, while on reading it has to be done the other way around,
+ * that is first the lower address and then the higher address.
+ * So for reading we can use normal 16-bit read functions, while for writing,
+ * we just redefine (temporarily) writew() and __raw_writew() to these below.
+ */
+static void inline writew_hcd(unsigned int port,u16 data)
+{
+	out_8((volatile unsigned char __iomem *)(port | 0x00000001), (data>>8) & 0x00ff);
+	out_8((volatile unsigned char __iomem *)(port & 0xfffffffe), data & 0x00ff);
+}
+
+static void inline raw_writew_hcd(unsigned int port,u16 data)
+{
+	__raw_writeb(data & 0x00ff, (volatile unsigned char __iomem *)(port | 0x00000001));
+	__raw_writeb((data>>8) & 0x00ff, (volatile unsigned char __iomem *)(port & 0xfffffffe));
+}
+
+#define writew(b,a) 		writew_hcd((unsigned int)(a),b)
+#define __raw_writew(b,a) 	raw_writew_hcd((unsigned int)(a),b)
+
+#endif /* CONFIG_PRTPPC */
+
 static inline void isp116x_write_addr(struct isp116x *isp116x, unsigned reg)
 {
 	IRQ_TEST();

@@ -421,6 +448,11 @@ static inline u32 isp116x_read_data32(st
 	return val;
 }
 
+#if defined(CONFIG_PRTPPC)
+#undef writew
+#undef __raw_writew
+#endif /* CONFIG_PRTPPC */
+
 /* Let's keep register access functions out of line. Hint:
    we wait at least 150 ns at every access.
 */

340 lines not on this page · raw message

@@ -68,6 +68,10 @@
 #include <platforms/mpc885ads.h>
 #endif
 
+#if defined(CONFIG_PRTPPC)
+#include <platforms/prtppc.h>
+#endif
+
 /* Currently, all 8xx boards that support a processor to PCI/ISA bridge
  * use the same memory map.
  */

@@ -38,6 +38,8 @@
 #include <asm/mpc85xx.h>
 #elif defined(CONFIG_RADSTONE_PPC7D)
 #include <platforms/radstone_ppc7d.h>
+#elif defined(CONFIG_PRTPPC)
+#include <platforms/prtppc_serial.h>
 #else
 
 /*