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Fix mx31_decode_pll

PATCH New Benoît Thébaudeau 2 participants 2 messages Aug 14, 2012 – Sep 6, 2012 Arm (32-bit)

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Benoît Thébaudeau

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#0 lore raw

PATCH 1/1 Fix mx31_decode_pll

The MFN bit-field of the PLL registers represents a signed value. See the reference manual.

Signed-off-by Beno?t Th?baudeau <[email protected]>
Cc Stefano Babic <[email protected]>
---
 .../arch/arm/cpu/arm1136/mx31/generic.c            |    8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)
arch/arm/cpu/arm1136/mx31/generic.c +5 -3
index 8873fb7..3a35bfa 100644
@@ -22,6 +22,7 @@
  */
 
 #include <common.h>
+#include <div64.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
 #include <asm/io.h>

@@ -30,16 +31,17 @@
 static u32 mx31_decode_pll(u32 reg, u32 infreq)
 {
 	u32 mfi = GET_PLL_MFI(reg);
-	u32 mfn = GET_PLL_MFN(reg);
+	s32 mfn = GET_PLL_MFN(reg);
 	u32 mfd = GET_PLL_MFD(reg);
 	u32 pd =  GET_PLL_PD(reg);
 
 	mfi = mfi <= 5 ? 5 : mfi;
+	mfn = mfn >= 512 ? mfn - 1024 : mfn;
 	mfd += 1;
 	pd += 1;
 
-	return ((2 * (infreq >> 10) * (mfi * mfd + mfn)) /
-		(mfd * pd)) << 10;
+	return lldiv(2 * (u64)infreq * (mfi * mfd + mfn),
+		mfd * pd);
 }
 
 static u32 mx31_get_mpl_dpdgck_clk(void)
#1 lore raw

PATCH 1/1 Fix mx31_decode_pll

Quoted 6 lines · Beno?t Th?baudeau

The MFN bit-field of the PLL registers represents a signed value. See the reference manual.

Signed-off-by Beno?t Th?baudeau <[email protected]>
Cc Stefano Babic <[email protected]>

---

Applied to u-boot-imx, thanks.

Best regards,
Stefano Babic

Signature · 5 lines
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