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tpm: interrupt clear fix

PATCH NAK Kylene Jo Hall 3 participants 4 messages Jul 12, 2006 – Jul 13, 2006 TPM device driver

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#0 lore raw

PATCH 1/1 tpm: interrupt clear fix

Under stress testing I found that the interrupt is not always cleared. This is a bug and this patch should go into 2.6.18 and 2.6.17.x.

---

drivers/char/tpm/tpm_tis.c renamed from tpmdd/drivers/char/tpm/tpm_tis.c +1 -0
@@ -424,6 +424,7 @@ static irqreturn_t tis_int_handler(int i
 	iowrite32(interrupt,
 		  chip->vendor.iobase +
 		  TPM_INT_STATUS(chip->vendor.locality));
+	mb();
 	return IRQ_HANDLED;
 }
 
#1 lore raw

Ar Mer, 2006-07-12 am 14:01 -0700, ysgrifennodd Kylene Jo Hall:

drivers/char/tpm/tpm_tis.c static irqreturn_t tis_int_handler(int i · line 427

Quoted 12 lines

Under stress testing I found that the interrupt is not always cleared. This is a bug and this patch should go into 2.6.18 and 2.6.17.x.

---

drivers/char/tpm/tpm_tis.c renamed from tpmdd/drivers/char/tpm/tpm_tis.c +1 -0
@@ -424,6 +424,7 @@ static irqreturn_t tis_int_handler(int i
 	iowrite32(interrupt,
 		  chip->vendor.iobase +
 		  TPM_INT_STATUS(chip->vendor.locality));
+	mb();

NAK

This looks incorrect.

The iowrite32 will be posted for mmio. mb() may half hide the problem on some processors but you should read from the same PCI device as per the PCI spec.

#2 lore raw
In reply to Kylene Jo Hall
Quoted 8 lines · Kylene Jo Hall

Under stress testing I found that the interrupt is not always cleared. This is a bug and this patch should go into 2.6.18 and 2.6.17.x.

---

drivers/char/tpm/tpm_tis.c static irqreturn_t tis_int_handler(int i · line 429

Quoted 6 lines
drivers/char/tpm/tpm_tis.c renamed from tpmdd/drivers/char/tpm/tpm_tis.c +1 -0
@@ -424,6 +424,7 @@ static irqreturn_t tis_int_handler(int i
 	iowrite32(interrupt,
 		  chip->vendor.iobase +
 		  TPM_INT_STATUS(chip->vendor.locality));
+	mb();
 	return IRQ_HANDLED;
 }

PCI devices need a final read to flush all pending writes. Whatever mb() does, just hides the problem.

Cheers,
Dick Johnson
Penguin : Linux version 2.6.16.24 on an i686 machine (5592.63 BogoMips). New book: http://www.AbominableFirebug.com/
_


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#3 lore raw

Under stress testing I found that the interrupt is not always cleared. This is a bug and this patch should go into 2.6.18 and 2.6.17.x.

Quoted 2 lines · linux-os (Dick Johnson)

PCI devices need a final read to flush all pending writes. Whatever mb() does, just hides the problem.

---

drivers/char/tpm/tpm_tis.c +1 -0
@@ -424,6 +424,7 @@ static irqreturn_t tis_int_handler(int i
 	iowrite32(interrupt,
 		  chip->vendor.iobase +
 		  TPM_INT_STATUS(chip->vendor.locality));
+	ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality));
 	return IRQ_HANDLED;
 }