ldrex/strex syntax errors with recent compilers
PATCH 1/1 ldrex/strex syntax errors with recent compilers
Hi,
Trying to build a xenomai-enabled kernel using a recent compiler (tried with gcc version 4.1.1 (CodeSourcery ARM Sourcery G++ 2006q3-26), but all gcc > 4.1 might be affected) results in the following:
CC kernel/xenomai/nucleus/shadow.o/tmp/cc0XooxH.s: Assembler messages:/tmp/cc0XooxH.s:1464: Error: instruction does not accept this addressing mode -- ldrex r1,r2' /tmp/cc0XooxH.s:1466: Error: instruction does not accept this addressing mode -- strex r3,r1,r2'
Older gcc (like gcc version 4.0.0 (DENX ELDK 4.1 4.0.0)) have no problem with this.
It appears that the patch below fixes the compile error. I also verified that gcc-4.0.0 generates identical code using both forms.
asm-arm/atomic.h +6 -6
@@ -40,9 +40,9 @@unsigned long tmp, tmp2; __asm__ __volatile__("@ atomic_set_mask\n" -"1: ldrex %0, %2\n" +"1: ldrex %0, [%2]\n" " orr %0, %0, %3\n" -" strex %1, %0, %2\n" +" strex %1, %0, [%2]\n" " teq %1, #0\n" " bne 1b" : "=&r" (tmp), "=&r" (tmp2)
@@ -170,9 +170,9 @@unsigned long tmp, tmp2; __asm__ __volatile__("@ atomic_set_mask\n" -"1: ldrex %0, %2\n" +"1: ldrex %0, [%2]\n" " orr %0, %0, %3\n" -" strex %1, %0, %2\n" +" strex %1, %0, [%2]\n" " teq %1, #0\n" " bne 1b" : "=&r" (tmp), "=&r" (tmp2)
@@ -185,9 +185,9 @@unsigned long tmp, tmp2; __asm__ __volatile__("@ atomic_clear_mask\n" -"1: ldrex %0, %2\n" +"1: ldrex %0, [%2]\n" " bic %0, %0, %3\n" -" strex %1, %0, %2\n" +" strex %1, %0, [%2]\n" " teq %1, #0\n" " bne 1b" : "=&r" (tmp), "=&r" (tmp2)
Signature · 1 line
Stelian Pop <[email protected]>
PATCH 1/1 ldrex/strex syntax errors with recent compilers
Le jeudi 15 mars 2007 à 14:53 +0100, Stelian Pop a écrit :
[on xenomai-core ml]
Quoted 11 lines
Hi,
Trying to build a xenomai-enabled kernel using a recent compiler (tried with gcc version 4.1.1 (CodeSourcery ARM Sourcery G++ 2006q3-26), but all gcc > 4.1 might be affected) results in the following:
CC
kernel/xenomai/nucleus/shadow.o/tmp/cc0XooxH.s: Assembler messages:/tmp/cc0XooxH.s:1464: Error: instruction does not accept this addressing mode --ldrex r1,r2' /tmp/cc0XooxH.s:1466: Error: instruction does not accept this addressing mode --strex r3,r1,r2'
Quoted 4 lines
Older gcc (like gcc version 4.0.0 (DENX ELDK 4.1 4.0.0)) have no problem with this.
It appears that the patch below fixes the compile error. I also verified that gcc-4.0.0 generates identical code using both forms.
The same issue is present in the mainline kernel too. I'll report this on LKML but meanwhile the patch below could be included in the Adeos patch as well...
Thanks.
Stelian.
include/asm-arm/atomic.h +2 -2
@@ -103,9 +103,9 @@ static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)unsigned long tmp, tmp2; __asm__ __volatile__("@ atomic_clear_mask\n" -"1: ldrex %0, %2\n" +"1: ldrex %0, [%2]\n" " bic %0, %0, %3\n" -" strex %1, %0, %2\n" +" strex %1, %0, [%2]\n" " teq %1, #0\n" " bne 1b" : "=&r" (tmp), "=&r" (tmp2)
Signature · 1 line
Stelian Pop <[email protected]>
Gilles Chanteperdrix
AppliedQuoted 14 lines · Stelian Pop
Le jeudi 15 mars 2007 ~ 14:53 +0100, Stelian Pop a ~crit :
[on xenomai-core ml]
Quoted 11 lines
Hi,
Trying to build a xenomai-enabled kernel using a recent compiler (tried with gcc version 4.1.1 (CodeSourcery ARM Sourcery G++ 2006q3-26), but all gcc > 4.1 might be affected) results in the following:
CC
kernel/xenomai/nucleus/shadow.o/tmp/cc0XooxH.s: Assembler messages:/tmp/cc0XooxH.s:1464: Error: instruction does not accept this addressing mode --ldrex r1,r2' /tmp/cc0XooxH.s:1466: Error: instruction does not accept this addressing mode --strex r3,r1,r2'
Quoted 8 lines
Quoted 4 lines
Older gcc (like gcc version 4.0.0 (DENX ELDK 4.1 4.0.0)) have no problem with this.
It appears that the patch below fixes the compile error. I also verified that gcc-4.0.0 generates identical code using both forms.
The same issue is present in the mainline kernel too. I'll report this on LKML but meanwhile the patch below could be included in the Adeos patch as well...
Applied all your patches. Thanks.
Signature · 1 line
Gilles Chanteperdrix.
Quoted 2 lines · Stelian Pop
It appears that the patch below fixes the compile error. I also verified that gcc-4.0.0 generates identical code using both forms.
FWIW, the same fix at a different place in the mainline kernel has been acked by Catalin Marinas from ARM.
Ah, and the patch I submitted was against the 2.3.x branch although it will probably apply more or less cleanly on trunk.
Thanks,
Signature · 1 line
Stelian Pop <[email protected]>