ARM: OMAP: Updates for OMAP2 common code
Subsystems (7)
Tony Lindgren
maintainercover ARM: OMAP: Updates for OMAP2 common code
Hi,
The following patch series contains updates OMAP2 common code.
This is take #2 of the earlier 90 patch mountain, which has been split into six smaller series.
Regards,
Tony
Tony Lindgren
maintainerPATCH 1/18 ARM: OMAP2: Place SMS and SDRC into smart idle mode
From: Juha Yrjola <[email protected]>
Place SMS and SDRC into smart idle mode
Signed-off-by Juha Yrjola <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
--- arch/arm/mach-omap2/io.c | 2 + arch/arm/mach-omap2/memory.c | 48 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 50 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/io.c +2 -0
@@ -26,6 +26,7 @@extern void omap_sram_init (void );extern int omap2_clk_init (void );extern void omap2_check_revision (void ); +extern void omap2_init_memory (void );extern void gpmc_init (void );extern void omapfb_reserve_sdram (void );
@@ -80,5 +81,6 @@ void __init omap2_init_common_hw(void) {omap2_mux_init ();omap2_clk_init (); +omap2_init_memory ();gpmc_init (); }
arch/arm/mach-omap2/memory.c +48 -0
57 lines not on this page · raw message
Tony Lindgren
maintainerPATCH 2/18 ARM: OMAP2: Force APLLs always active
From: Juha Yrjola <[email protected]>
The APLLs are most efficiently idled by hardware.
Signed-off-by Juha Yrjola <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
--- arch/arm/mach-omap2/clock.c | 13 ++----------- 1 files changed, 2 insertions(+), 11 deletions(-)
arch/arm/mach-omap2/clock.c +2 -11
@@ -1160,8 +1160,8 @@ int __init omap2_clk_init(void)clk_enable (&sync_32k_ick);clk_enable (&omapctrl_ick); -/* Force the APLLs active during bootup to avoid disabling and -* enabling them unnecessarily. */ +/* Force the APLLs always active. The clocks are idled +* automatically by hardware. */ clk_enable (&apll96_ck);clk_enable (&apll54_ck);
@@ -1174,12 +1174,3 @@ int __init omap2_clk_init(void)return 0 ; } - -static int __init omap2_disable_aplls (void ) -{ -clk_disable (&apll96_ck); -clk_disable (&apll54_ck); - -return 0 ; -} -late_initcall (omap2_disable_aplls);
Signature · 1 line
1.4.4.2
Tony Lindgren
maintainerPATCH 3/18 ARM: OMAP: Enable serial idling and wakeup features
From: Juha Yrjola <[email protected]>
Enable serial idling and wakeup features
Signed-off-by Juha Yrjola <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
--- arch/arm/mach-omap2/serial.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-omap2/serial.c +1 -1
@@ -84,7 +84,7 @@ static inline void __init omap_serial_reset(struct plat_serial8250_port *p)serial_write_reg (p,UART_OMAP_MDR1 ,0x07 );serial_write_reg (p,UART_OMAP_SCR ,0x08 );serial_write_reg (p,UART_OMAP_MDR1 ,0x00 ); -serial_write_reg (p,UART_OMAP_SYSC ,0x01 ); +serial_write_reg (p,UART_OMAP_SYSC , (0x02 <<3 ) | (1 <<2 ) | (1 <<0 )); }void __init omap_serial_init ()
Signature · 1 line
1.4.4.2
Tony Lindgren
maintainerPATCH 4/18 ARM: OMAP: Optimize INTC register accesses and enable autoidling
From: Juha Yrjola <[email protected]>
Use virtual addresses directly instead of physical addresses to avoid having to recalculate the virtual address with every register access.
Signed-off-by Juha Yrjola <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
--- arch/arm/mach-omap2/irq.c | 19 +++++++++++-------- 1 files changed, 11 insertions(+), 8 deletions(-)
arch/arm/mach-omap2/irq.c +11 -8
@@ -37,7 +37,7 @@ static struct omap_irq_bank { } __attribute__ ((aligned(4))) irq_banks[] = { {/* MPU INTC */ - .base_reg =OMAP24XX_IC_BASE , + .base_reg =IO_ADDRESS (OMAP24XX_IC_BASE ), .nr_irqs =96 , }, {/* XXX: DSP INTC */
@@ -47,7 +47,7 @@ static struct omap_irq_bank {/* XXX: FIQ and additional INTC support (only MPU at the moment) */ static void omap_ack_irq (unsigned int irq) { -omap_writel (0x1 , irq_banks[0 ].base_reg +INTC_CONTROL ); +__raw_writel (0x1 , irq_banks[0 ].base_reg +INTC_CONTROL ); }static void omap_mask_irq (unsigned int irq)
@@ -60,7 +60,7 @@ static void omap_mask_irq(unsigned int irq) irq %=32 ; } -omap_writel (1 << irq, irq_banks[0 ].base_reg +INTC_MIR_SET0 + offset); +__raw_writel (1 << irq, irq_banks[0 ].base_reg +INTC_MIR_SET0 + offset); }static void omap_unmask_irq (unsigned int irq)
@@ -73,7 +73,7 @@ static void omap_unmask_irq(unsigned int irq) irq %=32 ; } -omap_writel (1 << irq, irq_banks[0 ].base_reg +INTC_MIR_CLEAR0 + offset); +__raw_writel (1 << irq, irq_banks[0 ].base_reg +INTC_MIR_CLEAR0 + offset); }static void omap_mask_ack_irq (unsigned int irq)
@@ -93,17 +93,20 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank) {unsigned long tmp; - tmp =omap_readl (bank->base_reg +INTC_REVISION ) &0xff ; + tmp =__raw_readl (bank->base_reg +INTC_REVISION ) &0xff ;printk (KERN_INFO "IRQ: Found an INTC at 0x%08lx " "(revision %ld.%ld) with %d interrupts\n" , bank->base_reg, tmp >>4 , tmp &0xf , bank->nr_irqs); - tmp =omap_readl (bank->base_reg +INTC_SYSCONFIG ); + tmp =__raw_readl (bank->base_reg +INTC_SYSCONFIG ); tmp |=1 <<1 ;/* soft reset */ -omap_writel (tmp, bank->base_reg +INTC_SYSCONFIG ); +__raw_writel (tmp, bank->base_reg +INTC_SYSCONFIG ); -while (!(omap_readl (bank->base_reg +INTC_SYSSTATUS ) &0x1 )) +while (!(__raw_readl (bank->base_reg +INTC_SYSSTATUS ) &0x1 ))/* Wait for reset to complete */ ; + +/* Enable autoidle */ +__raw_writel (1 <<0 , bank->base_reg +INTC_SYSCONFIG ); }void __init omap_init_irq (void )
Signature · 1 line
1.4.4.2
Tony Lindgren
maintainerPATCH 5/18 ARM: OMAP: Board Apollon update, fix boot
From: Kyungmin Park <[email protected]>
Update Apollon board init to initialize NAND, USB, and LEDs. Also configure GPMC memory for smc91x Ethernet.
Signed-off-by Kyungmin Park <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
--- arch/arm/mach-omap2/board-apollon.c | 99 +++++++++++++++++++++++++++++++--- 1 files changed, 90 insertions(+), 9 deletions(-)
arch/arm/mach-omap2/board-apollon.c +90 -9
@@ -25,6 +25,8 @@#include <linux/irq.h> #include <linux/interrupt.h> #include <linux/delay.h> +#include <linux/leds.h> +#include <linux/irq.h> #include <asm/hardware.h> #include <asm/mach-types.h>
@@ -32,10 +34,12 @@#include <asm/mach/flash.h> #include <asm/arch/gpio.h> +#include <asm/arch/led.h> #include <asm/arch/mux.h> #include <asm/arch/usb.h> #include <asm/arch/board.h> #include <asm/arch/common.h> +#include <asm/arch/gpmc.h> #include "prcm-regs.h" /* LED & Switch macros */
@@ -46,6 +50,9 @@#define SW_UP_GPIO17 17#define SW_DOWN_GPIO58 58 +#define APOLLON_FLASH_CS 0 +#define APOLLON_ETH_CS 1 +static struct mtd_partition apollon_partitions[] = { { .name ="X-Loader + U-Boot" ,
@@ -85,10 +92,10 @@ static struct flash_platform_data apollon_flash_data = { .nr_parts = ARRAY_SIZE(apollon_partitions), }; -static struct resource apollon_flash_resource = { - .start =APOLLON_CS0_BASE , - .end =APOLLON_CS0_BASE +SZ_128K , - .flags =IORESOURCE_MEM , +static struct resource apollon_flash_resource[] = { + [0 ] = { + .flags =IORESOURCE_MEM , + }, };static struct platform_device apollon_onenand_device = {
@@ -97,14 +104,24 @@ static struct platform_device apollon_onenand_device = { .dev = { .platform_data = &apollon_flash_data, }, - .num_resources = ARRAY_SIZE(&apollon_flash_resource), - .resource = &apollon_flash_resource, + .num_resources = ARRAY_SIZE(apollon_flash_resource), + .resource = apollon_flash_resource, }; +static void __init apollon_flash_init (void ) +{ +unsigned long base; + +if (gpmc_cs_request (APOLLON_FLASH_CS ,SZ_128K , &base) <0 ) { +printk (KERN_ERR "Cannot request OneNAND GPMC CS\n" ); +return ; + } + apollon_flash_resource[0 ].start = base; + apollon_flash_resource[0 ].end = base +SZ_128K -1 ; +} +static struct resource apollon_smc91x_resources[] = { [0 ] = { - .start =APOLLON_ETHR_START ,/* Physical */ - .end =APOLLON_ETHR_START +0xf , .flags =IORESOURCE_MEM , }, [1 ] = {
@@ -126,14 +143,51 @@ static struct platform_device apollon_lcd_device = { .id = -1, }; +static struct omap_led_config apollon_led_config[] = { + { + .cdev = { + .name ="apollon:led0" , + }, + .gpio =LED0_GPIO13 , + }, + { + .cdev = { + .name ="apollon:led1" , + }, + .gpio =LED1_GPIO14 , + }, + { + .cdev = { + .name ="apollon:led2" , + }, + .gpio =LED2_GPIO15 , + }, +}; + +static struct omap_led_platform_data apollon_led_data = { + .nr_leds =ARRAY_SIZE (apollon_led_config), + .leds = apollon_led_config, +}; + +static struct platform_device apollon_led_device = { + .name ="omap-led" , + .id =-1 , + .dev = { + .platform_data = &apollon_led_data, + }, +}; +static struct platform_device *apollon_devices[]__initdata = { &apollon_onenand_device, &apollon_smc91x_device, &apollon_lcd_device, + &apollon_led_device, };static inline void __init apollon_init_smc91x (void ) { +unsigned long base; +/* Make sure CS1 timings are correct */ GPMC_CONFIG1_1 =0x00011203 ;GPMC_CONFIG2_1 =0x001f1f01 ;
@@ -141,13 +195,20 @@ static inline void __init apollon_init_smc91x(void)GPMC_CONFIG4_1 =0x1c091c09 ;GPMC_CONFIG5_1 =0x041f1f1f ;GPMC_CONFIG6_1 =0x000004c4 ; -GPMC_CONFIG7_1 =0x00000f40 | (APOLLON_CS1_BASE >>24 ); + +if (gpmc_cs_request (APOLLON_ETH_CS ,SZ_16M , &base) <0 ) { +printk (KERN_ERR "Failed to request GPMC CS for smc91x\n" ); +return ; + } + apollon_smc91x_resources[0 ].start = base +0x300 ; + apollon_smc91x_resources[0 ].end = base +0x30f ;udelay (100 );omap_cfg_reg (W4__24XX_GPIO74 );if (omap_request_gpio (APOLLON_ETHR_GPIO_IRQ ) <0 ) {printk (KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n" ,APOLLON_ETHR_GPIO_IRQ ); +gpmc_cs_free (APOLLON_ETH_CS );return ; }omap_set_gpio_direction (APOLLON_ETHR_GPIO_IRQ ,1 );
@@ -175,6 +236,13 @@ static struct omap_mmc_config apollon_mmc_config __initdata = { }, }; +static struct omap_usb_config apollon_usb_config__initdata = { + .register_dev =1 , + .hmc_mode =0x14 ,/* 0:dev 1:host1 2:disable */ + + .pins[0 ] =6 , +}; +static struct omap_lcd_config apollon_lcd_config__initdata = { .ctrl_name ="internal" , };
@@ -182,6 +250,7 @@ static struct omap_lcd_config apollon_lcd_config __initdata = {static struct omap_board_config_kernel apollon_config[] = { {OMAP_TAG_UART , &apollon_uart_config }, {OMAP_TAG_MMC , &apollon_mmc_config }, + {OMAP_TAG_USB , &apollon_usb_config }, {OMAP_TAG_LCD , &apollon_lcd_config }, };
@@ -250,10 +319,22 @@ static void __init apollon_sw_init(void)return ; } +static void __init apollon_usb_init (void ) +{ +/* USB device */ +/* DEVICE_SUSPEND */ +omap_cfg_reg (P21_242X_GPIO12 ); +omap_request_gpio (12 ); +omap_set_gpio_direction (12 ,0 );/* OUT */ +omap_set_gpio_dataout (12 ,0 ); +} +static void __init omap_apollon_init (void ) {apollon_led_init ();apollon_sw_init (); +apollon_flash_init (); +apollon_usb_init ();/* REVISIT: where's the correct place */ omap_cfg_reg (W19_24XX_SYS_NIRQ );
Signature · 1 line
1.4.4.2
Tony Lindgren
maintainerPATCH 6/18 ARM: OMAP: omap2/memory.c compile fixes
From: David Brownell <[email protected]>
Remove some conflicting declarations in omap2/memory.c so that the file builds again.
Signed-off-by David Brownell <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
--- arch/arm/mach-omap2/memory.c | 40 +++++----------------------------------- 1 files changed, 5 insertions(+), 35 deletions(-)
arch/arm/mach-omap2/memory.c +5 -35
@@ -30,37 +30,6 @@#include "prcm-regs.h" #include "memory.h" -#define SMS_BASE 0x68008000 -#define SMS_SYSCONFIG 0x010 - -#define SDRC_BASE 0x68009000 -#define SDRC_SYSCONFIG 0x010 -#define SDRC_SYSSTATUS 0x014 - -static const u32 sms_base =IO_ADDRESS (SMS_BASE ); -static const u32 sdrc_base =IO_ADDRESS (SDRC_BASE ); - - -static inline void sms_write_reg (int idx,u32 val) -{ -__raw_writel (val, sms_base + idx); -} - -static inline u32 sms_read_reg (int idx) -{ -return __raw_readl (sms_base + idx); -} - -static inline void sdrc_write_reg (int idx,u32 val) -{ -__raw_writel (val, sdrc_base + idx); -} - -static inline u32 sdrc_read_reg (int idx) -{ -return __raw_readl (sdrc_base + idx); -} -static struct memory_timings mem_timings;
@@ -132,18 +101,19 @@ void omap2_init_memory_params(u32 force_lock_to_unlock_mode) mem_timings.slow_dll_ctrl |= ((1 <<1 ) | (3 <<8 )); } +/* turn on smart idle modes for SDRAM scheduler and controller */ void __init omap2_init_memory (void ) {u32 l; - l =sms_read_reg (SMS_SYSCONFIG ); + l =SMS_SYSCONFIG ; l &= ~(0x3 <<3 ); l |= (0x2 <<3 ); -sms_write_reg (SMS_SYSCONFIG , l); +SMS_SYSCONFIG = l; - l =sdrc_read_reg (SDRC_SYSCONFIG ); + l =SDRC_SYSCONFIG ; l &= ~(0x3 <<3 ); l |= (0x2 <<3 ); -sdrc_write_reg (SDRC_SYSCONFIG , l); +SDRC_SYSCONFIG = l; }
Signature · 1 line
1.4.4.2
Tony Lindgren
maintainerPATCH 7/18 ARM: OMAP: 24xx pinmux updates
From: Kyungmin Park <[email protected]>
Add some OMAP 24xx pin mux declarations to support:
- TUSB 6010 EVM (on H4)
- All three full speed USB ports
- GPIOs used with USB0 on Apollon and H4
For OMAP2, issue MUX_WARNINGS and debug messages correctly; and make the message look more like the OMAP1 message.
Signed-off-by Kyungmin Park <[email protected]>
Signed-off-by David Brownell <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
--- arch/arm/mach-omap2/mux.c | 33 +++++++++++++++++++++++++++++++-- arch/arm/plat-omap/mux.c | 19 +++++++++++++++---- include/asm-arm/arch-omap/mux.h | 31 ++++++++++++++++++++++++++++++- 3 files changed, 76 insertions(+), 7 deletions(-)
arch/arm/mach-omap2/mux.c +31 -2
@@ -43,7 +43,7 @@ struct pin_config __initdata_or_module o/* 24xx I2C */ MUX_CFG_24XX("M19_24XX_I2C1_SCL", 0x111, 0, 0, 0, 1) MUX_CFG_24XX("L15_24XX_I2C1_SDA", 0x112, 0, 0, 0, 1) -MUX_CFG_24XX("J15_24XX_I2C2_SCL", 0x113, 0, 0, 0, 1) +MUX_CFG_24XX("J15_24XX_I2C2_SCL", 0x113, 0, 0, 1, 1)MUX_CFG_24XX ("H19_24XX_I2C2_SDA" ,0x114 ,0 ,0 ,0 ,1 )/* Menelaus interrupt */
@@ -52,7 +52,9 @@ MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c,/* 24xx clocks */ MUX_CFG_24XX ("W14_24XX_SYS_CLKOUT" ,0x137 ,0 ,1 ,1 ,1 ) -/* 24xx GPMC wait pin monitoring */ +/* 24xx GPMC chipselects, wait pin monitoring */ +MUX_CFG_24XX("E2_GPMC_NCS2", 0x08e, 0, 1, 1, 1) +MUX_CFG_24XX("L2_GPMC_NCS7", 0x093, 0, 1, 1, 1) MUX_CFG_24XX("L3_GPMC_WAIT0", 0x09a, 0, 1, 1, 1) MUX_CFG_24XX("N7_GPMC_WAIT1", 0x09b, 0, 1, 1, 1)MUX_CFG_24XX ("M1_GPMC_WAIT2" ,0x09c ,0 ,1 ,1 ,1 )
@@ -66,6 +68,7 @@ MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127/* 24xx GPIO */ MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1) +MUX_CFG_24XX("P21_242X_GPIO12", 0x0ca, 3, 0, 0, 1) MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1) MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1)MUX_CFG_24XX ("AA4_242X_GPIO15" ,0x0e7 ,3 ,0 ,0 ,1 )
@@ -75,7 +78,9 @@ MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1) MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1) MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1) +MUX_CFG_24XX("J15_24XX_GPIO99", 0x113, 3, 1, 1, 1) MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1) +MUX_CFG_24XX ("P14_24XX_GPIO125" ,0x140 ,3 ,1 ,1 ,1 ) /* 242x DBG GPIO */MUX_CFG_24XX ("V4_242X_GPIO49" ,0xd3 ,3 ,0 ,0 ,1 )
@@ -118,6 +123,30 @@ MUX_CFG_24XX("E18_24XX_MMC_DAT_DIR3", 0x MUX_CFG_24XX("G18_24XX_MMC_CMD_DIR", 0x0fd, 0, 0, 0, 1)MUX_CFG_24XX ("H15_24XX_MMC_CLKI" ,0x0fe ,0 ,0 ,0 ,1 ) +/* Full speed USB */ +MUX_CFG_24XX("J20_24XX_USB0_PUEN", 0x11d, 0, 0, 0, 1) +MUX_CFG_24XX("J19_24XX_USB0_VP", 0x11e, 0, 0, 0, 1) +MUX_CFG_24XX("K20_24XX_USB0_VM", 0x11f, 0, 0, 0, 1) +MUX_CFG_24XX("J18_24XX_USB0_RCV", 0x120, 0, 0, 0, 1) +MUX_CFG_24XX("K19_24XX_USB0_TXEN", 0x121, 0, 0, 0, 1) +MUX_CFG_24XX("J14_24XX_USB0_SE0", 0x122, 0, 0, 0, 1) +MUX_CFG_24XX("K18_24XX_USB0_DAT", 0x123, 0, 0, 0, 1) + +MUX_CFG_24XX("N14_24XX_USB1_SE0", 0x0ed, 2, 0, 0, 1) +MUX_CFG_24XX("W12_24XX_USB1_SE0", 0x0dd, 3, 0, 0, 1) +MUX_CFG_24XX("P15_24XX_USB1_DAT", 0x0ee, 2, 0, 0, 1) +MUX_CFG_24XX("R13_24XX_USB1_DAT", 0x0e0, 3, 0, 0, 1) +MUX_CFG_24XX("W20_24XX_USB1_TXEN", 0x0ec, 2, 0, 0, 1) +MUX_CFG_24XX("P13_24XX_USB1_TXEN", 0x0df, 3, 0, 0, 1) +MUX_CFG_24XX("V19_24XX_USB1_RCV", 0x0eb, 2, 0, 0, 1) +MUX_CFG_24XX("V12_24XX_USB1_RCV", 0x0de, 3, 0, 0, 1) + +MUX_CFG_24XX("AA10_24XX_USB2_SE0", 0x0e5, 2, 0, 0, 1) +MUX_CFG_24XX("Y11_24XX_USB2_DAT", 0x0e8, 2, 0, 0, 1) +MUX_CFG_24XX("AA12_24XX_USB2_TXEN", 0x0e9, 2, 0, 0, 1) +MUX_CFG_24XX("AA6_24XX_USB2_RCV", 0x0e6, 2, 0, 0, 1) +MUX_CFG_24XX ("AA4_24XX_USB2_TLLSE0" ,0x0e7 ,2 ,0 ,0 ,1 ) + /* Keypad GPIO*/ MUX_CFG_24XX("T19_24XX_KBR0", 0x106, 3, 1, 1, 1)MUX_CFG_24XX ("R19_24XX_KBR1" ,0x107 ,3 ,1 ,1 ,1 )
arch/arm/plat-omap/mux.c +15 -4
@@ -83,10 +83,21 @@ int __init_or_module omap_cfg_reg(const reg |=OMAP24XX_PULL_ENA ;if (cfg->pu_pd_val) reg |=OMAP24XX_PULL_UP ; -#ifdef CONFIG_OMAP_MUX_DEBUG -printk ("Muxing %s (0x%08x): 0x%02x -> 0x%02x\n" , - cfg->name,OMAP24XX_L4_BASE + cfg->mux_reg, -omap_readb (OMAP24XX_L4_BASE + cfg->mux_reg), reg); +#if defined(CONFIG_OMAP_MUX_DEBUG ) || defined(CONFIG_OMAP_MUX_WARNINGS ) + { +u8 orig =omap_readb (OMAP24XX_L4_BASE + cfg->mux_reg); +u8 debug =0 ; + +#ifdef CONFIG_OMAP_MUX_DEBUG + debug = cfg->debug; +#endif + warn = (orig != reg); +if (debug || warn) +printk ("MUX: setup %s (0x%08x): 0x%02x -> 0x%02x\n" , + cfg->name, +OMAP24XX_L4_BASE + cfg->mux_reg, + orig, reg); + }#endif omap_writeb (reg,OMAP24XX_L4_BASE + cfg->mux_reg);
include/asm-arm/arch-omap/mux.h +30 -1
@@ -444,7 +444,9 @@ enum omap24xx_index {/* 24xx clock */ W14_24XX_SYS_CLKOUT , -/* 24xx GPMC wait pin monitoring */ +/* 24xx GPMC chipselects, wait pin monitoring */ +E2_GPMC_NCS2 , +L2_GPMC_NCS7 ,L3_GPMC_WAIT0 ,N7_GPMC_WAIT1 , M1_GPMC_WAIT2,
@@ -458,6 +460,7 @@ enum omap24xx_index {/* 24xx GPIO */ M21_242X_GPIO11 , +P21_242X_GPIO12 ,AA10_242X_GPIO13 ,AA6_242X_GPIO14 , AA4_242X_GPIO15,
@@ -467,7 +470,9 @@ enum omap24xx_index {Y20_24XX_GPIO60 ,W4__24XX_GPIO74 ,M15_24XX_GPIO92 , +J15_24XX_GPIO99 ,V14_24XX_GPIO117 , +P14_24XX_GPIO125 ,/* 242x DBG GPIO */ V4_242X_GPIO49,
@@ -509,6 +514,30 @@ enum omap24xx_index {G18_24XX_MMC_CMD_DIR ,H15_24XX_MMC_CLKI , +/* Full speed USB */ +J20_24XX_USB0_PUEN , +J19_24XX_USB0_VP , +K20_24XX_USB0_VM , +J18_24XX_USB0_RCV , +K19_24XX_USB0_TXEN , +J14_24XX_USB0_SE0 , +K18_24XX_USB0_DAT , + +N14_24XX_USB1_SE0 , +W12_24XX_USB1_SE0 , +P15_24XX_USB1_DAT , +R13_24XX_USB1_DAT , +W20_24XX_USB1_TXEN , +P13_24XX_USB1_TXEN , +V19_24XX_USB1_RCV , +V12_24XX_USB1_RCV , + +AA10_24XX_USB2_SE0 , +Y11_24XX_USB2_DAT , +AA12_24XX_USB2_TXEN , +AA6_24XX_USB2_RCV , +AA4_24XX_USB2_TLLSE0 , +/* Keypad GPIO*/ T19_24XX_KBR0 , R19_24XX_KBR1,
Tony Lindgren
maintainerPATCH 8/18 ARM: OMAP: omap2/gpmc updates
From: David Brownell <[email protected]>
GPMC updates:
- bugfixes: wrong/missing flags, omitted write, wrong test
- don't map memory segments starting at zero
- improve debug messaging
- export gpmc_get_fclk_perio]d() since it's needed to calc timings
- expect gpmc_cs_set_timings() caller to have initialized sync vs async
Note that this API is glitchy; likely the best fix would be to add a member to "struct gpmc_timings" to hold GPMC_CONFIG1, since that holds one key aspect of the GPMC timings (the gpmc_fclk divisor, and sync vs. async == whether that divisor matters).
Signed-off-by David Brownell <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
--- arch/arm/mach-omap2/gpmc.c | 33 ++++++++++++++++++++++----------- include/asm-arm/arch-omap/gpmc.h | 3 ++- 2 files changed, 24 insertions(+), 12 deletions(-)
arch/arm/mach-omap2/gpmc.c +22 -11
@@ -88,7 +88,7 @@ u32 gpmc_cs_read_reg(int cs, int idx) }/* TODO: Add support for gpmc_fck to clock framework and use it */ -static unsigned long gpmc_get_fclk_period (void ) +unsigned long gpmc_get_fclk_period (void ) {/* In picoseconds */ return 1000000000 / ((clk_get_rate (gpmc_l3_clk)) /1000 );
@@ -120,15 +120,21 @@ static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,else ticks =gpmc_ns_to_ticks (time); nr_bits = end_bit - st_bit +1 ; -if (ticks >=1 << nr_bits) +if (ticks >=1 << nr_bits) { +#ifdef DEBUG +printk (KERN_INFO "GPMC CS%d: %-10s* %3d ns, %3d ticks >= %d\n" , + cs, name, time, ticks,1 << nr_bits); +#endif return -1 ; + } mask = (1 << nr_bits) -1 ; l =gpmc_cs_read_reg (cs, reg);#ifdef DEBUG -printk (KERN_INFO "GPMC CS%d: %-10s: %d ticks, %3lu ns (was %i ticks)\n" , +printk (KERN_INFO +"GPMC CS%d: %-10s: %3d ticks, %3lu ns (was %3i ticks) %3d ns\n" , cs, name, ticks,gpmc_get_fclk_period () * ticks /1000 , - (l >> st_bit) & mask); + (l >> st_bit) & mask, time);#endif l &= ~(mask << st_bit); l |= ticks << st_bit;
@@ -157,7 +163,7 @@ int gpmc_cs_calc_divider(int cs, unsigned int sync_clk) div = l /gpmc_get_fclk_period ();if (div >4 )return -1 ; -if (div <0 ) +if (div <=0 ) div =1 ;return div;
@@ -191,14 +197,19 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t)GPMC_SET_ONE (GPMC_CS_CONFIG5 ,24 ,27 , page_burst_access); +/* caller is expected to have initialized CONFIG1 to cover +* at least sync vs async +*/ + l =gpmc_cs_read_reg (cs,GPMC_CS_CONFIG1 ); +if (l & (GPMC_CONFIG1_READTYPE_SYNC |GPMC_CONFIG1_WRITETYPE_SYNC )) {#ifdef DEBUG -printk (KERN_INFO "GPMC CS%d CLK period is %lu (div %d)\n" , - cs,gpmc_get_fclk_period (), div); +printk (KERN_INFO "GPMC CS%d CLK period is %lu ns (div %d)\n" , + cs, (div *gpmc_get_fclk_period ()) /1000 , div);#endif - - l =gpmc_cs_read_reg (cs,GPMC_CS_CONFIG1 ); - l &= ~0x03 ; - l |= (div -1 ); + l &= ~0x03 ; + l |= (div -1 ); +gpmc_cs_write_reg (cs,GPMC_CS_CONFIG1 , l); + }return 0 ; }
include/asm-arm/arch-omap/gpmc.h +2 -1
@@ -23,9 +23,10 @@#define GPMC_CS_NAND_DATA 0x24#define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31) -#define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 20) +#define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30)#define GPMC_CONFIG1_READTYPE_ASYNC (0 << 29)#define GPMC_CONFIG1_READTYPE_SYNC (1 << 29) +#define GPMC_CONFIG1_WRITEMULTIPLE_SUPP (1 << 28)#define GPMC_CONFIG1_WRITETYPE_ASYNC (0 << 27)#define GPMC_CONFIG1_WRITETYPE_SYNC (1 << 27)#define GPMC_CONFIG1_CLKACTIVATIONTIME (val) ((val & 3) << 25)
Signature · 1 line
1.4.4.2
Tony Lindgren
maintainerPATCH 9/18 ARM: OMAP: abstract debug card setup (smc, leds)
From: David Brownell <[email protected]>
Additional cleanup for debug boards on H2/P2/H3/H4: move the init code that's not board-specific into a new file where it can be easily shared between all the different boards (avoiding code duplication, and making it easier to support more devices). Make H4 use that.
This should be easy to drop in to the OMAP1 boards using these debug cards; the only difference seems to be that the p2 does an extra reset of the smc using the fpga (probably all boards could do that, if it's necessary) and doesn't use the gpio mux or request APIs.
Signed-off-by David Brownell <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
--- arch/arm/mach-omap2/Kconfig | 2 +- arch/arm/mach-omap2/board-h4.c | 46 +------------------ arch/arm/plat-omap/Kconfig | 9 +++- arch/arm/plat-omap/Makefile | 1 + arch/arm/plat-omap/debug-devices.c | 86 ++++++++++++++++++++++++++++++++++++ include/asm-arm/arch-omap/board.h | 4 ++ 6 files changed, 102 insertions(+), 46 deletions(-)
arch/arm/mach-omap2/Kconfig +1 -1
@@ -21,7 +21,7 @@ config MACH_OMAP_GENERIC config MACH_OMAP_H4 bool "OMAP 2420 H4 board" depends on ARCH_OMAP2 && ARCH_OMAP24XX - select OMAP_DEBUG_LEDS if LEDS || LEDS_OMAP_DEBUG + select OMAP_DEBUG_DEVICES config MACH_OMAP_APOLLON bool "OMAP 2420 Apollon board"
arch/arm/mach-omap2/board-h4.c +3 -43
77 lines not on this page · raw message
arch/arm/plat-omap/Kconfig +7 -2
@@ -19,10 +19,15 @@ endchoice comment "OMAP Feature Selections" -config OMAP_DEBUG_LEDS +config OMAP_DEBUG_DEVICES bool help - For debug card leds on TI reference boards. + For debug cards on TI reference boards. + +config OMAP_DEBUG_LEDS + bool + depends on OMAP_DEBUG_DEVICES + default y if LEDS || LEDS_OMAP_DEBUG config OMAP_RESET_CLOCKS bool "Reset unused clocks during boot"
arch/arm/plat-omap/Makefile +1 -0
@@ -17,4 +17,5 @@ obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o obj-$(CONFIG_CPU_FREQ) += cpu-omap.o obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o +obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
arch/arm/plat-omap/debug-devices.c new file +86 -0
86 lines not on this page · raw message
include/asm-arm/arch-omap/board.h +4 -0
@@ -179,4 +179,8 @@ extern const void *omap_get_var_config(uextern struct omap_board_config_kernel *omap_board_config;extern int omap_board_config_size; + +/* for TI reference platforms sharing the same debug card */ +extern int debug_card_init (u32 addr,unsigned gpio); +#endif
Tony Lindgren
maintainerPATCH 10/18 ARM: OMAP: Add minimal OMAP2430 support
From: Syed Mohammed Khasim <[email protected]>
This patch adds minimal OMAP2430 support to get the kernel booting on 2430SDP.
Signed-off-by Syed Mohammed Khasim <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
--- arch/arm/mach-omap2/Kconfig | 8 + arch/arm/mach-omap2/Makefile | 1 + arch/arm/mach-omap2/board-2430sdp.c | 226 +++++++++++++++++++++++++++++ arch/arm/mach-omap2/devices.c | 2 +- arch/arm/mach-omap2/gpmc.c | 7 + arch/arm/mach-omap2/id.c | 6 + arch/arm/mach-omap2/io.c | 20 +++ include/asm-arm/arch-omap/board-2430sdp.h | 41 +++++ include/asm-arm/arch-omap/hardware.h | 4 + include/asm-arm/arch-omap/io.h | 10 ++ include/asm-arm/arch-omap/omap24xx.h | 12 ++ 12 files changed, 337 insertions(+), 1 deletions(-)
arch/arm/mach-omap2/Kconfig +8 -0
@@ -11,6 +11,10 @@ config ARCH_OMAP2420 select OMAP_DM_TIMER select ARCH_OMAP_OTG +config ARCH_OMAP2430 + bool "OMAP2430 support" + depends on ARCH_OMAP24XX + comment "OMAP Board Type" depends on ARCH_OMAP2
@@ -26,3 +30,7 @@ config MACH_OMAP_H4 config MACH_OMAP_APOLLON bool "OMAP 2420 Apollon board" depends on ARCH_OMAP2 && ARCH_OMAP24XX + +config MACH_OMAP_2430SDP + bool "OMAP 2430 SDP board" + depends on ARCH_OMAP2 && ARCH_OMAP24XX
arch/arm/mach-omap2/Makefile +1 -0
@@ -14,5 +14,6 @@ obj-$(CONFIG_PM) += pm.o pm-domain.o sle # Specific board support obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o +obj-$(CONFIG_MACH_OMAP_2430SDP) += board-2430sdp.o obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o
arch/arm/mach-omap2/board-2430sdp.c new file +218 -0
218 lines not on this page · raw message
arch/arm/mach-omap2/devices.c +4 -2
@@ -55,8 +55,10 @@ static void omap_init_i2c(void)if (machine_is_omap_h4 ())return ; -omap_cfg_reg (J15_24XX_I2C2_SCL ); -omap_cfg_reg (H19_24XX_I2C2_SDA ); +if (!cpu_is_omap2430 ()) { +omap_cfg_reg (J15_24XX_I2C2_SCL ); +omap_cfg_reg (H19_24XX_I2C2_SDA ); + } (void )platform_device_register (&omap_i2c_device2); }
arch/arm/mach-omap2/gpmc.c +7 -0
@@ -22,7 +22,14 @@#undef DEBUG +#ifdef CONFIG_ARCH_OMAP2420 #define GPMC_BASE 0x6800a000 +#endif + +#ifdef CONFIG_ARCH_OMAP2430 +#define GPMC_BASE 0x6E000000 +#endif +#define GPMC_REVISION 0x00#define GPMC_SYSCONFIG 0x10#define GPMC_SYSSTATUS 0x14
arch/arm/mach-omap2/id.c +6 -0
@@ -17,7 +17,13 @@#include <asm/io.h> +#if defined(CONFIG_ARCH_OMAP2420 )#define OMAP24XX_TAP_BASE io_p2v(0x48014000) +#endif + +#if defined(CONFIG_ARCH_OMAP2430 ) +#define OMAP24XX_TAP_BASE io_p2v(0x4900A000) +#endif #define OMAP_TAP_IDCODE 0x0204#define OMAP_TAP_PROD_ID 0x0208
arch/arm/mach-omap2/io.c +20 -0
@@ -5,6 +5,7 @@* * Copyright (C) 2005 Nokia Corporation * Author: Juha Yrj�l� <[email protected]> +* Updated map desc to add 2430 support : <[email protected]> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as
@@ -41,6 +42,20 @@ static struct map_desc omap2_io_desc[] _ .length = L3_24XX_SIZE, .type = MT_DEVICE }, +#ifdef CONFIG_ARCH_OMAP2430 + { + .virtual = L4_WK_243X_VIRT, + .pfn = __phys_to_pfn(L4_WK_243X_PHYS), + .length = L4_WK_243X_SIZE, + .type =MT_DEVICE + }, + { + .virtual = OMAP243X_GPMC_VIRT, + .pfn = __phys_to_pfn(OMAP243X_GPMC_PHYS), + .length = OMAP243X_GPMC_SIZE, + .type =MT_DEVICE + }, +#endif { .virtual = DSP_MEM_24XX_VIRT, .pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS),
@@ -81,6 +96,11 @@ void __init omap2_init_common_hw(void) {omap2_mux_init ();omap2_clk_init (); +/* +* Need to Fix this for 2430 +*/ +#ifndef CONFIG_ARCH_OMAP2430 omap2_init_memory (); +#endif gpmc_init (); }
include/asm-arm/arch-omap/board-2430sdp.h new file +44 -0
44 lines not on this page · raw message
include/asm-arm/arch-omap/hardware.h +4 -0
@@ -318,6 +318,10 @@#include "board-h4.h" #endif +#ifdef CONFIG_MACH_OMAP_2430SDP +#include "board-2430sdp.h" +#endif +#ifdef CONFIG_MACH_OMAP_APOLLON #include "board-apollon.h" #endif
include/asm-arm/arch-omap/io.h +10 -0
@@ -72,6 +72,16 @@#define L4_24XX_PHYS L4_24XX_BASE/* 0x48000000 */ #define L4_24XX_VIRT 0xd8000000#define L4_24XX_SIZE SZ_1M/* 1MB of 128MB used, want 1MB sect */ + +#ifdef CONFIG_ARCH_OMAP2430 +#define L4_WK_243X_PHYS L4_WK_243X_BASE/* 0x49000000 */ +#define L4_WK_243X_VIRT 0xd9000000 +#define L4_WK_243X_SIZE SZ_1M +#define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE/* 0x49000000 */ +#define OMAP243X_GPMC_VIRT 0xFE000000 +#define OMAP243X_GPMC_SIZE SZ_1M +#endif +#define IO_OFFSET 0x90000000#define IO_ADDRESS (pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ #define io_p2v (pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
include/asm-arm/arch-omap/omap24xx.h +12 -0
@@ -8,6 +8,7 @@*/ #define L4_24XX_BASE 0x48000000 +#define L4_WK_243X_BASE 0x49000000#define L3_24XX_BASE 0x68000000/* interrupt controller */
@@ -16,9 +17,20 @@#define OMAP24XX_IVA_INTC_BASE 0x40000000#define IRQ_SIR_IRQ 0x0040 +#ifdef CONFIG_ARCH_OMAP2420 #define OMAP24XX_32KSYNCT_BASE (L4_24XX_BASE + 0x4000)#define OMAP24XX_PRCM_BASE (L4_24XX_BASE + 0x8000)#define OMAP24XX_SDRC_BASE (L3_24XX_BASE + 0x9000) +#define OMAP242X_CONTROL_STATUS (L4_24XX_BASE + 0x2f8) +#endif + +#ifdef CONFIG_ARCH_OMAP2430 +#define OMAP24XX_32KSYNCT_BASE (L4_WK_243X_BASE + 0x20000) +#define OMAP24XX_PRCM_BASE (L4_WK_243X_BASE + 0x6000) +#define OMAP24XX_SDRC_BASE (0x6D000000) +#define OMAP242X_CONTROL_STATUS (L4_24XX_BASE + 0x2f8) +#define OMAP243X_GPMC_BASE 0x6E000000 +#endif /* DSP SS */ #define OMAP24XX_DSP_BASE 0x58000000
Tony Lindgren
maintainerPATCH 11/18 ARM: OMAP: Tabify mux.c
Tabify mux.c, no functional changes.
Signed-off-by Tony Lindgren <[email protected]>
--- arch/arm/mach-omap2/mux.c | 38 +++++++++++++++++++------------------- 1 files changed, 19 insertions(+), 19 deletions(-)
arch/arm/mach-omap2/mux.c +19 -19
@@ -53,8 +53,8 @@ MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c, 0, 1, 1, 1)MUX_CFG_24XX ("W14_24XX_SYS_CLKOUT" ,0x137 ,0 ,1 ,1 ,1 ) /* 24xx GPMC chipselects, wait pin monitoring */ -MUX_CFG_24XX("E2_GPMC_NCS2", 0x08e, 0, 1, 1, 1) -MUX_CFG_24XX("L2_GPMC_NCS7", 0x093, 0, 1, 1, 1) +MUX_CFG_24XX("E2_GPMC_NCS2", 0x08e, 0, 1, 1, 1) +MUX_CFG_24XX("L2_GPMC_NCS7", 0x093, 0, 1, 1, 1) MUX_CFG_24XX("L3_GPMC_WAIT0", 0x09a, 0, 1, 1, 1) MUX_CFG_24XX("N7_GPMC_WAIT1", 0x09b, 0, 1, 1, 1)MUX_CFG_24XX ("M1_GPMC_WAIT2" ,0x09c ,0 ,1 ,1 ,1 )
@@ -67,18 +67,18 @@ MUX_CFG_24XX("W15_24XX_MCBSP2_DR", 0x126, 1, 1, 0, 1)MUX_CFG_24XX ("V15_24XX_MCBSP2_DX" ,0x127 ,1 ,1 ,0 ,1 ) /* 24xx GPIO */ -MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1) -MUX_CFG_24XX("P21_242X_GPIO12", 0x0ca, 3, 0, 0, 1) -MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1) -MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1) -MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1) -MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1) -MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1) -MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1) +MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1) +MUX_CFG_24XX("P21_242X_GPIO12", 0x0ca, 3, 0, 0, 1) +MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1) +MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1) +MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1) +MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1) +MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1) +MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1) MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1) -MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1) +MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1) MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1) -MUX_CFG_24XX("J15_24XX_GPIO99", 0x113, 3, 1, 1, 1) +MUX_CFG_24XX("J15_24XX_GPIO99", 0x113, 3, 1, 1, 1) MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1)MUX_CFG_24XX ("P14_24XX_GPIO125" ,0x140 ,3 ,1 ,1 ,1 )
@@ -95,17 +95,17 @@ MUX_CFG_24XX("T3_242X_GPIO55", 0xd9, 3, 0, 0, 1)MUX_CFG_24XX ("U2_242X_GPIO56" ,0xda ,3 ,0 ,0 ,1 ) /* 24xx external DMA requests */ -MUX_CFG_24XX("AA10_242X_DMAREQ0", 0x0e5, 2, 0, 0, 1) -MUX_CFG_24XX("AA6_242X_DMAREQ1", 0x0e6, 2, 0, 0, 1) -MUX_CFG_24XX("E4_242X_DMAREQ2", 0x074, 2, 0, 0, 1) -MUX_CFG_24XX("G4_242X_DMAREQ3", 0x073, 2, 0, 0, 1) -MUX_CFG_24XX("D3_242X_DMAREQ4", 0x072, 2, 0, 0, 1) -MUX_CFG_24XX ("E3_242X_DMAREQ5" ,0x071 ,2 ,0 ,0 ,1 ) +MUX_CFG_24XX("AA10_242X_DMAREQ0", 0x0e5, 2, 0, 0, 1) +MUX_CFG_24XX("AA6_242X_DMAREQ1", 0x0e6, 2, 0, 0, 1) +MUX_CFG_24XX("E4_242X_DMAREQ2", 0x074, 2, 0, 0, 1) +MUX_CFG_24XX("G4_242X_DMAREQ3", 0x073, 2, 0, 0, 1) +MUX_CFG_24XX("D3_242X_DMAREQ4", 0x072, 2, 0, 0, 1) +MUX_CFG_24XX ("E3_242X_DMAREQ5" ,0x071 ,2 ,0 ,0 ,1 ) /* TSC IRQ */MUX_CFG_24XX ("P20_24XX_TSC_IRQ" ,0x108 ,0 ,0 ,0 ,1 ) -/* UART3 */ +/* UART3 */ MUX_CFG_24XX("K15_24XX_UART3_TX", 0x118, 0, 0, 0, 1)MUX_CFG_24XX ("K14_24XX_UART3_RX" ,0x119 ,0 ,0 ,0 ,1 )
Signature · 1 line
1.4.4.2
Tony Lindgren
maintainerPATCH 12/18 ARM: OMAP: TUSB EVM init
From: David Brownell <[email protected]>
Add init support for the TUSB6010 EVM board, as connected to H4.
Signed-off-by David Brownell <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
--- arch/arm/mach-omap2/usb-tusb6010.c | 333 ++++++++++++++++++++++++++++++++++++ 1 files changed, 333 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/usb-tusb6010.c new file +349 -0
@@ -0,0 +1,349 @@ +/* +* linux/arch/arm/mach-omap2/usb-tusb6010.c +* +* Copyright (C) 2006 Nokia Corporation +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +*/ + +#include <linux/types.h> +#include <linux/errno.h> +#include <linux/delay.h> +#include <linux/platform_device.h> + +#include <linux/usb/musb.h> + +#include <asm/arch/gpmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/mux.h> + + +static u8 async_cs, sync_cs; +static unsigned refclk_psec; + + +/* t2_ps, when quantized to fclk units, must happen no earlier than +* the clock after after t1_NS. +* +* Return a possibly updated value of t2_ps, converted to nsec. +*/ +static unsigned +next_clk (unsigned t1_NS,unsigned t2_ps,unsigned fclk_ps) +{ +unsigned t1_ps = t1_NS *1000 ; +unsigned t1_f, t2_f; + +if ((t1_ps + fclk_ps) < t2_ps) +return t2_ps /1000 ; + + t1_f = (t1_ps + fclk_ps -1 ) / fclk_ps; + t2_f = (t2_ps + fclk_ps -1 ) / fclk_ps; + +if (t1_f >= t2_f) + t2_f = t1_f +1 ; + +return (t2_f * fclk_ps) /1000 ; +} + +/* NOTE: timings are from tusb 6010 datasheet Rev 1.8, 12-Sept 2006 */ + +static int tusb_set_async_mode (unsigned sysclk_ps,unsigned fclk_ps) +{ +struct gpmc_timings t; +unsigned t_acsnh_advnh = sysclk_ps +3000 ; +unsigned tmp; + +memset (&t,0 ,sizeof (t)); + +/* CS_ON = t_acsnh_acsnl */ + t.cs_on =8 ; +/* ADV_ON = t_acsnh_advnh - t_advn */ + t.adv_on =next_clk (t.cs_on, t_acsnh_advnh -7000 , fclk_ps); + +/* +* READ ... from omap2420 TRM fig 12-13 +*/ + +/* ADV_RD_OFF = t_acsnh_advnh */ + t.adv_rd_off =next_clk (t.adv_on, t_acsnh_advnh, fclk_ps); + +/* OE_ON = t_acsnh_advnh + t_advn_oen (then wait for nRDY) */ + t.oe_on =next_clk (t.adv_on, t_acsnh_advnh +1000 , fclk_ps); + +/* ACCESS = counters continue only after nRDY */ + tmp = t.oe_on *1000 +300 ; + t.access =next_clk (t.oe_on, tmp, fclk_ps); + +/* OE_OFF = after data gets sampled */ + tmp = t.access *1000 ; + t.oe_off =next_clk (t.access, tmp, fclk_ps); + + t.cs_rd_off = t.oe_off; + + tmp = t.cs_rd_off *1000 +7000 /* t_acsn_rdy_z */ ; + t.rd_cycle =next_clk (t.cs_rd_off, tmp, fclk_ps); + +/* +* WRITE ... from omap2420 TRM fig 12-15 +*/ + +/* ADV_WR_OFF = t_acsnh_advnh */ + t.adv_wr_off = t.adv_rd_off; + +/* WE_ON = t_acsnh_advnh + t_advn_wen (then wait for nRDY) */ + t.we_on =next_clk (t.adv_wr_off, t_acsnh_advnh +1000 , fclk_ps); + +/* WE_OFF = after data gets sampled */ + tmp = t.we_on *1000 +300 ; + t.we_off =next_clk (t.we_on, tmp, fclk_ps); + + t.cs_wr_off = t.we_off; + + tmp = t.cs_wr_off *1000 +7000 /* t_acsn_rdy_z */ ; + t.wr_cycle =next_clk (t.cs_wr_off, tmp, fclk_ps); + +return gpmc_cs_set_timings (async_cs, &t); +} + +static int tusb_set_sync_mode (unsigned sysclk_ps,unsigned fclk_ps) +{ +struct gpmc_timings t; +unsigned t_scsnh_advnh = sysclk_ps +3000 ; +unsigned tmp; + +memset (&t,0 ,sizeof (t)); + t.cs_on =8 ; + +/* ADV_ON = t_acsnh_advnh - t_advn */ + t.adv_on =next_clk (t.cs_on, t_scsnh_advnh -7000 , fclk_ps); + +/* GPMC_CLK rate = fclk rate / div */ + t.sync_clk =12 /* 11.1 nsec */ ; + tmp = (t.sync_clk *1000 + fclk_ps -1 ) / fclk_ps; +if (tmp >4 ) +return -ERANGE ; +if (tmp <=0 ) + tmp =1 ; + t.page_burst_access = (fclk_ps * tmp) /1000 ; + +/* +* READ ... based on omap2420 TRM fig 12-19, 12-20 +*/ + +/* ADV_RD_OFF = t_scsnh_advnh */ + t.adv_rd_off =next_clk (t.adv_on, t_scsnh_advnh, fclk_ps); + +/* OE_ON = t_scsnh_advnh + t_advn_oen * fclk_ps (then wait for nRDY) */ + tmp = (t.adv_rd_off *1000 ) + (3 * fclk_ps); + t.oe_on =next_clk (t.adv_on, tmp, fclk_ps); + +/* ACCESS = number of clock cycles after t_adv_eon */ + tmp = (t.oe_on *1000 ) + (5 * fclk_ps); + t.access =next_clk (t.oe_on, tmp, fclk_ps); + +/* OE_OFF = after data gets sampled */ + tmp = (t.access *1000 ) + (1 * fclk_ps); + t.oe_off =next_clk (t.access, tmp, fclk_ps); + + t.cs_rd_off = t.oe_off; + + tmp = t.cs_rd_off *1000 +7000 /* t_scsn_rdy_z */ ; + t.rd_cycle =next_clk (t.cs_rd_off, tmp, fclk_ps); + +/* +* WRITE ... based on omap2420 TRM fig 12-21 +*/ + +/* ADV_WR_OFF = t_scsnh_advnh */ + t.adv_wr_off = t.adv_rd_off; + +/* WE_ON = t_scsnh_advnh + t_advn_wen * fclk_ps (then wait for nRDY) */ + tmp = (t.adv_wr_off *1000 ) + (3 * fclk_ps); + t.we_on =next_clk (t.adv_wr_off, tmp, fclk_ps); + +/* WE_OFF = number of clock cycles after t_adv_wen */ + tmp = (t.we_on *1000 ) + (6 * fclk_ps); + t.we_off =next_clk (t.we_on, tmp, fclk_ps); + + t.cs_wr_off = t.we_off; + + tmp = t.cs_wr_off *1000 +7000 /* t_scsn_rdy_z */ ; + t.wr_cycle =next_clk (t.cs_wr_off, tmp, fclk_ps); + +return gpmc_cs_set_timings (sync_cs, &t); +} + +extern unsigned long gpmc_get_fclk_period (void ); + +/* tusb driver calls this when it changes the chip's clocking */ +int tusb6010_platform_retime (unsigned is_refclk) +{ +static const char error[] = +KERN_ERR "tusb6010 %s retime error %d\n" ; + +unsigned fclk_ps =gpmc_get_fclk_period (); +unsigned sysclk_ps; +int status; + +if (!refclk_psec) +return -ENODEV ; + + sysclk_ps = is_refclk ? refclk_psec :TUSB6010_OSCCLK_60 ; + + status =tusb_set_async_mode (sysclk_ps, fclk_ps); +if (status <0 ) { +printk (error,"async" , status); + goto done; + } + status =tusb_set_sync_mode (sysclk_ps, fclk_ps); +if (status <0 ) +printk (error,"sync" , status); +done: +return status; +} +EXPORT_SYMBOL_GPL (tusb6010_platform_retime); + +static struct resource tusb_resources[] = { +/* Order is significant! The start/end fields +* are updated during setup.. +*/ + {/* Asynchronous access */ + .flags =IORESOURCE_MEM , + }, + {/* Synchronous access */ + .flags =IORESOURCE_MEM , + }, + {/* IRQ */ + .flags =IORESOURCE_IRQ , + }, +}; + +static u64 tusb_dmamask = ~(u32 )0 ; + +static struct platform_device tusb_device = { + .name ="musb_hdrc" , + .id =-1 , + .dev = { + .dma_mask = &tusb_dmamask, + .coherent_dma_mask =0xffffffff , + }, + .num_resources =ARRAY_SIZE (tusb_resources), + .resource = tusb_resources, +}; + + +/* this may be called only from board-*.c setup code */ +int __init +tusb6010_setup_interface (struct musb_hdrc_platform_data *data, +unsigned ps_refclk,unsigned waitpin, +unsigned async,unsigned sync, +unsigned irq,unsigned dmachan) +{ +int status; +static char error[]__initdata = +KERN_ERR "tusb6010 init error %d, %d\n" ; + +/* ASYNC region, primarily for PIO */ + status =gpmc_cs_request (async,SZ_16M , (unsigned long *) + &tusb_resources[0 ].start); +if (status <0 ) { +printk (error,1 , status); +return status; + } + tusb_resources[0 ].end = tusb_resources[0 ].start +0x9ff ; + async_cs = async; +gpmc_cs_write_reg (async,GPMC_CS_CONFIG1 , +GPMC_CONFIG1_PAGE_LEN (2 ) + |GPMC_CONFIG1_WAIT_READ_MON + |GPMC_CONFIG1_WAIT_WRITE_MON + |GPMC_CONFIG1_WAIT_PIN_SEL (waitpin) + |GPMC_CONFIG1_READTYPE_ASYNC + |GPMC_CONFIG1_WRITETYPE_ASYNC + |GPMC_CONFIG1_DEVICESIZE_16 + |GPMC_CONFIG1_DEVICETYPE_NOR + |GPMC_CONFIG1_MUXADDDATA ); + + +/* SYNC region, primarily for DMA */ + status =gpmc_cs_request (sync,SZ_16M , (unsigned long *) + &tusb_resources[1 ].start); +if (status <0 ) { +printk (error,2 , status); +return status; + } + tusb_resources[1 ].end = tusb_resources[1 ].start +0x9ff ; + sync_cs = sync; +gpmc_cs_write_reg (sync,GPMC_CS_CONFIG1 , +GPMC_CONFIG1_READMULTIPLE_SUPP + |GPMC_CONFIG1_READTYPE_SYNC + |GPMC_CONFIG1_WRITEMULTIPLE_SUPP + |GPMC_CONFIG1_WRITETYPE_SYNC + |GPMC_CONFIG1_CLKACTIVATIONTIME (1 ) + |GPMC_CONFIG1_PAGE_LEN (2 ) + |GPMC_CONFIG1_WAIT_READ_MON + |GPMC_CONFIG1_WAIT_WRITE_MON + |GPMC_CONFIG1_WAIT_PIN_SEL (waitpin) + |GPMC_CONFIG1_DEVICESIZE_16 + |GPMC_CONFIG1_DEVICETYPE_NOR + |GPMC_CONFIG1_MUXADDDATA +/* fclk divider gets set later */ + ); + +/* IRQ */ + status =omap_request_gpio (irq); +if (status <0 ) { +printk (error,3 , status); +return status; + } +omap_set_gpio_direction (irq,1 ); + tusb_resources[2 ].start = irq +IH_GPIO_BASE ; + +/* set up memory timings ... can speed them up later */ +if (!ps_refclk) { +printk (error,4 , status); +return -ENODEV ; + } + refclk_psec = ps_refclk; + status =tusb6010_platform_retime (1 ); +if (status <0 ) { +printk (error,5 , status); +return status; + } + +/* finish device setup ... */ +if (!data) { +printk (error,6 , status); +return -ENODEV ; + } + data->multipoint =1 ; + tusb_device.dev.platform_data = data; + +/* REVISIT let the driver know what DMA channels work */ +if (!dmachan) + tusb_device.dev.dma_mask =NULL ; +else { +/* assume OMAP 2420 ES2.0 and later */ +if (dmachan & (1 <<0 )) +omap_cfg_reg (AA10_242X_DMAREQ0 ); +if (dmachan & (1 <<1 )) +omap_cfg_reg (AA6_242X_DMAREQ1 ); +if (dmachan & (1 <<2 )) +omap_cfg_reg (E4_242X_DMAREQ2 ); +if (dmachan & (1 <<3 )) +omap_cfg_reg (G4_242X_DMAREQ3 ); +if (dmachan & (1 <<4 )) +omap_cfg_reg (D3_242X_DMAREQ4 ); +if (dmachan & (1 <<5 )) +omap_cfg_reg (E3_242X_DMAREQ5 ); + } + +/* so far so good ... register the device */ + status =platform_device_register (&tusb_device); +if (status <0 ) { +printk (error,7 , status); +return status; + } +return 0 ; +}
Tony Lindgren
maintainerPATCH 13/18 ARM: OMAP: Merge gpmc changes from N800 tree
From: Kai Svahn <[email protected]>
This patch merges gpmc changes from N800 tree
and adds gpmc_get_fclk_period() to gpmc.h.
Signed-off-by Kai Svahn <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
--- arch/arm/mach-omap2/gpmc.c | 7 +++++++ include/asm-arm/arch-omap/gpmc.h | 1 + 2 files changed, 8 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/gpmc.c +7 -0
@@ -111,6 +111,13 @@ unsigned int gpmc_ns_to_ticks(unsigned ireturn (time_ns *1000 + tick_ps -1 ) / tick_ps; } +unsigned int gpmc_round_ns_to_ticks (unsigned int time_ns) +{ +unsigned long ticks =gpmc_ns_to_ticks (time_ns); + +return ticks *gpmc_get_fclk_period () /1000 ; +} +#ifdef DEBUG static int set_gpmc_timing_reg (int cs,int reg,int st_bit,int end_bit,int time,const char *name)
include/asm-arm/arch-omap/gpmc.h +2 -0
@@ -81,6 +81,8 @@ struct gpmc_timings { };extern unsigned int gpmc_ns_to_ticks (unsigned int time_ns); +extern unsigned int gpmc_round_ns_to_ticks (unsigned int time_ns); +extern unsigned long gpmc_get_fclk_period (void );extern void gpmc_cs_write_reg (int cs,int idx,u32 val);extern u32 gpmc_cs_read_reg (int cs,int idx);
Tony Lindgren
maintainerPATCH 14/18 ARM: OMAP: Merge driver headers from N800 tree
From: Kai Svahn <[email protected]>
This patch merges omap specific driver headers from N800 tree.
Signed-off-by Kai Svahn <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
--- include/asm-arm/arch-omap/blizzard.h | 12 ++++ include/asm-arm/arch-omap/eac.h | 101 ++++++++++++++++++++++++++++++++++ include/asm-arm/arch-omap/menelaus.h | 23 +++++++- include/asm-arm/arch-omap/mmc.h | 67 ++++++++++++++++++++++ include/asm-arm/arch-omap/onenand.h | 19 ++++++ 5 files changed, 221 insertions(+), 1 deletions(-)
include/asm-arm/arch-omap/blizzard.h new file +12 -0
@@ -0,0 +1,12 @@ +#ifndef _BLIZZARD_H +#define _BLIZZARD_H + +struct blizzard_platform_data { +void (*power_up)(struct device *dev); +void (*power_down)(struct device *dev); +unsigned long (*get_clock_rate)(struct device *dev); + +unsigned te_connected :1 ; +}; + +#endif
include/asm-arm/arch-omap/eac.h new file +101 -0
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include/asm-arm/arch-omap/menelaus.h +22 -1
@@ -7,6 +7,15 @@#ifndef __ASM_ARCH_MENELAUS_H#define __ASM_ARCH_MENELAUS_H +struct device ; + +struct menelaus_platform_data { +int (* late_init)(struct device *dev); +}; + +/* Call only at init time. */ +extern void menelaus_set_platform_data (struct menelaus_platform_data *pdata); +extern int menelaus_register_mmc_callback (void (*callback)(void *data,u8 card_mask),void *data);extern void menelaus_unregister_mmc_callback (void );
@@ -20,6 +29,19 @@ extern int menelaus_set_vaux(unsigned int mV);extern int menelaus_set_vdcdc (int dcdc,unsigned int mV);extern int menelaus_set_slot_sel (int enable);extern int menelaus_get_slot_pin_states (void ); +extern int menelaus_set_vcore_sw (unsigned int mV); +extern int menelaus_set_vcore_hw (unsigned int roof_mV,unsigned int floor_mV); + +#define EN_VPLL_SLEEP (1 << 7) +#define EN_VMMC_SLEEP (1 << 6) +#define EN_VAUX_SLEEP (1 << 5) +#define EN_VIO_SLEEP (1 << 4) +#define EN_VMEM_SLEEP (1 << 3) +#define EN_DC3_SLEEP (1 << 2) +#define EN_DC2_SLEEP (1 << 1) +#define EN_VC_SLEEP (1 << 0) + +extern int menelaus_set_regulator_sleep (int enable,u32 val);#if defined(CONFIG_ARCH_OMAP24XX ) && defined(CONFIG_MENELAUS )#define omap_has_menelaus () 1
@@ -28,4 +50,3 @@ extern int menelaus_get_slot_pin_states(void);#endif #endif -
include/asm-arm/arch-omap/mmc.h new file +67 -0
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include/asm-arm/arch-omap/onenand.h new file +19 -0
@@ -0,0 +1,19 @@ +/* +* include/asm-arm/arch-omap/onenand.h +* +* Copyright (C) 2006 Nokia Corporation +* Author: Juha Yrjola +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +*/ + +#include <linux/mtd/partitions.h> + +struct omap_onenand_platform_data { +int cs; +int gpio_irq; +struct mtd_partition *parts; +int nr_parts; +};
Signature · 1 line
1.4.4.2
Tony Lindgren
maintainerPATCH 15/18 ARM: OMAP: Merge PM code from N800 tree
From: Kai Svahn <[email protected]>
This patch merges omap2 PM code from N800 tree.
Patch adds support for sleep while idle for omap2 and handy serial console debbugging code. It also moves code from pm-domain.c to pm.c.
This code can be used as a base for developing power management for all omap24xx boards.
Signed-off-by Kai Svahn <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
arch/arm/mach-omap2/Makefile +1 -1
@@ -9,7 +9,7 @@ obj-y := irq.o id.o io.o sram-fn.o memor obj-$(CONFIG_OMAP_MPU_TIMER) += timer-gp.o # Power Management -obj-$(CONFIG_PM) += pm.o pm-domain.o sleep.o +obj-$(CONFIG_PM) += pm.o sleep.o # Specific board support obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o
arch/arm/mach-omap2/pm-domain.c deleted +0 -299
299 lines not on this page · raw message
arch/arm/mach-omap2/pm.c +711 -266
1,067 lines not on this page · raw message
arch/arm/mach-omap2/sleep.S +5 -18
@@ -5,6 +5,10 @@ * Texas Instruments, <www.ti.com> * Richard Woodruff <[email protected]> * + * (C) Copyright 2006 Nokia Corporation + * Fixed idle loop sleep + * Igor Stoppa <[email protected]> + * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of
@@ -26,14 +30,6 @@ #include <asm/arch/io.h> #include <asm/arch/pm.h> -#define A_32KSYNC_CR_V IO_ADDRESS(OMAP_TIMER32K_BASE+0x10) -#define A_PRCM_VOLTCTRL_V IO_ADDRESS(OMAP24XX_PRCM_BASE+0x50) -#define A_PRCM_CLKCFG_CTRL_V IO_ADDRESS(OMAP24XX_PRCM_BASE+0x80) -#define A_CM_CLKEN_PLL_V IO_ADDRESS(OMAP24XX_PRCM_BASE+0x500) -#define A_CM_IDLEST_CKGEN_V IO_ADDRESS(OMAP24XX_PRCM_BASE+0x520) -#define A_CM_CLKSEL1_PLL_V IO_ADDRESS(OMAP24XX_PRCM_BASE+0x540) -#define A_CM_CLKSEL2_PLL_V IO_ADDRESS(OMAP24XX_PRCM_BASE+0x544) - #define A_SDRC_DLLA_CTRL_V IO_ADDRESS(OMAP24XX_SDRC_BASE+0x60) #define A_SDRC_POWER_V IO_ADDRESS(OMAP24XX_SDRC_BASE+0x70) #define A_SDRC_RFR_CTRL_V IO_ADDRESS(OMAP24XX_SDRC_BASE+0xA4)
@@ -53,7 +49,7 @@ */ ENTRY(omap24xx_idle_loop_suspend) stmfd sp!, {r0, lr} @ save registers on stack - mov r0, #0 @ clear for mcr setup + mov r0, #0x0 @ clear for mrc call mcr p15, 0, r0, c7, c0, 4 @ wait for interrupt ldmfd sp!, {r0, pc} @ restore regs and return
@@ -67,9 +63,6 @@ ENTRY(omap24xx_idle_loop_suspend_sz) * * Input: * R0 : DLL ctrl value pre-Sleep - * R1 : Processor+Revision - * 2420: 0x21 = 242xES1, 0x26 = 242xES2.2 - * 2430: 0x31 = 2430ES1, 0x32 = 2430ES2 * * The if the DPLL is going to AutoIdle. It seems like the DPLL may be back on * when we get called, but the DLL probably isn't. We will wait a bit more in
@@ -129,14 +122,8 @@ A_SDRC_POWER: .word A_SDRC_POWER_V A_SDRC0: .word A_SDRC0_V -A_CM_CLKSEL2_PLL_S: - .word A_CM_CLKSEL2_PLL_V -A_CM_CLKEN_PLL: - .word A_CM_CLKEN_PLL_V A_SDRC_DLLA_CTRL_S: .word A_SDRC_DLLA_CTRL_V -A_SDRC_MANUAL_S: - .word A_SDRC_MANUAL_V ENTRY(omap24xx_cpu_suspend_sz) .word . - omap24xx_cpu_suspend
include/asm-arm/arch-omap/pm.h +5 -63
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include/asm-arm/arch-omap/gpio.h +2 -0
@@ -75,6 +75,8 @@ extern void omap_free_gpio(int gpio);extern void omap_set_gpio_direction (int gpio,int is_input);extern void omap_set_gpio_dataout (int gpio,int enable);extern int omap_get_gpio_datain (int gpio); +extern void omap2_gpio_prepare_for_retention (void ); +extern void omap2_gpio_resume_after_retention (void );/*-------------------------------------------------------------------------*/
Tony Lindgren
maintainerPATCH 16/18 ARM: OMAP: 243x: Add mappings for SDRC and SMS
From: Kevin Hilman <[email protected]>
Add mappings for SDRC ans SMS so that omap2_memory_init() works on the 2430. This also allows the mpurate= command-line option to work.
Signed-off-by Kevin Hilman <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
--- arch/arm/mach-omap2/io.c | 17 ++++++++++++----- include/asm-arm/arch-omap/io.h | 7 +++++++ include/asm-arm/arch-omap/omap24xx.h | 3 ++- 3 files changed, 21 insertions(+), 6 deletions(-)
arch/arm/mach-omap2/io.c +12 -5
@@ -55,6 +55,18 @@ static struct map_desc omap2_io_desc[] _ .length = OMAP243X_GPMC_SIZE, .type = MT_DEVICE }, + { + .virtual = OMAP243X_SDRC_VIRT, + .pfn = __phys_to_pfn(OMAP243X_SDRC_PHYS), + .length = OMAP243X_SDRC_SIZE, + .type = MT_DEVICE + }, + { + .virtual = OMAP243X_SMS_VIRT, + .pfn = __phys_to_pfn(OMAP243X_SMS_PHYS), + .length = OMAP243X_SMS_SIZE, + .type = MT_DEVICE + }, #endif { .virtual = DSP_MEM_24XX_VIRT,
@@ -96,11 +108,6 @@ void __init omap2_init_common_hw(void) {omap2_mux_init ();omap2_clk_init (); -/* -* Need to Fix this for 2430 -*/ -#ifndef CONFIG_ARCH_OMAP2430 omap2_init_memory (); -#endif gpmc_init (); }
include/asm-arm/arch-omap/io.h +7 -0
@@ -80,6 +80,13 @@#define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE/* 0x49000000 */ #define OMAP243X_GPMC_VIRT 0xFE000000#define OMAP243X_GPMC_SIZE SZ_1M +#define OMAP243X_SDRC_PHYS OMAP24XX_SDRC_BASE +#define OMAP243X_SDRC_VIRT 0xFD000000 +#define OMAP243X_SDRC_SIZE SZ_1M +#define OMAP243X_SMS_PHYS OMAP243X_SMS_BASE +#define OMAP243X_SMS_VIRT 0xFC000000 +#define OMAP243X_SMS_SIZE SZ_1M +#endif #define IO_OFFSET 0x90000000
include/asm-arm/arch-omap/omap24xx.h +2 -1
@@ -27,8 +27,9 @@#ifdef CONFIG_ARCH_OMAP2430 #define OMAP24XX_32KSYNCT_BASE (L4_WK_243X_BASE + 0x20000)#define OMAP24XX_PRCM_BASE (L4_WK_243X_BASE + 0x6000) -#define OMAP24XX_SDRC_BASE (0x6D000000)#define OMAP242X_CONTROL_STATUS (L4_24XX_BASE + 0x2f8) +#define OMAP243X_SMS_BASE 0x6C000000 +#define OMAP24XX_SDRC_BASE 0x6D000000#define OMAP243X_GPMC_BASE 0x6E000000#endif
Tony Lindgren
maintainerPATCH 17/18 ARM: OMAP: Device init for OMAP24xx Enhanced Audio Controller
From: Jarkko Nikula <[email protected]>
Device init for OMAP24xx Enhanced Audio Controller
Signed-off-by Jarkko Nikula <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
--- arch/arm/mach-omap2/devices.c | 33 +++++++++++++++++++++++++++++++++ 1 files changed, 33 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/devices.c +33 -0
@@ -23,6 +23,7 @@#include <asm/arch/board.h> #include <asm/arch/mux.h> #include <asm/arch/gpio.h> +#include <asm/arch/eac.h> #if defined(CONFIG_I2C_OMAP ) || defined(CONFIG_I2C_OMAP_MODULE )
@@ -201,6 +202,38 @@ static void omap_init_mcspi(void)static inline void omap_init_mcspi (void ) {}#endif +#ifdef CONFIG_SND_OMAP24XX_EAC + +#define OMAP2_EAC_BASE 0x48090000 + +static struct resource omap2_eac_resources[] = { + { + .start =OMAP2_EAC_BASE , + .end =OMAP2_EAC_BASE +0x109 , + .flags =IORESOURCE_MEM , + }, +}; + +static struct platform_device omap2_eac_device = { + .name ="omap24xx-eac" , + .id =-1 , + .num_resources =ARRAY_SIZE (omap2_eac_resources), + .resource = omap2_eac_resources, + .dev = { + .platform_data =NULL , + }, +}; + +void omap_init_eac (struct eac_platform_data *pdata) +{ + omap2_eac_device.dev.platform_data = pdata; +platform_device_register (&omap2_eac_device); +} + +#else +void omap_init_eac (struct eac_platform_data *pdata) {} +#endif +/*-------------------------------------------------------------------------*/ static int __init omap2_init_devices (void )
Tony Lindgren
maintainerPATCH 18/18 ARM: OMAP: Fix PRCM base register usage for 243x
From: Kevin Hilman <[email protected]>
The PRCM base register is different on 242x and 243x. Use the #ifdef'd #define from omap24xx.h instead of the locally defined one.
Signed-off-by Kevin Hilman <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
--- arch/arm/mach-omap2/pm.c | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-)
arch/arm/mach-omap2/pm.c +1 -2
@@ -45,7 +45,6 @@#include <asm/arch/dma.h> #include <asm/arch/board.h> -#define PRCM_BASE 0x48008000#define PRCM_REVISION 0x000#define PRCM_SYSCONFIG 0x010#define PRCM_IRQSTATUS_MPU 0x018
@@ -144,7 +143,7 @@ static void (*omap2_sram_idle)(void);static void (*omap2_sram_suspend)(int dllctrl);static void (*saved_idle)(void ); -static u32 prcm_base =IO_ADDRESS (PRCM_BASE ); +static u32 prcm_base =IO_ADDRESS (OMAP24XX_PRCM_BASE );static inline void prcm_write_reg (int idx,u32 val) {