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blackfin arch and driver patches update against 2.6.21-rc7-mm2

PATCH New Bryan Wu 1 participant 8 messages Apr 29, 2007 SPI

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Bryan Wu

author
#0 lore raw

cover blackfin arch and driver patches update against 2.6.21-rc7-mm2

* Some bugfixes in blackfin arch patch, serial core patch
* Update blackfin spi controller driver patch accoding to David Brownell's review

author
#1 lore raw

PATCH 1/7 blackfin arch: fix coding style in ints-priority-sc C file

Signed-off-by Bryan Wu <[email protected]>
---
 arch/blackfin/mach-common/ints-priority-sc.c |   77 +++++++++++--------------
 1 files changed, 34 insertions(+), 43 deletions(-)
arch/blackfin/mach-common/ints-priority-sc.c +34 -43
index c30726b..34b6228 100644
@@ -329,11 +329,9 @@ static unsigned int bfin_gpio_irq_startup(unsigned int irq)
 	u16 gpionr = irq - IRQ_PF0;
 
 	if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
-
 		ret = gpio_request(gpionr, NULL);
-		if(ret)
+		if (ret)
 			return ret;
-
 	}
 
 	gpio_enabled[gpio_bank(gpionr)] |= gpio_bit(gpionr);

@@ -355,55 +353,49 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
 	unsigned int ret;
 	u16 gpionr = irq - IRQ_PF0;
 
+	if (type == IRQ_TYPE_PROBE) {
+		/* only probe unenabled GPIO interrupt lines */
+		if (gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))
+			return 0;
+		type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
+	}
 
-		if (type == IRQ_TYPE_PROBE) {
-			/* only probe unenabled GPIO interrupt lines */
-			if (gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))
-				return 0;
-			type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
-
-		}
-
-		if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING |
-			    IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
-
+	if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING |
+	            IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
+	{
 		if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
-
 			ret = gpio_request(gpionr, NULL);
-			if(ret)
+			if (ret)
 				return ret;
-
-		}
-
-			gpio_enabled[gpio_bank(gpionr)] |= gpio_bit(gpionr);
-		} else {
-			gpio_enabled[gpio_bank(gpionr)] &= ~gpio_bit(gpionr);
-			return 0;
 		}
 
+		gpio_enabled[gpio_bank(gpionr)] |= gpio_bit(gpionr);
+	} else {
+		gpio_enabled[gpio_bank(gpionr)] &= ~gpio_bit(gpionr);
+		return 0;
+	}
 
-		set_gpio_dir(gpionr, 0);
-		set_gpio_inen(gpionr, 1);
-
+	set_gpio_dir(gpionr, 0);
+	set_gpio_inen(gpionr, 1);
 
-		if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
-			gpio_edge_triggered[gpio_bank(gpionr)] |= gpio_bit(gpionr);
-			set_gpio_edge(gpionr, 1);
-		} else {
-			set_gpio_edge(gpionr, 0);
-			gpio_edge_triggered[gpio_bank(gpionr)] &= ~gpio_bit(gpionr);
-		}
+	if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
+		gpio_edge_triggered[gpio_bank(gpionr)] |= gpio_bit(gpionr);
+		set_gpio_edge(gpionr, 1);
+	} else {
+		set_gpio_edge(gpionr, 0);
+		gpio_edge_triggered[gpio_bank(gpionr)] &= ~gpio_bit(gpionr);
+	}
 
-		if ((type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
-		    == (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
-			set_gpio_both(gpionr, 1);
-		else
-			set_gpio_both(gpionr, 0);
+	if ((type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
+	    == (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
+		set_gpio_both(gpionr, 1);
+	else
+		set_gpio_both(gpionr, 0);
 
-		if ((type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_LEVEL_LOW)))
-			set_gpio_polar(gpionr, 1);	/* low or falling edge denoted by one */
-		else
-			set_gpio_polar(gpionr, 0);	/* high or rising edge denoted by zero */
+	if ((type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_LEVEL_LOW)))
+		set_gpio_polar(gpionr, 1);	/* low or falling edge denoted by one */
+	else
+		set_gpio_polar(gpionr, 0);	/* high or rising edge denoted by zero */
 
 	SSYNC();
 

@@ -416,7 +408,6 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
 }
 
 
-
 static struct irq_chip bfin_gpio_irqchip = {
 	.ack = bfin_gpio_ack_irq,
 	.mask = bfin_gpio_mask_irq,
Signature · 1 line
1.5.1.2
author
#2 lore raw

PATCH 2/7 blackfin arch: fix bug refuse to boot if rootfs image is not attached when MTD_UCLINUX is selected

In reply to Bryan Wu
Signed-off-by Bryan Wu <[email protected]>
---
 arch/blackfin/kernel/setup.c |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)
arch/blackfin/kernel/setup.c +5 -0
index 76e1f10..6a2190f 100644
@@ -293,6 +293,11 @@ void __init setup_arch(char **cmdline_p)
 
 	memory_end -= mtd_size;
 
+	if (mtd_size == 0) {
+		console_init();
+		panic("Don't boot kernel without rootfs attached.\n");
+	}
+
 	/* Relocate MTD image to the top of memory after the uncached memory area */
 	dma_memcpy((char *)memory_end, __bss_stop, mtd_size);
Signature · 1 line
1.5.1.2
author
#3 lore raw

PATCH 3/7 blackfin arch: move revid function into global headers as inline functions

In reply to Bryan Wu
Signed-off-by Bryan Wu <[email protected]>
---
 arch/blackfin/kernel/setup.c            |   72 +++++++-----------------------
 include/asm-blackfin/mach-bf533/bf533.h |    2 +-
 include/asm-blackfin/mach-bf537/bf537.h |    2 +-
 include/asm-blackfin/mach-bf561/bf561.h |    2 +-
 include/asm-blackfin/processor.h        |   25 +++++++++++
 5 files changed, 45 insertions(+), 58 deletions(-)
arch/blackfin/kernel/setup.c +17 -55
index 6a2190f..724fd7a 100644
@@ -121,34 +121,6 @@ void bf53x_relocate_l1_mem(void)
 
 }
 
-/* Get the DSP Revision ID */
-static u_int get_dsp_rev_id(void)
-{
-	u_int id;
-	id = bfin_read_DSPID() & 0xffff;
-#if defined(CONFIG_BF561)
-	id>>=8;
-#endif
-	return id;
-}
-
-static inline u_int get_compiled_rev_id(void)
-{
-#if defined(CONFIG_BF_REV_0_0)
-	return 0;
-#elif defined(CONFIG_BF_REV_0_1)
-	return 1;
-#elif defined(CONFIG_BF_REV_0_2)
-	return 2;
-#elif defined(CONFIG_BF_REV_0_3)
-	return 3;
-#elif defined(CONFIG_BF_REV_0_4)
-	return 4;
-#elif defined(CONFIG_BF_REV_0_5)
-	return 5;
-#endif
-}
-
 /*
  * Initial parsing of the command line.  Currently, we support:
  *  - Controlling the linux memory size: mem=xxx[KMG]

@@ -196,7 +168,7 @@ static __init void parse_cmdline_early(char *cmdline_p)
 
 void __init setup_arch(char **cmdline_p)
 {
-	int bootmap_size, id;
+	int bootmap_size;
 	unsigned long l1_length, sclk, cclk;
 #ifdef CONFIG_MTD_UCLINUX
 	unsigned long mtd_phys = 0;

@@ -329,30 +301,23 @@ void __init setup_arch(char **cmdline_p)
 	init_mm.brk = (unsigned long)0;
 
 	init_leds();
-	id = get_dsp_rev_id();
-
-	printk(KERN_INFO
-	       "Blackfin support (C) 2004-2006 Analog Devices, Inc.\n");
-	printk(KERN_INFO "Compiled for ADSP-%s Rev. 0.%d\n", CPU,
-	       get_compiled_rev_id());
-	if (id != get_compiled_rev_id())
-		printk(KERN_ERR
-		       "Warning: Compiled for Rev %d, but running on Rev %d\n",
-			get_compiled_rev_id(), id );
-	if (id < SUPPORTED_DSPID)
-		printk(KERN_ERR
-		       "Warning: Unsupported Chip Revision ADSP-%s Rev. 0.%d detected\n",
-		       CPU, id);
-	printk(KERN_INFO
-	       "Blackfin uClinux support by http://blackfin.uclinux.org/\n");
+
+	printk(KERN_INFO "Blackfin support (C) 2004-2007 Analog Devices, Inc.\n");
+	printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
+	if (bfin_revid() != bfin_compiled_revid())
+		printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
+		       bfin_compiled_revid(), bfin_revid());
+	if (bfin_revid() < SUPPORTED_REVID)
+		printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
+		       CPU, bfin_revid());
+	printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
 
 	printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu Mhz System Clock\n",
 	       cclk / 1000000,  sclk / 1000000);
 
 #if defined(ANOMALY_05000273)
 	if ((cclk >> 1) <= sclk)
-		printk(KERN_ERR
-		       "\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
+		printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
 #endif
 
 	printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);

@@ -778,21 +743,19 @@ EXPORT_SYMBOL(get_sclk);
 static int show_cpuinfo(struct seq_file *m, void *v)
 {
 	char *cpu, *mmu, *fpu, *name;
-#ifdef CONFIG_BLKFIN_CACHE_LOCK
-	int lock;
-#endif
+	uint32_t revid;
 
 	u_long cclk = 0, sclk = 0;
-	u_int id, dcache_size = 0, dsup_banks = 0;
+	u_int dcache_size = 0, dsup_banks = 0;
 
 	cpu = CPU;
 	mmu = "none";
 	fpu = "none";
+	revid = bfin_revid();
 	name = bfin_board_name;
 
 	cclk = get_cclk();
 	sclk = get_sclk();
-	id = get_dsp_rev_id();
 
 	seq_printf(m, "CPU:\t\tADSP-%s Rev. 0.%d\n"
 		   "MMU:\t\t%s\n"

@@ -801,7 +764,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
 		   "System Clock:\t%9lu Hz\n"
 		   "BogoMips:\t%lu.%02lu\n"
 		   "Calibration:\t%lu loops\n",
-		   cpu, id, mmu, fpu,
+		   cpu, revid, mmu, fpu,
 		   cclk,
 		   sclk,
 		   (loops_per_jiffy * HZ) / 500000,

@@ -856,8 +819,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
 		   dsup_banks, BLKFIN_DSUBBANKS, BLKFIN_DWAYS,
 		   BLKFIN_DLINES);
 #ifdef CONFIG_BLKFIN_CACHE_LOCK
-	lock = read_iloc();
-	switch (lock) {
+	switch (read_iloc()) {
 	case WAY0_L:
 		seq_printf(m, "Way0 Locked-Down\n");
 		break;
include/asm-blackfin/mach-bf533/bf533.h +1 -1
index 095ca36..185fc12 100644
@@ -30,7 +30,7 @@
 #ifndef __MACH_BF533_H__
 #define __MACH_BF533_H__
 
-#define SUPPORTED_DSPID 2
+#define SUPPORTED_REVID 2
 
 #define OFFSET_(x) ((x) & 0x0000FFFF)
include/asm-blackfin/mach-bf537/bf537.h +1 -1
index 05b664f..b8924cd 100644
@@ -30,7 +30,7 @@
 #ifndef __MACH_BF537_H__
 #define __MACH_BF537_H__
 
-#define SUPPORTED_DSPID 2
+#define SUPPORTED_REVID 2
 
 /* Masks for generic ERROR IRQ demultiplexing used in int-priority-sc.c */
include/asm-blackfin/mach-bf561/bf561.h +1 -1
index ded1796..96a5d3a 100644
@@ -30,7 +30,7 @@
 #ifndef __MACH_BF561_H__
 #define __MACH_BF561_H__
 
-#define SUPPORTED_DSPID		0x3
+#define SUPPORTED_REVID		0x3
 
 #define OFFSET_(x) ((x) & 0x0000FFFF)
 #define L1_ISRAM		0xFFA00000
include/asm-blackfin/processor.h +25 -0
index 299c493..997465c 100644
@@ -7,6 +7,7 @@
  */
 #define current_text_addr() ({ __label__ _l; _l: &&_l;})
 
+#include <asm/blackfin.h>
 #include <asm/segment.h>
 #include <linux/compiler.h>
 

@@ -102,4 +103,28 @@ unsigned long get_wchan(struct task_struct *p);
 
 #define cpu_relax()    	barrier()
 
+/* Get the Silicon Revision of the chip */
+static inline uint32_t bfin_revid(void)
+{
+	/* stored in the upper 4 bits */
+	return bfin_read_CHIPID() >> 28;
+}
+
+static inline uint32_t bfin_compiled_revid(void)
+{
+#if defined(CONFIG_BF_REV_0_0)
+	return 0;
+#elif defined(CONFIG_BF_REV_0_1)
+	return 1;
+#elif defined(CONFIG_BF_REV_0_2)
+	return 2;
+#elif defined(CONFIG_BF_REV_0_3)
+	return 3;
+#elif defined(CONFIG_BF_REV_0_4)
+	return 4;
+#elif defined(CONFIG_BF_REV_0_5)
+	return 5;
+#endif
+}
+
 #endif
Signature · 1 line
1.5.1.2
author
#4 lore raw

PATCH 4/7 blackfin arch: need linux/tty.h header for console_init() prototype

In reply to Bryan Wu
Signed-off-by Bryan Wu <[email protected]>
---
 arch/blackfin/kernel/setup.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)
arch/blackfin/kernel/setup.c +1 -0
index 724fd7a..342bb8d 100644
@@ -34,6 +34,7 @@
 #include <linux/cpu.h>
 #include <linux/module.h>
 #include <linux/console.h>
+#include <linux/tty.h>
 
 #include <linux/ext2_fs.h>
 #include <linux/cramfs_fs.h>
Signature · 1 line
1.5.1.2
author
#5 lore raw

PATCH 5/7 blackfin arch: convert most blackfin specific spi register settings to common spi framework settings

In reply to Bryan Wu

(mostly drop the MSTR bit as our bus handles that and convert CHPA/CPOL into SPI_MODE_#)

Signed-off-by Bryan Wu <[email protected]>
---
 arch/blackfin/mach-bf533/boards/cm_bf533.c      |    4 +--
 arch/blackfin/mach-bf533/boards/ezkit.c         |    4 +--
 arch/blackfin/mach-bf533/boards/stamp.c         |   10 ++----
 arch/blackfin/mach-bf537/boards/cm_bf537.c      |    8 ++---
 arch/blackfin/mach-bf537/boards/generic_board.c |    5 +--
 arch/blackfin/mach-bf537/boards/pnav10.c        |   16 ++++-----
 arch/blackfin/mach-bf537/boards/stamp.c         |   37 ++++++++++------------
 arch/blackfin/mach-bf561/boards/cm_bf561.c      |    7 +---
 arch/blackfin/mach-bf561/boards/ezkit.c         |    1 -
 9 files changed, 36 insertions(+), 56 deletions(-)
arch/blackfin/mach-bf533/boards/cm_bf533.c +1 -3
index 8cf7865..23a7f60 100644
@@ -71,21 +71,18 @@ static struct flash_platform_data bfin_spi_flash_data = {
 
 /* SPI flash chip (m25p64) */
 static struct bfin5xx_spi_chip spi_flash_chip_info = {
-	.ctl_reg = 0x1C00,       /* with enable bit unset */
 	.enable_dma = 0,         /* use dma transfer with this chip*/
 	.bits_per_word = 8,
 };
 
 /* SPI ADC chip */
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
-	.ctl_reg = 0x1500,
 	.enable_dma = 1,         /* use dma transfer with this chip*/
 	.bits_per_word = 16,
 };
 
 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
-	.ctl_reg = 0x1000,
 	.enable_dma = 0,
 	.bits_per_word = 16,
 };

@@ -100,6 +97,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 		.chip_select = 1,           /* Framework chip select. On STAMP537 it is SPISSEL1*/
 		.platform_data = &bfin_spi_flash_data,
 		.controller_data = &spi_flash_chip_info,
+		.mode = SPI_MODE_3,
 	},{
 		.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 		.max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
arch/blackfin/mach-bf533/boards/ezkit.c +1 -3
index 59970f7..747298e 100644
@@ -105,7 +105,6 @@ static struct flash_platform_data bfin_spi_flash_data = {
 
 /* SPI flash chip (m25p64) */
 static struct bfin5xx_spi_chip spi_flash_chip_info = {
-	.ctl_reg = 0x1C00,       /* with enable bit unset */
 	.enable_dma = 0,         /* use dma transfer with this chip*/
 	.bits_per_word = 8,
 };

@@ -114,7 +113,6 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
 /* SPI ADC chip */
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
-	.ctl_reg = 0x1000,
 	.enable_dma = 1,         /* use dma transfer with this chip*/
 	.bits_per_word = 16,
 };

@@ -122,7 +120,6 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
 
 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
-	.ctl_reg = 0x1000,
 	.enable_dma = 0,
 	.bits_per_word = 16,
 };

@@ -138,6 +135,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 		.chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
 		.platform_data = &bfin_spi_flash_data,
 		.controller_data = &spi_flash_chip_info,
+		.mode = SPI_MODE_3,
 	},
 #endif
arch/blackfin/mach-bf533/boards/stamp.c +4 -6
index 891118b..d7b3a5d 100644
@@ -128,7 +128,6 @@ static struct flash_platform_data bfin_spi_flash_data = {
 
 /* SPI flash chip (m25p64) */
 static struct bfin5xx_spi_chip spi_flash_chip_info = {
-	.ctl_reg = 0x1C00,       /* with enable bit unset */
 	.enable_dma = 0,         /* use dma transfer with this chip*/
 	.bits_per_word = 8,
 };

@@ -137,7 +136,6 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
 /* SPI ADC chip */
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
-	.ctl_reg = 0x1000,
 	.enable_dma = 1,         /* use dma transfer with this chip*/
 	.bits_per_word = 16,
 };

@@ -145,7 +143,6 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
 
 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
-	.ctl_reg = 0x1000,
 	.enable_dma = 0,
 	.bits_per_word = 16,
 };

@@ -153,7 +150,7 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
 
 #if defined(CONFIG_PBX)
 static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
-	.ctl_reg	= 0x1c04,
+	.ctl_reg	= 0x4, /* send zero */
 	.enable_dma	= 0,
 	.bits_per_word	= 8,
 	.cs_change_per_word = 1,

@@ -162,7 +159,6 @@ static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
 
 #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
 static struct bfin5xx_spi_chip ad5304_chip_info = {
-	.ctl_reg = 0x1000 | CPOL,
 	.enable_dma = 0,
 	.bits_per_word = 16,
 };

@@ -178,6 +174,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 		.chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
 		.platform_data = &bfin_spi_flash_data,
 		.controller_data = &spi_flash_chip_info,
+		.mode = SPI_MODE_3,
 	},
 #endif
 

@@ -209,14 +206,15 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 		.bus_num	= 1,
 		.chip_select	= 3,
 		.controller_data= &spi_si3xxx_chip_info,
+		.mode = SPI_MODE_3,
 	},
-
 	{
 		.modalias	= "fxo-spi",
 		.max_speed_hz	= 12500000,     /* max spi clock (SCK) speed in HZ */
 		.bus_num	= 1,
 		.chip_select	= 2,
 		.controller_data= &spi_si3xxx_chip_info,
+		.mode = SPI_MODE_3,
 	},
 #endif
arch/blackfin/mach-bf537/boards/cm_bf537.c +3 -5
index a16bf58..6a60618 100644
@@ -73,7 +73,6 @@ static struct flash_platform_data bfin_spi_flash_data = {
 
 /* SPI flash chip (m25p64) */
 static struct bfin5xx_spi_chip spi_flash_chip_info = {
-	.ctl_reg = 0x1C00,       /* with enable bit unset */
 	.enable_dma = 0,         /* use dma transfer with this chip*/
 	.bits_per_word = 8,
 };

@@ -82,7 +81,6 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
 /* SPI ADC chip */
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
-	.ctl_reg = 0x1000,
 	.enable_dma = 1,         /* use dma transfer with this chip*/
 	.bits_per_word = 16,
 };

@@ -90,7 +88,6 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
 
 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
-	.ctl_reg = 0x1000,
 	.enable_dma = 0,
 	.bits_per_word = 16,
 };

@@ -98,7 +95,6 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
 
 #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
 static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
-	.ctl_reg = 0x1000,
 	.enable_dma = 0,
 	.bits_per_word = 16,
 };

@@ -106,7 +102,6 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
 
 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
 static struct bfin5xx_spi_chip spi_mmc_chip_info = {
-	.ctl_reg = 0x1c00,
 	.enable_dma = 1,
 	.bits_per_word = 8,
 };

@@ -122,6 +117,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 		.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 		.platform_data = &bfin_spi_flash_data,
 		.controller_data = &spi_flash_chip_info,
+		.mode = SPI_MODE_3,
 	},
 #endif
 

@@ -164,6 +160,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 		.chip_select = 7,
 		.platform_data = NULL,
 		.controller_data = &spi_mmc_chip_info,
+		.mode = SPI_MODE_3,
 	},
 	{
 		.modalias = "spi_mmc",

@@ -172,6 +169,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 		.chip_select = CONFIG_SPI_MMC_CS_CHAN,
 		.platform_data = NULL,
 		.controller_data = &spi_mmc_chip_info,
+		.mode = SPI_MODE_3,
 	},
 #endif
 };
arch/blackfin/mach-bf537/boards/generic_board.c +1 -4
index 5bf5ed1..9019c0e 100644
@@ -273,7 +273,6 @@ static struct flash_platform_data bfin_spi_flash_data = {
 
 /* SPI flash chip (m25p64) */
 static struct bfin5xx_spi_chip spi_flash_chip_info = {
-	.ctl_reg = 0x1C00,       /* with enable bit unset */
 	.enable_dma = 0,         /* use dma transfer with this chip*/
 	.bits_per_word = 8,
 };

@@ -283,7 +282,6 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 	|| defined(CONFIG_SPI_ADC_BF533_MODULE)
 /* SPI ADC chip */
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
-	.ctl_reg = 0x1000,
 	.enable_dma = 1,         /* use dma transfer with this chip*/
 	.bits_per_word = 16,
 };

@@ -292,7 +290,6 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
 #if defined(CONFIG_SND_BLACKFIN_AD1836) \
 	|| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
-	.ctl_reg = 0x1000,
 	.enable_dma = 0,
 	.bits_per_word = 16,
 };

@@ -300,7 +297,6 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
 
 #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
 static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
-	.ctl_reg = 0x1000,
 	.enable_dma = 0,
 	.bits_per_word = 16,
 };

@@ -316,6 +312,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 		.chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 		.platform_data = &bfin_spi_flash_data,
 		.controller_data = &spi_flash_chip_info,
+		.mode = SPI_MODE_3,
 	},
 #endif
arch/blackfin/mach-bf537/boards/pnav10.c +7 -9
index 83bf0a8..40d3a1b 100644
@@ -258,7 +258,6 @@ static struct flash_platform_data bfin_spi_flash_data = {
 
 /* SPI flash chip (m25p64) */
 static struct bfin5xx_spi_chip spi_flash_chip_info = {
-	.ctl_reg = 0x1C00,       /* with enable bit unset */
 	.enable_dma = 0,         /* use dma transfer with this chip*/
 	.bits_per_word = 8,
 };

@@ -268,7 +267,6 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 	|| defined(CONFIG_SPI_ADC_BF533_MODULE)
 /* SPI ADC chip */
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
-	.ctl_reg = 0x1000,
 	.enable_dma = 1,         /* use dma transfer with this chip*/
 	.bits_per_word = 16,
 };

@@ -277,7 +275,6 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
 #if defined(CONFIG_SND_BLACKFIN_AD1836) \
 	|| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
-	.ctl_reg = 0x1000,
 	.enable_dma = 0,
 	.bits_per_word = 16,
 };

@@ -285,7 +282,6 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
 
 #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
 static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
-	.ctl_reg = 0x1000,
 	.enable_dma = 0,
 	.bits_per_word = 16,
 };

@@ -293,7 +289,6 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
 
 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
 static struct bfin5xx_spi_chip spi_mmc_chip_info = {
-	.ctl_reg = 0x1c00,
 	.enable_dma = 1,
 	.bits_per_word = 8,
 };

@@ -301,7 +296,7 @@ static struct bfin5xx_spi_chip spi_mmc_chip_info = {
 
 #if defined(CONFIG_PBX)
 static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
-	.ctl_reg	= 0x1c04,
+	.ctl_reg	= 0x4, /* send zero */
 	.enable_dma	= 0,
 	.bits_per_word	= 8,
 	.cs_change_per_word = 1,

@@ -312,7 +307,6 @@ static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
 	.cs_change_per_word = 1,
-	.ctl_reg = 0x1000,
 	.enable_dma = 0,
 	.bits_per_word = 16,
 };

@@ -343,6 +337,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 		.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 		.platform_data = &bfin_spi_flash_data,
 		.controller_data = &spi_flash_chip_info,
+		.mode = SPI_MODE_3,
 	},
 #endif
 

@@ -385,6 +380,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 		.chip_select = 7,
 		.platform_data = NULL,
 		.controller_data = &spi_mmc_chip_info,
+		.mode = SPI_MODE_3,
 	},
 	{
 		.modalias = "spi_mmc",

@@ -393,7 +389,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 		.chip_select = CONFIG_SPI_MMC_CS_CHAN,
 		.platform_data = NULL,
 		.controller_data = &spi_mmc_chip_info,
-},
+		.mode = SPI_MODE_3,
+	},
 #endif
 #if defined(CONFIG_PBX)
 	{

@@ -402,14 +399,15 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 		.bus_num	= 1,
 		.chip_select	= 3,
 		.controller_data= &spi_si3xxx_chip_info,
+		.mode = SPI_MODE_3,
 	},
-
 	{
 		.modalias	= "fxo-spi",
 		.max_speed_hz	= 12500000,     /* max spi clock (SCK) speed in HZ */
 		.bus_num	= 1,
 		.chip_select	= 2,
 		.controller_data= &spi_si3xxx_chip_info,
+		.mode = SPI_MODE_3,
 	},
 #endif
 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
arch/blackfin/mach-bf537/boards/stamp.c +17 -20
index a4219df..ba2f875 100644
@@ -307,7 +307,6 @@ static struct flash_platform_data bfin_spi_flash_data = {
 
 /* SPI flash chip (m25p64) */
 static struct bfin5xx_spi_chip spi_flash_chip_info = {
-	.ctl_reg = 0x1C00,       /* with enable bit unset */
 	.enable_dma = 0,         /* use dma transfer with this chip*/
 	.bits_per_word = 8,
 };

@@ -317,7 +316,6 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 	|| defined(CONFIG_SPI_ADC_BF533_MODULE)
 /* SPI ADC chip */
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
-	.ctl_reg = 0x1000,
 	.enable_dma = 1,         /* use dma transfer with this chip*/
 	.bits_per_word = 16,
 };

@@ -326,7 +324,6 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
 #if defined(CONFIG_SND_BLACKFIN_AD1836) \
 	|| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
-	.ctl_reg = 0x1000,
 	.enable_dma = 0,
 	.bits_per_word = 16,
 };

@@ -334,7 +331,6 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
 
 #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
 static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
-	.ctl_reg = 0x1000,
 	.enable_dma = 0,
 	.bits_per_word = 16,
 };

@@ -342,7 +338,6 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
 
 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
 static struct bfin5xx_spi_chip spi_mmc_chip_info = {
-	.ctl_reg = 0x1c00,
 	.enable_dma = 1,
 	.bits_per_word = 8,
 };

@@ -350,7 +345,7 @@ static struct bfin5xx_spi_chip spi_mmc_chip_info = {
 
 #if defined(CONFIG_PBX)
 static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
-	.ctl_reg	= 0x1c04,
+	.ctl_reg	= 0x4, /* send zero */
 	.enable_dma	= 0,
 	.bits_per_word	= 8,
 	.cs_change_per_word = 1,

@@ -359,7 +354,6 @@ static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
 
 #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
 static struct bfin5xx_spi_chip ad5304_chip_info = {
-	.ctl_reg = 0x1000 | CPOL,
 	.enable_dma = 0,
 	.bits_per_word = 16,
 };

@@ -368,7 +362,6 @@ static struct bfin5xx_spi_chip ad5304_chip_info = {
 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
 //	.cs_change_per_word = 1,
-	.ctl_reg = 0x1000,
 	.enable_dma = 0,
 	.bits_per_word = 16,
 };

@@ -399,6 +392,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 		.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 		.platform_data = &bfin_spi_flash_data,
 		.controller_data = &spi_flash_chip_info,
+		.mode = SPI_MODE_3,
 	},
 #endif
 

@@ -441,6 +435,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 		.chip_select = 0,
 		.platform_data = NULL,
 		.controller_data = &spi_mmc_chip_info,
+		.mode = SPI_MODE_3,
 	},
 	{
 		.modalias = "spi_mmc",

@@ -449,7 +444,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 		.chip_select = CONFIG_SPI_MMC_CS_CHAN,
 		.platform_data = NULL,
 		.controller_data = &spi_mmc_chip_info,
-},
+		.mode = SPI_MODE_3,
+	},
 #endif
 #if defined(CONFIG_PBX)
 	{

@@ -458,20 +454,21 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 		.bus_num	= 1,
 		.chip_select	= 3,
 		.controller_data= &spi_si3xxx_chip_info,
+		.mode = SPI_MODE_3,
 	},
-
 	{
 		.modalias	= "fxo-spi",
 		.max_speed_hz	= 12500000,     /* max spi clock (SCK) speed in HZ */
 		.bus_num	= 1,
 		.chip_select	= 2,
 		.controller_data= &spi_si3xxx_chip_info,
+		.mode = SPI_MODE_3,
 	},
 #endif
 #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
 	{
 		.modalias = "ad5304_spi",
-		.max_speed_hz	= 1000000,     /* max spi clock (SCK) speed in HZ */
+		.max_speed_hz = 1250000,     /* max spi clock (SCK) speed in HZ */
 		.bus_num = 1,
 		.chip_select = 2,
 		.platform_data = NULL,

@@ -480,15 +477,15 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 	},
 #endif
 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
-{
-	.modalias		= "ad7877",
-	.platform_data		= &bfin_ad7877_ts_info,
-	.irq			= IRQ_PF6,
-	.max_speed_hz	= 12500000,     /* max spi clock (SCK) speed in HZ */
-	.bus_num	= 1,
-	.chip_select  = 1,
-	.controller_data = &spi_ad7877_chip_info,
-},
+	{
+		.modalias		= "ad7877",
+		.platform_data		= &bfin_ad7877_ts_info,
+		.irq			= IRQ_PF6,
+		.max_speed_hz	= 12500000,     /* max spi clock (SCK) speed in HZ */
+		.bus_num	= 1,
+		.chip_select  = 1,
+		.controller_data = &spi_ad7877_chip_info,
+	},
 #endif
 };
arch/blackfin/mach-bf561/boards/cm_bf561.c +2 -5
index 06a5e54..6824e95 100644
@@ -72,7 +72,6 @@ static struct flash_platform_data bfin_spi_flash_data = {
 
 /* SPI flash chip (m25p64) */
 static struct bfin5xx_spi_chip spi_flash_chip_info = {
-	.ctl_reg = 0x1C00,       /* with enable bit unset */
 	.enable_dma = 0,         /* use dma transfer with this chip*/
 	.bits_per_word = 8,
 };

@@ -81,7 +80,6 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
 /* SPI ADC chip */
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
-	.ctl_reg = 0x1000,
 	.enable_dma = 1,         /* use dma transfer with this chip*/
 	.bits_per_word = 16,
 };

@@ -89,7 +87,6 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
 
 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
-	.ctl_reg = 0x1000,
 	.enable_dma = 0,
 	.bits_per_word = 16,
 };

@@ -97,7 +94,6 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
 
 #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
 static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
-	.ctl_reg = 0x1000,
 	.enable_dma = 0,
 	.bits_per_word = 16,
 };

@@ -105,7 +101,6 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
 
 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
 static struct bfin5xx_spi_chip spi_mmc_chip_info = {
-	.ctl_reg = 0x1c00,
 	.enable_dma = 1,
 	.bits_per_word = 8,
 };

@@ -121,6 +116,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 		.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 		.platform_data = &bfin_spi_flash_data,
 		.controller_data = &spi_flash_chip_info,
+		.mode = SPI_MODE_3,
 	},
 #endif
 

@@ -161,6 +157,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 		.chip_select = CONFIG_SPI_MMC_CS_CHAN,
 		.platform_data = NULL,
 		.controller_data = &spi_mmc_chip_info,
+		.mode = SPI_MODE_3,
 	},
 #endif
 };
arch/blackfin/mach-bf561/boards/ezkit.c +0 -1
index 4d53322..14eb4f9 100644
@@ -86,7 +86,6 @@ static struct platform_device bfin_uart_device = {
 #if defined(CONFIG_SND_BLACKFIN_AD1836) \
 	|| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
-	.ctl_reg = 0x1000,
 	.enable_dma = 0,
 	.bits_per_word = 16,
 };
Signature · 1 line
1.5.1.2
author
#6 lore raw

PATCH 6/7 blackfin serial core driver: UART1 should depend on BF534/BF536/BF537, remove experimental marking from on-chip serial core driver and make options less wordy.

In reply to Bryan Wu
Signed-off-by Bryan Wu <[email protected]>
---
 drivers/serial/Kconfig |   12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)
drivers/serial/Kconfig +6 -6
index 3484834..e8efe93 100644
@@ -513,8 +513,8 @@ config SERIAL_SA1100_CONSOLE
 	  kernel at boot time.)
 
 config SERIAL_BFIN
-	tristate "Blackfin serial port support (EXPERIMENTAL)"
-	depends on BFIN && EXPERIMENTAL
+	tristate "Blackfin serial port support"
+	depends on BFIN
 	select SERIAL_CORE
 	select SERIAL_BFIN_UART0 if (BF531 || BF532 || BF533 || BF561)
 	help

@@ -529,7 +529,7 @@ config SERIAL_BFIN_CONSOLE
 	select SERIAL_CORE_CONSOLE
 
 choice
-	prompt  "Blackfin UART Mode"
+	prompt "UART Mode"
 	depends on SERIAL_BFIN
 	default SERIAL_BFIN_DMA
 	help

@@ -537,14 +537,14 @@ choice
 	  of CPUs
 
 config SERIAL_BFIN_DMA
-	bool "Blackfin UART DMA mode"
+	bool "DMA mode"
 	depends on DMA_UNCACHED_1M
 	help
 	  This driver works under DMA mode. If this option is selected, the
 	  blackfin simple dma driver is also enabled.
 
 config SERIAL_BFIN_PIO
-	bool "Blackfin UART PIO mode"
+	bool "PIO mode"
 	help
 	  This driver works under PIO mode.
 

@@ -581,7 +581,7 @@ config UART0_RTS_PIN
 
 config SERIAL_BFIN_UART1
 	bool "Enable UART1"
-	depends on SERIAL_BFIN && BF537
+	depends on SERIAL_BFIN && (BF534 || BF536 || BF537)
 	help
 	  Enable UART1
Signature · 1 line
1.5.1.2
author
#7 lore raw

PATCH 7/7 blackfin spi controller driver: update according to David Brownell's review

In reply to Bryan Wu

(http://lkml.org/lkml/2007/4/16/333)

Signed-off-by Bryan Wu <[email protected]>
---
 drivers/spi/Kconfig       |   11 +-
 drivers/spi/Makefile      |    4 +-
 drivers/spi/spi_bfin5xx.c |  345 ++++++++++++++++++++++++---------------------
 3 files changed, 193 insertions(+), 167 deletions(-)
drivers/spi/Kconfig +6 -5
index 1ab2ed1..584ed9f 100644
@@ -58,6 +58,12 @@ config SPI_ATMEL
 	  This selects a driver for the Atmel SPI Controller, present on
 	  many AT32 (AVR32) and AT91 (ARM) chips.
 
+config SPI_BFIN
+	tristate "SPI controller driver for ADI Blackfin5xx"
+	depends on SPI_MASTER && BFIN
+	help
+	  This is the SPI controller master driver for Blackfin 5xx processor.
+
 config SPI_BITBANG
 	tristate "Bitbanging SPI master"
 	depends on SPI_MASTER && EXPERIMENTAL

@@ -165,11 +171,6 @@ config SPI_SPIDEV
 #
 # Add new SPI protocol masters in alphabetical order above this line
 #
-config SPI_BFIN
-	tristate "SPI controller driver for ADI Blackfin5xx"
-	depends on SPI_MASTER && BFIN
-	help
-	  This is the SPI controller master driver for Blackfin 5xx processor.
 
 # (slave support would go here)
drivers/spi/Makefile +2 -2
index f9dcdd1..4cc5e99 100644
@@ -11,8 +11,9 @@ endif
 obj-$(CONFIG_SPI_MASTER)		+= spi.o
 
 # SPI master controller drivers (bus)
-obj-$(CONFIG_SPI_BITBANG)		+= spi_bitbang.o
 obj-$(CONFIG_SPI_ATMEL)			+= atmel_spi.o
+obj-$(CONFIG_SPI_BFIN)			+= spi_bfin5xx.o
+obj-$(CONFIG_SPI_BITBANG)		+= spi_bitbang.o
 obj-$(CONFIG_SPI_BUTTERFLY)		+= spi_butterfly.o
 obj-$(CONFIG_SPI_IMX)			+= spi_imx.o
 obj-$(CONFIG_SPI_PXA2XX)		+= pxa2xx_spi.o

@@ -20,7 +21,6 @@ obj-$(CONFIG_SPI_OMAP_UWIRE)		+= omap_uwire.o
 obj-$(CONFIG_SPI_MPC83xx)		+= spi_mpc83xx.o
 obj-$(CONFIG_SPI_S3C24XX_GPIO)		+= spi_s3c24xx_gpio.o
 obj-$(CONFIG_SPI_S3C24XX)		+= spi_s3c24xx.o
-obj-$(CONFIG_SPI_BFIN)			+= spi_bfin5xx.o
 # 	... add above this line ...
 
 # SPI protocol drivers (device/link on bus)
drivers/spi/spi_bfin5xx.c +185 -160

699 lines not on this page · raw message

Signature · 1 line
1.5.1.2