Skip to contentSkip to conversation

PHYS_OFFSET fix and cleanup [take #2]

PATCH Applied Franck Bui-Huu 2 participants 11 messages Jun 4, 2007 – Jun 7, 2007 MIPS

lore
Share & tools
lore

Franck Bui-Huu

author
#0 lore raw

cover PHYS_OFFSET fix and cleanup [take #2]

Hi Ralf,

This patchset is an updated version of the following one:

http://marc.info/?l=linux-mips&m=117499082903803&w=2
http://marc.info/?l=linux-mips&m=117499090603935&w=2
http://marc.info/?l=linux-mips&m=117499083003809&w=2
http://marc.info/?l=linux-mips&m=117499086003851&w=2
http://marc.info/?l=linux-mips&m=117499088403902&w=2

It builds on ip-{22,27,32} now and have more clean up for spaces.h.

Please consider,

Franck

author
#1 lore raw

PATCH 1/5 Allow generic spaces.h to be included by platform specific ones

From: Franck Bui-Huu <[email protected]>

Before this patch, when a platform needed to customize one constant in spaces.h, they need to redefine all of them.

Now they can just redefine one constant and include the generic file header at the end:

	#include <asm/mach-generic/spaces.h>

This patch doesn't allow to redefine CAC_BASE, IO_BASE and UNCAC_BASE for 32 bits platforms because there's no need to do so.

This will avoid some macro duplications. It's important specially if we'll add complex macros.

Signed-off-by Franck Bui-Huu <[email protected]>
---
 include/asm-mips/mach-generic/spaces.h |   18 ++++++++++++++++
 include/asm-mips/mach-ip22/spaces.h    |   33 ++--------------------------
 include/asm-mips/mach-ip27/spaces.h    |    9 +------
 include/asm-mips/mach-ip32/spaces.h    |   36 --------------------------------
 4 files changed, 23 insertions(+), 73 deletions(-)
 delete mode 100644 include/asm-mips/mach-ip32/spaces.h
include/asm-mips/mach-generic/spaces.h +18 -0
index 0ae9997..9a3c521 100644
@@ -16,13 +16,18 @@
 #define CAC_BASE		0x80000000
 #define IO_BASE			0xa0000000
 #define UNCAC_BASE		0xa0000000
+
+#ifndef MAP_BASE
 #define MAP_BASE		0xc0000000
+#endif
 
 /*
  * This handles the memory map.
  * We handle pages at KSEG0 for kernels with 32 bit address space.
  */
+#ifndef PAGE_OFFSET
 #define PAGE_OFFSET		0x80000000UL
+#endif
 
 /*
  * Memory above this physical address will be considered highmem.

@@ -38,11 +43,13 @@
 /*
  * This handles the memory map.
  */
+#ifndef PAGE_OFFSET
 #ifdef CONFIG_DMA_NONCOHERENT
 #define PAGE_OFFSET	0x9800000000000000UL
 #else
 #define PAGE_OFFSET	0xa800000000000000UL
 #endif
+#endif
 
 /*
  * Memory above this physical address will be considered highmem.

@@ -53,14 +60,25 @@
 #define HIGHMEM_START		(1UL << 59UL)
 #endif
 
+#ifndef CAC_BASE
 #ifdef CONFIG_DMA_NONCOHERENT
 #define CAC_BASE		0x9800000000000000UL
 #else
 #define CAC_BASE		0xa800000000000000UL
 #endif
+#endif
+
+#ifndef IO_BASE
 #define IO_BASE			0x9000000000000000UL
+#endif
+
+#ifndef UNCAC_BASE
 #define UNCAC_BASE		0x9000000000000000UL
+#endif
+
+#ifndef MAP_BASE
 #define MAP_BASE		0xc000000000000000UL
+#endif
 
 #define TO_PHYS(x)		(             ((x) & TO_PHYS_MASK))
 #define TO_CAC(x)		(CAC_BASE   | ((x) & TO_PHYS_MASK))
include/asm-mips/mach-ip22/spaces.h +3 -30
index ab20c02..7f9fa6f 100644
@@ -11,44 +11,17 @@
 #define _ASM_MACH_IP22_SPACES_H
 
 
-#ifdef CONFIG_32BIT
-
-#define CAC_BASE		0x80000000
-#define IO_BASE			0xa0000000
-#define UNCAC_BASE		0xa0000000
-#define MAP_BASE		0xc0000000
-
-/*
- * This handles the memory map.
- * We handle pages at KSEG0 for kernels with 32 bit address space.
- */
-#define PAGE_OFFSET		0x80000000UL
-
-/*
- * Memory above this physical address will be considered highmem.
- */
-#ifndef HIGHMEM_START
-#define HIGHMEM_START		0x20000000UL
-#endif
-
-#endif /* CONFIG_32BIT */
-
 #ifdef CONFIG_64BIT
-#define PAGE_OFFSET		0xffffffff80000000UL
 
-#ifndef HIGHMEM_START
-#define HIGHMEM_START		(1UL << 59UL)
-#endif
+#define PAGE_OFFSET		0xffffffff80000000UL
 
 #define CAC_BASE		0xffffffff80000000
 #define IO_BASE			0xffffffffa0000000
 #define UNCAC_BASE		0xffffffffa0000000
 #define MAP_BASE		0xc000000000000000
 
-#define TO_PHYS(x)		(             ((x) & TO_PHYS_MASK))
-#define TO_CAC(x)		(CAC_BASE   | ((x) & TO_PHYS_MASK))
-#define TO_UNCAC(x)		(UNCAC_BASE | ((x) & TO_PHYS_MASK))
-
 #endif /* CONFIG_64BIT */
 
+#include <asm/mach-generic/spaces.h>
+
 #endif /* __ASM_MACH_IP22_SPACES_H */
include/asm-mips/mach-ip27/spaces.h +2 -7
index 45e6178..b18802a 100644
@@ -14,22 +14,17 @@
  * IP27 uses the R10000's uncached attribute feature.  Attribute 3 selects
  * uncached memory addressing.
  */
-#define CAC_BASE		0xa800000000000000
 
 #define HSPEC_BASE		0x9000000000000000
 #define IO_BASE			0x9200000000000000
 #define MSPEC_BASE		0x9400000000000000
 #define UNCAC_BASE		0x9600000000000000
-#define MAP_BASE		0xc000000000000000
 
-#define TO_PHYS(x)		(             ((x) & TO_PHYS_MASK))
-#define TO_CAC(x)		(CAC_BASE   | ((x) & TO_PHYS_MASK))
-#define TO_UNCAC(x)		(UNCAC_BASE | ((x) & TO_PHYS_MASK))
 #define TO_MSPEC(x)		(MSPEC_BASE | ((x) & TO_PHYS_MASK))
 #define TO_HSPEC(x)		(HSPEC_BASE | ((x) & TO_PHYS_MASK))
 
-#define PAGE_OFFSET		CAC_BASE
-
 #define HIGHMEM_START		(~0UL)
 
+#include <asm/mach-generic/spaces.h>
+
 #endif /* _ASM_MACH_IP27_SPACES_H */
include/asm-mips/mach-ip32/spaces.h deleted +0 -36
deleted file mode 100644
index 44abe5c..0000000
@@ -1,36 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 - 1999, 2000, 03, 04, 05 Ralf Baechle ([email protected])
- * Copyright (C) 2000, 2002  Maciej W. Rozycki
- * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
- */
-#ifndef _ASM_MACH_IP32_SPACES_H
-#define _ASM_MACH_IP32_SPACES_H
-
-/*
- * Memory above this physical address will be considered highmem.
- * Fixme: 59 bits is a fictive number and makes assumptions about processors
- * in the distant future.  Nobody will care for a few years :-)
- */
-#ifndef HIGHMEM_START
-#define HIGHMEM_START		(1UL << 59UL)
-#endif
-
-#define CAC_BASE		0x9800000000000000UL
-#define IO_BASE			0x9000000000000000UL
-#define UNCAC_BASE		0x9000000000000000UL
-#define MAP_BASE		0xc000000000000000UL
-
-#define TO_PHYS(x)		(             ((x) & TO_PHYS_MASK))
-#define TO_CAC(x)		(CAC_BASE   | ((x) & TO_PHYS_MASK))
-#define TO_UNCAC(x)		(UNCAC_BASE | ((x) & TO_PHYS_MASK))
-
-/*
- * This handles the memory map.
- */
-#define PAGE_OFFSET		CAC_BASE
-
-#endif /* __ASM_MACH_IP32_SPACES_H */
Signature · 1 line
1.5.1.4
Applied
#2 lore raw

Re: [PATCH 1/5] Allow generic spaces.h to be included by platform specific ones

On Mon, Jun 04, 2007 at 05:46:31PM +0200, Franck Bui-Huu wrote:

Queued up for 2.6.23. Thanks,

Ralf

author
#3 lore raw

PATCH 2/5 Clean up asm-mips/mach-generic/spaces.h

In reply to Franck Bui-Huu

From: Franck Bui-Huu <[email protected]>

PAGE_OFFSET definition is now using CAC_BASE by default.

This patch also reorder some macros to make them appear in the same order for both 32 and 64 bits configs.

It also makes use of const.h generic header file to annotate constants.

Signed-off-by Franck Bui-Huu <[email protected]>
---
 include/asm-mips/mach-generic/spaces.h |   66 +++++++++++++------------------
 1 files changed, 28 insertions(+), 38 deletions(-)
include/asm-mips/mach-generic/spaces.h +28 -38
index 9a3c521..c90900b 100644
@@ -10,74 +10,56 @@
 #ifndef _ASM_MACH_GENERIC_SPACES_H
 #define _ASM_MACH_GENERIC_SPACES_H
 
+#include <linux/const.h>
 
 #ifdef CONFIG_32BIT
 
-#define CAC_BASE		0x80000000
-#define IO_BASE			0xa0000000
-#define UNCAC_BASE		0xa0000000
+#define CAC_BASE		_AC(0x80000000,UL)
+#define IO_BASE			_AC(0xa0000000,UL)
+#define UNCAC_BASE		_AC(0xa0000000,UL)
 
 #ifndef MAP_BASE
-#define MAP_BASE		0xc0000000
-#endif
-
-/*
- * This handles the memory map.
- * We handle pages at KSEG0 for kernels with 32 bit address space.
- */
-#ifndef PAGE_OFFSET
-#define PAGE_OFFSET		0x80000000UL
+#define MAP_BASE		_AC(0xc0000000,UL)
 #endif
 
 /*
  * Memory above this physical address will be considered highmem.
  */
 #ifndef HIGHMEM_START
-#define HIGHMEM_START		0x20000000UL
+#define HIGHMEM_START		_AC(0x20000000,UL)
 #endif
 
 #endif /* CONFIG_32BIT */
 
 #ifdef CONFIG_64BIT
 
-/*
- * This handles the memory map.
- */
-#ifndef PAGE_OFFSET
-#ifdef CONFIG_DMA_NONCOHERENT
-#define PAGE_OFFSET	0x9800000000000000UL
-#else
-#define PAGE_OFFSET	0xa800000000000000UL
-#endif
-#endif
-
-/*
- * Memory above this physical address will be considered highmem.
- * Fixme: 59 bits is a fictive number and makes assumptions about processors
- * in the distant future.  Nobody will care for a few years :-)
- */
-#ifndef HIGHMEM_START
-#define HIGHMEM_START		(1UL << 59UL)
-#endif
-
 #ifndef CAC_BASE
 #ifdef CONFIG_DMA_NONCOHERENT
-#define CAC_BASE		0x9800000000000000UL
+#define CAC_BASE		_AC(0x9800000000000000,UL)
 #else
-#define CAC_BASE		0xa800000000000000UL
+#define CAC_BASE		_AC(0xa800000000000000,UL)
 #endif
 #endif
 
 #ifndef IO_BASE
-#define IO_BASE			0x9000000000000000UL
+#define IO_BASE			_AC(0x9000000000000000,UL)
 #endif
 
 #ifndef UNCAC_BASE
-#define UNCAC_BASE		0x9000000000000000UL
+#define UNCAC_BASE		_AC(0x9000000000000000,UL)
 #endif
 
 #ifndef MAP_BASE
-#define MAP_BASE		0xc000000000000000UL
+#define MAP_BASE		_AC(0xc000000000000000,UL)
+#endif
+
+/*
+ * Memory above this physical address will be considered highmem.
+ * Fixme: 59 bits is a fictive number and makes assumptions about processors
+ * in the distant future.  Nobody will care for a few years :-)
+ */
+#ifndef HIGHMEM_START
+#define HIGHMEM_START		(_AC(1,UL) << _AC(59,UL))
 #endif
 
 #define TO_PHYS(x)		(             ((x) & TO_PHYS_MASK))

@@ -86,4 +68,12 @@
 
 #endif /* CONFIG_64BIT */
 
+/*
+ * This handles the memory map.
+ */
+#ifndef PAGE_OFFSET
+#define PAGE_OFFSET		CAC_BASE
+#endif
+
+
 #endif /* __ASM_MACH_GENERIC_SPACES_H */
Signature · 1 line
1.5.1.4
Applied
#4 lore raw

Re: [PATCH 2/5] Clean up asm-mips/mach-generic/spaces.h

On Mon, Jun 04, 2007 at 05:46:32PM +0200, Franck Bui-Huu wrote:

Queued up for 2.6.23. Thanks,

Ralf

author
#5 lore raw

PATCH 3/5 Make PAGE_OFFSET aware of PHYS_OFFSET

In reply to Franck Bui-Huu

From: Franck Bui-Huu <[email protected]>

For platforms that use PHYS_OFFSET and do not use a mapped kernel, this patch automatically adds PHYS_OFFSET into PAGE_OFFSET. Therefore there are no more needs for them to redefine PAGE_OFFSET.

For mapped kernel, they need to redefine PAGE_OFFSET anyways.

Signed-off-by Franck Bui-Huu <[email protected]>
---
 include/asm-mips/mach-generic/spaces.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
include/asm-mips/mach-generic/spaces.h +1 -1
index c90900b..96c8971 100644
@@ -72,7 +72,7 @@
  * This handles the memory map.
  */
 #ifndef PAGE_OFFSET
-#define PAGE_OFFSET		CAC_BASE
+#define PAGE_OFFSET		(CAC_BASE + PHYS_OFFSET)
 #endif
Signature · 1 line
1.5.1.4
Applied
#6 lore raw

Re: [PATCH 3/5] Make PAGE_OFFSET aware of PHYS_OFFSET

On Mon, Jun 04, 2007 at 05:46:33PM +0200, Franck Bui-Huu wrote:

Queued up for 2.6.23. Thanks,

Ralf

author
#7 lore raw

PATCH 4/5 Move PHY_OFFSET definition in spaces.h

In reply to Franck Bui-Huu

From: Franck Bui-Huu <[email protected]>

Signed-off-by Franck Bui-Huu <[email protected]>
---
 include/asm-mips/mach-generic/spaces.h |    7 +++++++
 include/asm-mips/page.h                |   11 ++---------
 2 files changed, 9 insertions(+), 9 deletions(-)
include/asm-mips/mach-generic/spaces.h +7 -0
index 96c8971..8ca3d70 100644
@@ -12,6 +12,13 @@
 
 #include <linux/const.h>
 
+/*
+ * This gives the physical RAM offset.
+ */
+#ifndef PHYS_OFFSET
+#define PHYS_OFFSET		_AC(0,UL)
+#endif
+
 #ifdef CONFIG_32BIT
 
 #define CAC_BASE		_AC(0x80000000,UL)
include/asm-mips/page.h +2 -9
index 5c3239d..09c60d5 100644
@@ -34,12 +34,8 @@
 
 #ifndef __ASSEMBLY__
 
-/*
- * This gives the physical RAM offset.
- */
-#ifndef PHYS_OFFSET
-#define PHYS_OFFSET		0UL
-#endif
+#include <linux/pfn.h>
+#include <asm/io.h>
 
 /*
  * It's normally defined only for FLATMEM config but it's

@@ -48,9 +44,6 @@
  */
 #define ARCH_PFN_OFFSET		PFN_UP(PHYS_OFFSET)
 
-#include <linux/pfn.h>
-#include <asm/io.h>
-
 extern void clear_page(void * page);
 extern void copy_page(void * to, void * from);
Signature · 1 line
1.5.1.4
Applied
#8 lore raw

Re: [PATCH 4/5] Move PHY_OFFSET definition in spaces.h

On Mon, Jun 04, 2007 at 05:46:34PM +0200, Franck Bui-Huu wrote:

Queued up for 2.6.23. Thanks,

Ralf

author
#9 lore raw

PATCH 5/5 Fix PHYS_OFFSET for 64-bits kernels with 32-bits symbols

In reply to Franck Bui-Huu

From: Franck Bui-Huu <[email protected]>

The current implementation of __pa() for 64-bits kernels with 32-bits symbols is broken. In this configuration, we need 2 values for PAGE_OFFSET, one in XKPHYS and the other in CKSEG0 space.

When the value in CKSEG0 space is used, it doesn't take into account of PHYS_OFFSET. Even worse we can't redefine this value.

The patch restores CPHYSADDR() but in __pa()'s implementation because it removes the need of 2 PAGE_OFFSET.

OTOH, CPHYSADDR() is quite bad when dealing with mapped kernels. So this patch assumes there's no need to deal with such kernel in 64-bits world.

Signed-off-by Franck Bui-Huu <[email protected]>
---
 include/asm-mips/page.h |   10 +++++++---
 1 files changed, 7 insertions(+), 3 deletions(-)
include/asm-mips/page.h +7 -3
index 09c60d5..b92dd8c 100644
@@ -143,11 +143,15 @@ typedef struct { unsigned long pgprot; } pgprot_t;
  * __pa()/__va() should be used only during mem init.
  */
 #if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64)
-#define __pa_page_offset(x)	((unsigned long)(x) < CKSEG0 ? PAGE_OFFSET : CKSEG0)
+#define __pa(x)								\
+({									\
+    unsigned long __x = (unsigned long)(x);				\
+    __x < CKSEG0 ? XPHYSADDR(__x) : CPHYSADDR(__x);			\
+})
 #else
-#define __pa_page_offset(x)	PAGE_OFFSET
+#define __pa(x)								\
+    ((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET)
 #endif
-#define __pa(x)		((unsigned long)(x) - __pa_page_offset(x) + PHYS_OFFSET)
 #define __va(x)		((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET))
 #define __pa_symbol(x)	__pa(RELOC_HIDE((unsigned long)(x),0))
Signature · 1 line
1.5.1.4
Applied
#10 lore raw

Re: [PATCH 5/5] Fix PHYS_OFFSET for 64-bits kernels with 32-bits symbols

On Mon, Jun 04, 2007 at 05:46:35PM +0200, Franck Bui-Huu wrote:

Queued up for 2.6.23. Thanks,

Ralf