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Timer/Performance interrupt fixups

PATCH Applied [email protected] 2 participants 5 messages Jun 21, 2007 MIPS

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#1 lore raw

PATCH 1/1 Fix timer/performance interrupt detection

From: Chris Dearman <[email protected]>

Signed-off-by Chris Dearman <[email protected]>
---
 arch/mips/kernel/traps.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)
arch/mips/kernel/traps.c +4 -4
index b123364..3ea7863 100644
@@ -1372,12 +1372,12 @@ void __init per_cpu_trap_init(void)
 	 */
 	if (cpu_has_mips_r2) {
 		cp0_compare_irq = (read_c0_intctl () >> 29) & 7;
-		cp0_perfcount_irq = -1;
-	} else {
-		cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
 		cp0_perfcount_irq = (read_c0_intctl () >> 26) & 7;
-		if (cp0_perfcount_irq != cp0_compare_irq)
+		if (cp0_perfcount_irq == cp0_compare_irq)
 			cp0_perfcount_irq = -1;
+	} else {
+		cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
+		cp0_perfcount_irq = -1;
 	}
 
 #ifdef CONFIG_MIPS_MT_SMTC
Signature · 1 line
1.4.4.3
author
#2 lore raw

PATCH 1/1 Count timer interrupts correctly.

From: Chris Dearman <[email protected]>

Signed-off-by Chris Dearman <[email protected]>
---
 arch/mips/kernel/smtc.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/mips/kernel/smtc.c +1 -1
index 2e01147..046b03b 100644
@@ -822,7 +822,7 @@ void ipi_decode(struct smtc_ipi *pipi)
 	switch (type_copy) {
 	case SMTC_CLOCK_TICK:
 		irq_enter();
-		kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + cp0_perfcount_irq]++;
+		kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + cp0_compare_irq]++;
 		/* Invoke Clock "Interrupt" */
 		ipi_timer_latch[dest_copy] = 0;
 #ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG
Signature · 1 line
1.4.4.3