Fix PCI indirect for big-endian cfg_addr
PATCH 1/8 Fix PCI indirect for big-endian cfg_addr
We didn't actually propogate the flag we pass into setup_indirect_pci() to set indirect_type and thus were getting the wrong endianness if PPC_INDIRECT_TYPE_BIG_ENDIAN was set.
Also, we need to or in additional flags rather than just doing a direct assignment.
Signed-off-by Kumar Gala <[email protected]>
--- arch/powerpc/sysdev/fsl_pci.c | 2 +- arch/powerpc/sysdev/indirect_pci.c | 1 + 2 files changed, 2 insertions(+), 1 deletions(-)
arch/powerpc/sysdev/fsl_pci.c +1 -1
@@ -216,7 +216,7 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)/* check PCI express link status */ if (early_find_capability (hose,0 ,0 ,PCI_CAP_ID_EXP )) { - hose->indirect_type =PPC_INDIRECT_TYPE_EXT_REG | + hose->indirect_type |=PPC_INDIRECT_TYPE_EXT_REG |PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS ;if (fsl_pcie_check_link (hose)) hose->indirect_type |=PPC_INDIRECT_TYPE_NO_PCIE_LINK ;
arch/powerpc/sysdev/indirect_pci.c +1 -0
@@ -160,4 +160,5 @@ setup_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data, u32 mbase =ioremap (cfg_data &PAGE_MASK ,PAGE_SIZE ); hose->cfg_data = mbase + (cfg_data & ~PAGE_MASK ); hose->ops = &indirect_pci_ops; + hose->indirect_type = flags; }
Signature · 1 line
1.5.2.2