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Add support for Wind River SBC8641D board

PATCH In review Joe Hamman 2 participants 5 messages Aug 1, 2007

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PATCH 1/1 Add support for Wind River SBC8641D board

Add support for Wind River's SBC8641D reference board.

Signed-off by: Joe Hamman <[email protected]>

arch/powerpc/boot/dts/sbc8641d.dts +160 -0
diff -purN -X dontdiff linux-2.6/arch/powerpc/boot/dts/sbc8641d.dts linux-2.6-esi/arch/powerpc/boot/dts/sbc8641d.dts
@@ -0,0 +1,160 @@
+/*
+ * SBC8641D Device Tree Source
+ *
+ * Copyright 2007 Embedded Specialties, Inc.
+ * Joe Hamman [email protected]
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+
+/ {
+	model = "SBC8641D";
+	compatible = "mpc86xx";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		PowerPC,8641@0 {
+			device_type = "cpu";
+			reg = <0>;
+			d-cache-line-size = <20>;	// 32 bytes
+			i-cache-line-size = <20>;	// 32 bytes
+			d-cache-size = <8000>;		// L1, 32K
+			i-cache-size = <8000>;		// L1, 32K
+			timebase-frequency = <0>;	// 33 MHz, from uboot
+			bus-frequency = <0>;		// From uboot
+			clock-frequency = <0>;		// From uboot
+			32-bit;
+		};
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <00000000 20000000>;	// 512M at 0x0
+	};
+
+	soc8641@f8000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		#interrupt-cells = <2>;
+		device_type = "soc";
+		ranges = <0 f8000000 00100000>;
+		reg = <f8000000 00100000>;	// CCSRBAR 1M
+		bus-frequency = <0>;
+
+		mdio@24520 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "mdio";
+			compatible = "gianfar";
+			reg = <24520 20>;
+			phy1f: ethernet-phy@1f {
+				reg = <1f>;
+				device_type = "ethernet-phy";
+			};
+			phy0: ethernet-phy@0 {
+				reg = <0>;
+				device_type = "ethernet-phy";
+			};
+			phy1: ethernet-phy@1 {
+				reg = <1>;
+				device_type = "ethernet-phy";
+			};
+			phy2: ethernet-phy@2 {
+				reg = <2>;
+				device_type = "ethernet-phy";
+			};
+		};
+
+		ethernet@24000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "network";
+			model = "eTSEC";
+			compatible = "gianfar";
+			reg = <24000 1000>;
+			mac-address = [ 00 E0 0C 00 73 00 ];
+			interrupts = <1d 2 1e 2 22 2>;
+			interrupt-parent = <&mpic>;
+			phy-handle = <&phy1f>;
+		};
+
+		ethernet@25000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "network";
+			model = "eTSEC";
+			compatible = "gianfar";
+			reg = <25000 1000>;
+			mac-address = [ 00 E0 0C 00 73 01 ];
+			interrupts = <23 2 24 2 28 2>;
+			interrupt-parent = <&mpic>;
+			phy-handle = <&phy0>;
+		};
+		
+		ethernet@26000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "network";
+			model = "eTSEC";
+			compatible = "gianfar";
+			reg = <26000 1000>;
+			mac-address = [ 00 E0 0C 00 02 FD ];
+			interrupts = <1F 2 20 2 21 2>;
+			interrupt-parent = <&mpic>;
+			phy-handle = <&phy1>;
+		};
+
+		ethernet@27000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "network";
+			model = "eTSEC";
+			compatible = "gianfar";
+			reg = <27000 1000>;
+			mac-address = [ 00 E0 0C 00 03 FD ];
+			interrupts = <25 2 26 2 27 2>;
+			interrupt-parent = <&mpic>;
+			phy-handle = <&phy2>;
+		};
+
+		serial@4500 {
+			device_type = "serial";
+			compatible = "ns16550";
+			reg = <4500 100>;
+			clock-frequency = <0>;
+			interrupts = <2a 2>;
+			interrupt-parent = <&mpic>;
+		};
+
+		serial@4600 {
+			device_type = "serial";
+			compatible = "ns16550";
+			reg = <4600 100>;
+			clock-frequency = <0>;
+			interrupts = <1c 2>;
+			interrupt-parent = <&mpic>;
+		};
+
+		mpic: pic@40000 {
+			clock-frequency = <0>;
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <2>;
+			reg = <40000 40000>;
+			built-in;
+			compatible = "chrp,open-pic";
+			device_type = "open-pic";
+			big-endian;
+		};
+	};
+};
arch/powerpc/configs/sbc8641d_defconfig +924 -0

924 lines not on this page · raw message

arch/powerpc/platforms/86xx/Kconfig +7 -0
diff -purN -X dontdiff linux-2.6/arch/powerpc/platforms/86xx/Kconfig linux-2.6-esi/arch/powerpc/platforms/86xx/Kconfig
@@ -10,6 +10,12 @@ config MPC8641_HPCN
 	help
 	  This option enables support for the MPC8641 HPCN board.
 
+config SBC8641D
+	bool "Wind River SBC8641D"
+	select DEFAULT_UIMAGE
+	help
+	  This option enables support for the SBC8641D board.
+
 endchoice
 
 config MPC8641
@@ -18,3 +24,4 @@ config MPC8641
 	select PPC_UDBG_16550
 	select MPIC
 	default y if MPC8641_HPCN
+	default y if SBC8641D
arch/powerpc/platforms/86xx/Makefile +1 -0
diff -purN -X dontdiff linux-2.6/arch/powerpc/platforms/86xx/Makefile linux-2.6-esi/arch/powerpc/platforms/86xx/Makefile
@@ -4,3 +4,4 @@
 
 obj-$(CONFIG_SMP)		+= mpc86xx_smp.o
 obj-$(CONFIG_MPC8641_HPCN)	+= mpc86xx_hpcn.o
+obj-$(CONFIG_SBC8641D)		+= sbc8641d.o
arch/powerpc/platforms/86xx/sbc8641d.c +206 -0

206 lines not on this page · raw message

arch/powerpc/platforms/86xx/sbc8641d.h +24 -0
diff -purN -X dontdiff linux-2.6/arch/powerpc/platforms/86xx/sbc8641d.h linux-2.6-esi/arch/powerpc/platforms/86xx/sbc8641d.h
@@ -0,0 +1,24 @@
+/*
+ * SBC8641D board definitions
+ *
+ * Copyright 2007 Embedded Specialties, Inc.
+ * Joe Hamman <[email protected]>
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * Author: Xianghua Xiao <[email protected]>
+ */
+
+#ifndef __SBC8641D_H__
+#define __SBC8641D_H__
+
+#include <linux/init.h>
+
+#define MPC86XX_RSTCR_OFFSET	(0xe00b0)	/* Reset Control Register */
+
+#endif	/* __SBC8641D_H__ */
drivers/net/gianfar.h +1 -1
diff -purN -X dontdiff linux-2.6/drivers/net/gianfar.h linux-2.6-esi/drivers/net/gianfar.h
@@ -131,7 +131,7 @@ extern const char gfar_driver_version[];
 #define DEFAULT_RXCOUNT	16
 #define DEFAULT_RXTIME	4
 
-#define TBIPA_VALUE		0x1f
+#define TBIPA_VALUE		0x1e
 #define MIIMCFG_INIT_VALUE	0x00000007
 #define MIIMCFG_RESET           0x80000000
 #define MIIMIND_BUSY            0x00000001
#1 lore raw
Quoted 1 line · Joe Hamman

Add support for Wind River's SBC8641D reference board.

Is this a single core or dual core chip?

Quoted 39 lines

Signed-off by: Joe Hamman <[email protected]>

diff -purN -X dontdiff linux-2.6/arch/powerpc/boot/dts/sbc8641d.dts linux-2.6-esi/arch/powerpc/boot/dts/sbc8641d.dts
--- linux-2.6/arch/powerpc/boot/dts/sbc8641d.dts 1969-12-31
18:00:00.000000000 -0600
+++ linux-2.6-esi/arch/powerpc/boot/dts/sbc8641d.dts 2007-07-31
13:15:15.000000000 -0500

arch/powerpc/boot/dts/sbc8641d.dts +9 -0
@@ -0,0 +1,160 @@
+/*
+ * SBC8641D Device Tree Source
+ *
+ * Copyright 2007 Embedded Specialties, Inc.
+ * Joe Hamman [email protected]
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or  

modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */

arch/powerpc/boot/dts/sbc8641d.dts +14 -0
+
+
+/ {
+	model = "SBC8641D";
+	compatible = "mpc86xx";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		PowerPC,8641@0 {
+			device_type = "cpu";

arch/powerpc/boot/dts/sbc8641d.dts line 37

Quoted 10 lines
arch/powerpc/boot/dts/sbc8641d.dts +10 -0
+			reg = <0>;
+			d-cache-line-size = <20>;	// 32 bytes
+			i-cache-line-size = <20>;	// 32 bytes
+			d-cache-size = <8000>;		// L1, 32K
+			i-cache-size = <8000>;		// L1, 32K
+			timebase-frequency = <0>;	// 33 MHz, from uboot
+			bus-frequency = <0>;		// From uboot
+			clock-frequency = <0>;		// From uboot
+			32-bit;
+		};

if this is really an 8641D I'd expect a 2nd cpu node.

Quoted 125 lines
arch/powerpc/boot/dts/sbc8641d.dts +123 -0
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <00000000 20000000>;	// 512M at 0x0
+	};
+
+	soc8641@f8000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		#interrupt-cells = <2>;
+		device_type = "soc";
+		ranges = <0 f8000000 00100000>;
+		reg = <f8000000 00100000>;	// CCSRBAR 1M
+		bus-frequency = <0>;
+
+		mdio@24520 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "mdio";
+			compatible = "gianfar";
+			reg = <24520 20>;
+			phy1f: ethernet-phy@1f {
+				reg = <1f>;
+				device_type = "ethernet-phy";
+			};
+			phy0: ethernet-phy@0 {
+				reg = <0>;
+				device_type = "ethernet-phy";
+			};
+			phy1: ethernet-phy@1 {
+				reg = <1>;
+				device_type = "ethernet-phy";
+			};
+			phy2: ethernet-phy@2 {
+				reg = <2>;
+				device_type = "ethernet-phy";
+			};
+		};
+
+		ethernet@24000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "network";
+			model = "eTSEC";
+			compatible = "gianfar";
+			reg = <24000 1000>;
+			mac-address = [ 00 E0 0C 00 73 00 ];
 
 
+			interrupts = <1d 2 1e 2 22 2>;
+			interrupt-parent = <&mpic>;
+			phy-handle = <&phy1f>;
+		};
+
+		ethernet@25000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "network";
+			model = "eTSEC";
+			compatible = "gianfar";
+			reg = <25000 1000>;
+			mac-address = [ 00 E0 0C 00 73 01 ];
+			interrupts = <23 2 24 2 28 2>;
+			interrupt-parent = <&mpic>;
+			phy-handle = <&phy0>;
+		};
+		
+		ethernet@26000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "network";
+			model = "eTSEC";
+			compatible = "gianfar";
+			reg = <26000 1000>;
+			mac-address = [ 00 E0 0C 00 02 FD ];
+			interrupts = <1F 2 20 2 21 2>;
+			interrupt-parent = <&mpic>;
+			phy-handle = <&phy1>;
+		};
+
+		ethernet@27000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "network";
+			model = "eTSEC";
+			compatible = "gianfar";
+			reg = <27000 1000>;
+			mac-address = [ 00 E0 0C 00 03 FD ];
+			interrupts = <25 2 26 2 27 2>;
+			interrupt-parent = <&mpic>;
+			phy-handle = <&phy2>;
+		};
+
+		serial@4500 {
+			device_type = "serial";
+			compatible = "ns16550";
+			reg = <4500 100>;
+			clock-frequency = <0>;
+			interrupts = <2a 2>;
+			interrupt-parent = <&mpic>;
+		};
+
+		serial@4600 {
+			device_type = "serial";
+			compatible = "ns16550";
+			reg = <4600 100>;
+			clock-frequency = <0>;
+			interrupts = <1c 2>;
+			interrupt-parent = <&mpic>;
+		};
+
+		mpic: pic@40000 {
+			clock-frequency = <0>;
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <2>;
+			reg = <40000 40000>;
+			built-in;
+			compatible = "chrp,open-pic";
+			device_type = "open-pic";
+			big-endian;
+		};
+	};
+};

[snip]

Quoted 118 lines

diff -purN -X dontdiff linux-2.6/arch/powerpc/platforms/86xx/Kconfig linux-2.6-esi/arch/powerpc/platforms/86xx/Kconfig
--- linux-2.6/arch/powerpc/platforms/86xx/Kconfig 2007-07-31
10:15:36.000000000 -0500
+++ linux-2.6-esi/arch/powerpc/platforms/86xx/Kconfig 2007-07-31
10:36:45.000000000 -0500

arch/powerpc/platforms/86xx/Kconfig +7 -0
@@ -10,6 +10,12 @@ config MPC8641_HPCN
 	help
 	  This option enables support for the MPC8641 HPCN board.
 
+config SBC8641D
+	bool "Wind River SBC8641D"
+	select DEFAULT_UIMAGE
+	help
+	  This option enables support for the SBC8641D board.
+
 endchoice
 
 config MPC8641
@@ -18,3 +24,4 @@ config MPC8641
 	select PPC_UDBG_16550
 	select MPIC
 	default y if MPC8641_HPCN
+	default y if SBC8641D

diff -purN -X dontdiff linux-2.6/arch/powerpc/platforms/86xx/Makefile linux-2.6-esi/arch/powerpc/platforms/86xx/Makefile
--- linux-2.6/arch/powerpc/platforms/86xx/Makefile 2007-07-31
10:15:36.000000000 -0500
+++ linux-2.6-esi/arch/powerpc/platforms/86xx/Makefile 2007-07-31
10:37:30.000000000 -0500

arch/powerpc/platforms/86xx/Makefile +1 -0
@@ -4,3 +4,4 @@
 
 obj-$(CONFIG_SMP)		+= mpc86xx_smp.o
 obj-$(CONFIG_MPC8641_HPCN)	+= mpc86xx_hpcn.o
+obj-$(CONFIG_SBC8641D)		+= sbc8641d.o

diff -purN -X dontdiff linux-2.6/arch/powerpc/platforms/86xx/sbc8641d.c linux-2.6-esi/arch/powerpc/platforms/86xx/sbc8641d.c
--- linux-2.6/arch/powerpc/platforms/86xx/sbc8641d.c 1969-12-31
18:00:00.000000000 -0600
+++ linux-2.6-esi/arch/powerpc/platforms/86xx/sbc8641d.c 2007-07-31
15:55:59.000000000 -0500

arch/powerpc/platforms/86xx/sbc8641d.c +12 -0
@@ -0,0 +1,206 @@
+/*
+ * SBC8641D board specific routines
+ *
+ * Copyright 2007 Embedded Specialties, Inc.
+ * Joe Hamman <[email protected]>
+ *
+ * Recode: ZHANG WEI <[email protected]>
+ * Initial author: Xianghua Xiao <[email protected]>
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or  

modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */

arch/powerpc/platforms/86xx/sbc8641d.c +60 -0
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <asm/mpc86xx.h>
+#include <asm/prom.h>
+#include <mm/mmu_decl.h>
+#include <asm/udbg.h>
+#include <asm/i8259.h>
+#include <asm-generic/rtc.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+
+#include "mpc86xx.h"
+#include "sbc8641d.h"
+
+#define DEBUG
+
+#ifdef DEBUG
+#define DBG(fmt...) do { printk(KERN_ERR fmt); } while(0)
+#else
+#define DBG(fmt...) do { } while(0)
+#endif
+
+/* unsigned long isa_io_base = 0;
+unsigned long isa_mem_base = 0;
+unsigned long pci_dram_offset = 0; */
+
+
+void __init
+sbc8641d_init_irq(void)
+{
+	struct mpic *mpic1;
+	struct device_node *np;
+	struct resource res;
+
+	/* Determine PIC address. */
+	np = of_find_node_by_type(NULL, "open-pic");
+	if (np == NULL)
+		return;
+	of_address_to_resource(np, 0, &res);
+
+	/* Alloc mpic structure and per isu has 16 INT entries. */
+	mpic1 = mpic_alloc(np, res.start,
+			MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+			16, NR_IRQS - 4,
+			" MPIC     ");
+	BUG_ON(mpic1 == NULL);
+
+	mpic_assign_isu(mpic1, 0, res.start + 0x10000);
+

arch/powerpc/platforms/86xx/sbc8641d.c line 86

Quoted 10 lines
arch/powerpc/platforms/86xx/sbc8641d.c +10 -0
+	/* 48 Internal Interrupts */
+	mpic_assign_isu(mpic1, 1, res.start + 0x10200);
+	mpic_assign_isu(mpic1, 2, res.start + 0x10400);
+	mpic_assign_isu(mpic1, 3, res.start + 0x10600);
+
+	/* 16 External interrupts
+	 * Moving them from [0 - 15] to [64 - 79]
+	 */
+	mpic_assign_isu(mpic1, 4, res.start + 0x10000);
+

look at a 2.6.22-rc1 kernel to see how this has changed. It also effects the .dts interrupt numbers. Please match how the mpc8641hpcn does things.

Quoted 14 lines
arch/powerpc/platforms/86xx/sbc8641d.c +14 -0
+	mpic_init(mpic1);
+
+}
+
+
+static void __init
+sbc8641d_setup_arch(void)
+{
+	struct device_node *np;
+
+	if (ppc_md.progress)
+		ppc_md.progress("sbc8641d_setup_arch()", 0);
+
+	np = of_find_node_by_type(NULL, "cpu");

arch/powerpc/platforms/86xx/sbc8641d.c line 110

Quoted 10 lines
arch/powerpc/platforms/86xx/sbc8641d.c +10 -0
+	if (np != 0) {
+		const unsigned int *fp;
+
+		fp = get_property(np, "clock-frequency", NULL);
+		if (fp != 0)
+			loops_per_jiffy = *fp / HZ;
+		else
+			loops_per_jiffy = 50000000 / HZ;
+		of_node_put(np);
+	}

git ride of this code to find loops_per_jiffy.

Quoted 19 lines
arch/powerpc/platforms/86xx/sbc8641d.c +19 -0
+
+	printk("SBC8641D board from Wind River Systems\n");
+
+#ifdef CONFIG_SMP
+	mpc86xx_smp_init();
+#endif
+}
+
+
+void
+sbc8641d_show_cpuinfo(struct seq_file *m)
+{
+	struct device_node *root;
+	uint memsize = total_memory;
+	const char *model = "";
+	uint svid = mfspr(SPRN_SVR);
+
+	seq_printf(m, "Vendor\t\t: Wind River Systems\n");
+

arch/powerpc/platforms/86xx/sbc8641d.c line 139

Quoted 10 lines
arch/powerpc/platforms/86xx/sbc8641d.c +10 -0
+	root = of_find_node_by_path("/");
+	if (root)
+		model = get_property(root, "model", NULL);
+	seq_printf(m, "Machine\t\t: %s\n", model);
+	of_node_put(root);
+
+	seq_printf(m, "SVR\t\t: 0x%x\n", svid);
+	seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
+}
+

This is mostly redundant with the basic show cpu info, do you need your own?

arch/powerpc/platforms/86xx/sbc8641d.c line 149

Quoted 10 lines
arch/powerpc/platforms/86xx/sbc8641d.c +10 -0
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init sbc8641d_probe(void)
+{
+	unsigned long root = of_get_flat_dt_root();
+
+	if (of_flat_dt_is_compatible(root, "mpc86xx"))
+		return 1;	/* Looks good */

the check you have is too generic, you probably need something more specific in the top level compatible property.

Quoted 96 lines
arch/powerpc/platforms/86xx/sbc8641d.c +57 -0
+
+	return 0;
+}
+
+
+void
+sbc8641d_restart(char *cmd)
+{
+	void __iomem *rstcr;
+
+	rstcr = ioremap(get_immrbase() + MPC86XX_RSTCR_OFFSET, 0x100);
+
+	local_irq_disable();
+
+	/* Assert reset request to Reset Control Register */
+	out_be32(rstcr, 0x2);
+
+	/* not reached */
+}
+
+
+long __init
+sbc8641d_time_init(void)
+{
+	unsigned int temp;
+
+	/* Set the time base to zero */
+	mtspr(SPRN_TBWL, 0);
+	mtspr(SPRN_TBWU, 0);
+
+	temp = mfspr(SPRN_HID0);
+	temp |= HID0_TBEN;
+	mtspr(SPRN_HID0, temp);
+	asm volatile("isync");
+
+	return 0;
+}
+
+
+define_machine(sbc8641d) {
+	.name			= "SBC8641D",
+	.probe			= sbc8641d_probe,
+	.setup_arch		= sbc8641d_setup_arch,
+	.init_IRQ		= sbc8641d_init_irq,
+	.show_cpuinfo		= sbc8641d_show_cpuinfo,
+	.get_irq		= mpic_get_irq,
+	.restart		= sbc8641d_restart,
+	.time_init		= sbc8641d_time_init,
+	.calibrate_decr		= generic_calibrate_decr,
+	.progress		= udbg_progress,
+
+#ifdef CONFIG_GEN_RTC
+	/* RTC interface, using functions in include/asm-generic/rtc.h */
+	.get_rtc_time		= get_rtc_time,
+	.set_rtc_time		= set_rtc_time,
+#endif
+};

diff -purN -X dontdiff linux-2.6/arch/powerpc/platforms/86xx/sbc8641d.h linux-2.6-esi/arch/powerpc/platforms/86xx/sbc8641d.h
--- linux-2.6/arch/powerpc/platforms/86xx/sbc8641d.h 1969-12-31
18:00:00.000000000 -0600
+++ linux-2.6-esi/arch/powerpc/platforms/86xx/sbc8641d.h 2007-07-31
15:57:01.000000000 -0500

arch/powerpc/platforms/86xx/sbc8641d.h +9 -0
@@ -0,0 +1,24 @@
+/*
+ * SBC8641D board definitions
+ *
+ * Copyright 2007 Embedded Specialties, Inc.
+ * Joe Hamman <[email protected]>
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or  

modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * Author: Xianghua Xiao <[email protected]>
+ */

arch/powerpc/platforms/86xx/sbc8641d.h +9 -0
+
+#ifndef __SBC8641D_H__
+#define __SBC8641D_H__
+
+#include <linux/init.h>
+
+#define MPC86XX_RSTCR_OFFSET	(0xe00b0)	/* Reset Control Register */
+
+#endif	/* __SBC8641D_H__ */

diff -purN -X dontdiff linux-2.6/drivers/net/gianfar.h linux-2.6-esi/drivers/net/gianfar.h
--- linux-2.6/drivers/net/gianfar.h 2007-07-31 10:15:39.000000000
-0500
+++ linux-2.6-esi/drivers/net/gianfar.h 2007-07-31
10:39:10.000000000 -0500

drivers/net/gianfar.h extern const char gfar_driver_version[]; · line 134

Quoted 5 lines
drivers/net/gianfar.h +1 -1
@@ -131,7 +131,7 @@ extern const char gfar_driver_version[];
 #define DEFAULT_RXCOUNT	16
 #define DEFAULT_RXTIME	4
 
-#define TBIPA_VALUE		0x1f
+#define TBIPA_VALUE		0x1e

we need to turn this into a config option or something.

Quoted 4 lines
drivers/net/gianfar.h +0 -0
 #define MIIMCFG_INIT_VALUE	0x00000007
 #define MIIMCFG_RESET           0x80000000
 #define MIIMIND_BUSY            0x00000001
author
#2 lore raw

The board supports both single and dual core parts. The board I have is single core.

Quoted 52 lines

-----Original Message-----
From: Kumar Gala [mailto:[email protected]]
Sent: Wednesday, August 01, 2007 9:18 AM
To: [email protected]
Cc: [email protected]
Subject: Re: [PATCH] Add support for Wind River SBC8641D board

Quoted 1 line · Joe Hamman

Add support for Wind River's SBC8641D reference board.

Is this a single core or dual core chip?

Quoted 38 lines

Signed-off by: Joe Hamman <[email protected]>

diff -purN -X dontdiff linux-2.6/arch/powerpc/boot/dts/sbc8641d.dts linux-2.6-esi/arch/powerpc/boot/dts/sbc8641d.dts
--- linux-2.6/arch/powerpc/boot/dts/sbc8641d.dts 1969-12-31
18:00:00.000000000 -0600
+++ linux-2.6-esi/arch/powerpc/boot/dts/sbc8641d.dts 2007-07-31
13:15:15.000000000 -0500

arch/powerpc/boot/dts/sbc8641d.dts +9 -0
@@ -0,0 +1,160 @@
+/*
+ * SBC8641D Device Tree Source
+ *
+ * Copyright 2007 Embedded Specialties, Inc.
+ * Joe Hamman [email protected]
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or

modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */

arch/powerpc/boot/dts/sbc8641d.dts +12 -0
+
+
+/ {
+	model = "SBC8641D";
+	compatible = "mpc86xx";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
Quoted 8 lines

arch/powerpc/boot/dts/sbc8641d.dts

Quoted 8 lines
arch/powerpc/boot/dts/sbc8641d.dts +8 -0
+		PowerPC,8641@0 {
+			device_type = "cpu";
+			reg = <0>;
+			d-cache-line-size = <20>;	// 32 bytes
+			i-cache-line-size = <20>;	// 32 bytes
+			d-cache-size = <8000>;		// L1, 32K
+			i-cache-size = <8000>;		// L1, 32K
+			timebase-frequency = <0>;	// 33 MHz, from

uboot

Quoted 426 lines

arch/powerpc/boot/dts/sbc8641d.dts line 37

Quoted 4 lines
arch/powerpc/boot/dts/sbc8641d.dts +4 -0
+			bus-frequency = <0>;		// From uboot
+			clock-frequency = <0>;		// From uboot
+			32-bit;
+		};

if this is really an 8641D I'd expect a 2nd cpu node.

Quoted 125 lines
arch/powerpc/boot/dts/sbc8641d.dts +123 -0
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <00000000 20000000>;	// 512M at 0x0
+	};
+
+	soc8641@f8000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		#interrupt-cells = <2>;
+		device_type = "soc";
+		ranges = <0 f8000000 00100000>;
+		reg = <f8000000 00100000>;	// CCSRBAR 1M
+		bus-frequency = <0>;
+
+		mdio@24520 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "mdio";
+			compatible = "gianfar";
+			reg = <24520 20>;
+			phy1f: ethernet-phy@1f {
+				reg = <1f>;
+				device_type = "ethernet-phy";
+			};
+			phy0: ethernet-phy@0 {
+				reg = <0>;
+				device_type = "ethernet-phy";
+			};
+			phy1: ethernet-phy@1 {
+				reg = <1>;
+				device_type = "ethernet-phy";
+			};
+			phy2: ethernet-phy@2 {
+				reg = <2>;
+				device_type = "ethernet-phy";
+			};
+		};
+
+		ethernet@24000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "network";
+			model = "eTSEC";
+			compatible = "gianfar";
+			reg = <24000 1000>;
+			mac-address = [ 00 E0 0C 00 73 00 ];
 
 
+			interrupts = <1d 2 1e 2 22 2>;
+			interrupt-parent = <&mpic>;
+			phy-handle = <&phy1f>;
+		};
+
+		ethernet@25000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "network";
+			model = "eTSEC";
+			compatible = "gianfar";
+			reg = <25000 1000>;
+			mac-address = [ 00 E0 0C 00 73 01 ];
+			interrupts = <23 2 24 2 28 2>;
+			interrupt-parent = <&mpic>;
+			phy-handle = <&phy0>;
+		};
+
+		ethernet@26000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "network";
+			model = "eTSEC";
+			compatible = "gianfar";
+			reg = <26000 1000>;
+			mac-address = [ 00 E0 0C 00 02 FD ];
+			interrupts = <1F 2 20 2 21 2>;
+			interrupt-parent = <&mpic>;
+			phy-handle = <&phy1>;
+		};
+
+		ethernet@27000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "network";
+			model = "eTSEC";
+			compatible = "gianfar";
+			reg = <27000 1000>;
+			mac-address = [ 00 E0 0C 00 03 FD ];
+			interrupts = <25 2 26 2 27 2>;
+			interrupt-parent = <&mpic>;
+			phy-handle = <&phy2>;
+		};
+
+		serial@4500 {
+			device_type = "serial";
+			compatible = "ns16550";
+			reg = <4500 100>;
+			clock-frequency = <0>;
+			interrupts = <2a 2>;
+			interrupt-parent = <&mpic>;
+		};
+
+		serial@4600 {
+			device_type = "serial";
+			compatible = "ns16550";
+			reg = <4600 100>;
+			clock-frequency = <0>;
+			interrupts = <1c 2>;
+			interrupt-parent = <&mpic>;
+		};
+
+		mpic: pic@40000 {
+			clock-frequency = <0>;
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <2>;
+			reg = <40000 40000>;
+			built-in;
+			compatible = "chrp,open-pic";
+			device_type = "open-pic";
+			big-endian;
+		};
+	};
+};

[snip]

Quoted 121 lines

diff -purN -X dontdiff linux-2.6/arch/powerpc/platforms/86xx/ Kconfig linux-2.6-esi/arch/powerpc/platforms/86xx/Kconfig
--- linux-2.6/arch/powerpc/platforms/86xx/Kconfig 2007-07-31
10:15:36.000000000 -0500
+++ linux-2.6-esi/arch/powerpc/platforms/86xx/Kconfig 2007-07-31
10:36:45.000000000 -0500

arch/powerpc/platforms/86xx/Kconfig +7 -0
@@ -10,6 +10,12 @@ config MPC8641_HPCN
 	help
 	  This option enables support for the MPC8641 HPCN board.
 
+config SBC8641D
+	bool "Wind River SBC8641D"
+	select DEFAULT_UIMAGE
+	help
+	  This option enables support for the SBC8641D board.
+
 endchoice
 
 config MPC8641
@@ -18,3 +24,4 @@ config MPC8641
 	select PPC_UDBG_16550
 	select MPIC
 	default y if MPC8641_HPCN
+	default y if SBC8641D

diff -purN -X dontdiff linux-2.6/arch/powerpc/platforms/86xx/ Makefile linux-2.6-esi/arch/powerpc/platforms/86xx/Makefile
--- linux-2.6/arch/powerpc/platforms/86xx/Makefile 2007-07-31
10:15:36.000000000 -0500
+++ linux-2.6-esi/arch/powerpc/platforms/86xx/Makefile 2007-07-31
10:37:30.000000000 -0500

arch/powerpc/platforms/86xx/Makefile +1 -0
@@ -4,3 +4,4 @@
 
 obj-$(CONFIG_SMP)		+= mpc86xx_smp.o
 obj-$(CONFIG_MPC8641_HPCN)	+= mpc86xx_hpcn.o
+obj-$(CONFIG_SBC8641D)		+= sbc8641d.o

diff -purN -X dontdiff linux-2.6/arch/powerpc/platforms/86xx/ sbc8641d.c linux-2.6-esi/arch/powerpc/platforms/86xx/sbc8641d.c
--- linux-2.6/arch/powerpc/platforms/86xx/sbc8641d.c 1969-12-31
18:00:00.000000000 -0600
+++ linux-2.6-esi/arch/powerpc/platforms/86xx/sbc8641d.c 2007-07-31
15:55:59.000000000 -0500

arch/powerpc/platforms/86xx/sbc8641d.c +12 -0
@@ -0,0 +1,206 @@
+/*
+ * SBC8641D board specific routines
+ *
+ * Copyright 2007 Embedded Specialties, Inc.
+ * Joe Hamman <[email protected]>
+ *
+ * Recode: ZHANG WEI <[email protected]>
+ * Initial author: Xianghua Xiao <[email protected]>
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or

modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */

arch/powerpc/platforms/86xx/sbc8641d.c +60 -0
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <asm/mpc86xx.h>
+#include <asm/prom.h>
+#include <mm/mmu_decl.h>
+#include <asm/udbg.h>
+#include <asm/i8259.h>
+#include <asm-generic/rtc.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+
+#include "mpc86xx.h"
+#include "sbc8641d.h"
+
+#define DEBUG
+
+#ifdef DEBUG
+#define DBG(fmt...) do { printk(KERN_ERR fmt); } while(0)
+#else
+#define DBG(fmt...) do { } while(0)
+#endif
+
+/* unsigned long isa_io_base = 0;
+unsigned long isa_mem_base = 0;
+unsigned long pci_dram_offset = 0; */
+
+
+void __init
+sbc8641d_init_irq(void)
+{
+	struct mpic *mpic1;
+	struct device_node *np;
+	struct resource res;
+
+	/* Determine PIC address. */
+	np = of_find_node_by_type(NULL, "open-pic");
+	if (np == NULL)
+		return;
+	of_address_to_resource(np, 0, &res);
+
+	/* Alloc mpic structure and per isu has 16 INT entries. */
+	mpic1 = mpic_alloc(np, res.start,
+			MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+			16, NR_IRQS - 4,
+			" MPIC     ");
+	BUG_ON(mpic1 == NULL);
+
+	mpic_assign_isu(mpic1, 0, res.start + 0x10000);
+

arch/powerpc/platforms/86xx/sbc8641d.c line 86

Quoted 10 lines
arch/powerpc/platforms/86xx/sbc8641d.c +10 -0
+	/* 48 Internal Interrupts */
+	mpic_assign_isu(mpic1, 1, res.start + 0x10200);
+	mpic_assign_isu(mpic1, 2, res.start + 0x10400);
+	mpic_assign_isu(mpic1, 3, res.start + 0x10600);
+
+	/* 16 External interrupts
+	 * Moving them from [0 - 15] to [64 - 79]
+	 */
+	mpic_assign_isu(mpic1, 4, res.start + 0x10000);
+

look at a 2.6.22-rc1 kernel to see how this has changed. It also effects the .dts interrupt numbers. Please match how the mpc8641hpcn does things.

Quoted 14 lines
arch/powerpc/platforms/86xx/sbc8641d.c +14 -0
+	mpic_init(mpic1);
+
+}
+
+
+static void __init
+sbc8641d_setup_arch(void)
+{
+	struct device_node *np;
+
+	if (ppc_md.progress)
+		ppc_md.progress("sbc8641d_setup_arch()", 0);
+
+	np = of_find_node_by_type(NULL, "cpu");

arch/powerpc/platforms/86xx/sbc8641d.c line 110

Quoted 10 lines
arch/powerpc/platforms/86xx/sbc8641d.c +10 -0
+	if (np != 0) {
+		const unsigned int *fp;
+
+		fp = get_property(np, "clock-frequency", NULL);
+		if (fp != 0)
+			loops_per_jiffy = *fp / HZ;
+		else
+			loops_per_jiffy = 50000000 / HZ;
+		of_node_put(np);
+	}

git ride of this code to find loops_per_jiffy.

Quoted 19 lines
arch/powerpc/platforms/86xx/sbc8641d.c +19 -0
+
+	printk("SBC8641D board from Wind River Systems\n");
+
+#ifdef CONFIG_SMP
+	mpc86xx_smp_init();
+#endif
+}
+
+
+void
+sbc8641d_show_cpuinfo(struct seq_file *m)
+{
+	struct device_node *root;
+	uint memsize = total_memory;
+	const char *model = "";
+	uint svid = mfspr(SPRN_SVR);
+
+	seq_printf(m, "Vendor\t\t: Wind River Systems\n");
+

arch/powerpc/platforms/86xx/sbc8641d.c line 139

Quoted 10 lines
arch/powerpc/platforms/86xx/sbc8641d.c +10 -0
+	root = of_find_node_by_path("/");
+	if (root)
+		model = get_property(root, "model", NULL);
+	seq_printf(m, "Machine\t\t: %s\n", model);
+	of_node_put(root);
+
+	seq_printf(m, "SVR\t\t: 0x%x\n", svid);
+	seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
+}
+

This is mostly redundant with the basic show cpu info, do you need your own?

arch/powerpc/platforms/86xx/sbc8641d.c line 149

Quoted 10 lines
arch/powerpc/platforms/86xx/sbc8641d.c +10 -0
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init sbc8641d_probe(void)
+{
+	unsigned long root = of_get_flat_dt_root();
+
+	if (of_flat_dt_is_compatible(root, "mpc86xx"))
+		return 1;	/* Looks good */

the check you have is too generic, you probably need something more specific in the top level compatible property.

Quoted 81 lines
arch/powerpc/platforms/86xx/sbc8641d.c +57 -0
+
+	return 0;
+}
+
+
+void
+sbc8641d_restart(char *cmd)
+{
+	void __iomem *rstcr;
+
+	rstcr = ioremap(get_immrbase() + MPC86XX_RSTCR_OFFSET, 0x100);
+
+	local_irq_disable();
+
+	/* Assert reset request to Reset Control Register */
+	out_be32(rstcr, 0x2);
+
+	/* not reached */
+}
+
+
+long __init
+sbc8641d_time_init(void)
+{
+	unsigned int temp;
+
+	/* Set the time base to zero */
+	mtspr(SPRN_TBWL, 0);
+	mtspr(SPRN_TBWU, 0);
+
+	temp = mfspr(SPRN_HID0);
+	temp |= HID0_TBEN;
+	mtspr(SPRN_HID0, temp);
+	asm volatile("isync");
+
+	return 0;
+}
+
+
+define_machine(sbc8641d) {
+	.name			= "SBC8641D",
+	.probe			= sbc8641d_probe,
+	.setup_arch		= sbc8641d_setup_arch,
+	.init_IRQ		= sbc8641d_init_irq,
+	.show_cpuinfo		= sbc8641d_show_cpuinfo,
+	.get_irq		= mpic_get_irq,
+	.restart		= sbc8641d_restart,
+	.time_init		= sbc8641d_time_init,
+	.calibrate_decr		= generic_calibrate_decr,
+	.progress		= udbg_progress,
+
+#ifdef CONFIG_GEN_RTC
+	/* RTC interface, using functions in include/asm-generic/rtc.h */
+	.get_rtc_time		= get_rtc_time,
+	.set_rtc_time		= set_rtc_time,
+#endif
+};

diff -purN -X dontdiff linux-2.6/arch/powerpc/platforms/86xx/ sbc8641d.h linux-2.6-esi/arch/powerpc/platforms/86xx/sbc8641d.h
--- linux-2.6/arch/powerpc/platforms/86xx/sbc8641d.h 1969-12-31
18:00:00.000000000 -0600
+++ linux-2.6-esi/arch/powerpc/platforms/86xx/sbc8641d.h 2007-07-31
15:57:01.000000000 -0500

arch/powerpc/platforms/86xx/sbc8641d.h +9 -0
@@ -0,0 +1,24 @@
+/*
+ * SBC8641D board definitions
+ *
+ * Copyright 2007 Embedded Specialties, Inc.
+ * Joe Hamman <[email protected]>
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or

modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * Author: Xianghua Xiao <[email protected]>

Quoted 8 lines

arch/powerpc/platforms/86xx/sbc8641d.h

Quoted 8 lines

+ */

arch/powerpc/platforms/86xx/sbc8641d.h +7 -0
+
+#ifndef __SBC8641D_H__
+#define __SBC8641D_H__
+
+#include <linux/init.h>
+
+#define MPC86XX_RSTCR_OFFSET	(0xe00b0)	/* Reset Control

Register

Quoted 22 lines

*/

Quoted 9 lines
arch/powerpc/platforms/86xx/sbc8641d.h +2 -0
+
+#endif	/* __SBC8641D_H__ */

diff -purN -X dontdiff linux-2.6/drivers/net/gianfar.h linux-2.6- esi/drivers/net/gianfar.h
--- linux-2.6/drivers/net/gianfar.h 2007-07-31 10:15:39.000000000
-0500
+++ linux-2.6-esi/drivers/net/gianfar.h 2007-07-31
10:39:10.000000000 -0500

drivers/net/gianfar.h extern const char gfar_driver_version[]; · line 134

Quoted 5 lines
drivers/net/gianfar.h +1 -1
@@ -131,7 +131,7 @@ extern const char gfar_driver_version[];
 #define DEFAULT_RXCOUNT	16
 #define DEFAULT_RXTIME	4
 
-#define TBIPA_VALUE		0x1f
+#define TBIPA_VALUE		0x1e

we need to turn this into a config option or something.

Quoted 4 lines
drivers/net/gianfar.h +0 -0
 #define MIIMCFG_INIT_VALUE	0x00000007
 #define MIIMCFG_RESET           0x80000000
 #define MIIMIND_BUSY            0x00000001
author
#3 lore raw
In reply to Kumar Gala

Sorry, I replied to only the first question.

Quoted 8 lines

-----Original Message-----
From: Kumar Gala [mailto:[email protected]]
Sent: Wednesday, August 01, 2007 9:18 AM
To: [email protected]
Cc: [email protected]
Subject: Re: [PATCH] Add support for Wind River SBC8641D board

Quoted 6 lines
Quoted 1 line · Joe Hamman

Add support for Wind River's SBC8641D reference board.

Is this a single core or dual core chip?

The board I have is single core. I would have to see if I could get access to a dual core board.

Quoted 38 lines
Quoted 38 lines

Signed-off by: Joe Hamman <[email protected]>

diff -purN -X dontdiff linux-2.6/arch/powerpc/boot/dts/sbc8641d.dts linux-2.6-esi/arch/powerpc/boot/dts/sbc8641d.dts
--- linux-2.6/arch/powerpc/boot/dts/sbc8641d.dts 1969-12-31
18:00:00.000000000 -0600
+++ linux-2.6-esi/arch/powerpc/boot/dts/sbc8641d.dts 2007-07-31
13:15:15.000000000 -0500

arch/powerpc/boot/dts/sbc8641d.dts +9 -0
@@ -0,0 +1,160 @@
+/*
+ * SBC8641D Device Tree Source
+ *
+ * Copyright 2007 Embedded Specialties, Inc.
+ * Joe Hamman [email protected]
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or

modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */

arch/powerpc/boot/dts/sbc8641d.dts +12 -0
+
+
+/ {
+	model = "SBC8641D";
+	compatible = "mpc86xx";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
Quoted 8 lines

arch/powerpc/boot/dts/sbc8641d.dts

Quoted 8 lines
arch/powerpc/boot/dts/sbc8641d.dts +8 -0
+		PowerPC,8641@0 {
+			device_type = "cpu";
+			reg = <0>;
+			d-cache-line-size = <20>;	// 32 bytes
+			i-cache-line-size = <20>;	// 32 bytes
+			d-cache-size = <8000>;		// L1, 32K
+			i-cache-size = <8000>;		// L1, 32K
+			timebase-frequency = <0>;	// 33 MHz, from

uboot

Quoted 262 lines

arch/powerpc/boot/dts/sbc8641d.dts line 37

Quoted 4 lines
arch/powerpc/boot/dts/sbc8641d.dts +4 -0
+			bus-frequency = <0>;		// From uboot
+			clock-frequency = <0>;		// From uboot
+			32-bit;
+		};

if this is really an 8641D I'd expect a 2nd cpu node.

Quoted 125 lines
arch/powerpc/boot/dts/sbc8641d.dts +123 -0
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <00000000 20000000>;	// 512M at 0x0
+	};
+
+	soc8641@f8000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		#interrupt-cells = <2>;
+		device_type = "soc";
+		ranges = <0 f8000000 00100000>;
+		reg = <f8000000 00100000>;	// CCSRBAR 1M
+		bus-frequency = <0>;
+
+		mdio@24520 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "mdio";
+			compatible = "gianfar";
+			reg = <24520 20>;
+			phy1f: ethernet-phy@1f {
+				reg = <1f>;
+				device_type = "ethernet-phy";
+			};
+			phy0: ethernet-phy@0 {
+				reg = <0>;
+				device_type = "ethernet-phy";
+			};
+			phy1: ethernet-phy@1 {
+				reg = <1>;
+				device_type = "ethernet-phy";
+			};
+			phy2: ethernet-phy@2 {
+				reg = <2>;
+				device_type = "ethernet-phy";
+			};
+		};
+
+		ethernet@24000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "network";
+			model = "eTSEC";
+			compatible = "gianfar";
+			reg = <24000 1000>;
+			mac-address = [ 00 E0 0C 00 73 00 ];
 
 
+			interrupts = <1d 2 1e 2 22 2>;
+			interrupt-parent = <&mpic>;
+			phy-handle = <&phy1f>;
+		};
+
+		ethernet@25000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "network";
+			model = "eTSEC";
+			compatible = "gianfar";
+			reg = <25000 1000>;
+			mac-address = [ 00 E0 0C 00 73 01 ];
+			interrupts = <23 2 24 2 28 2>;
+			interrupt-parent = <&mpic>;
+			phy-handle = <&phy0>;
+		};
+
+		ethernet@26000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "network";
+			model = "eTSEC";
+			compatible = "gianfar";
+			reg = <26000 1000>;
+			mac-address = [ 00 E0 0C 00 02 FD ];
+			interrupts = <1F 2 20 2 21 2>;
+			interrupt-parent = <&mpic>;
+			phy-handle = <&phy1>;
+		};
+
+		ethernet@27000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "network";
+			model = "eTSEC";
+			compatible = "gianfar";
+			reg = <27000 1000>;
+			mac-address = [ 00 E0 0C 00 03 FD ];
+			interrupts = <25 2 26 2 27 2>;
+			interrupt-parent = <&mpic>;
+			phy-handle = <&phy2>;
+		};
+
+		serial@4500 {
+			device_type = "serial";
+			compatible = "ns16550";
+			reg = <4500 100>;
+			clock-frequency = <0>;
+			interrupts = <2a 2>;
+			interrupt-parent = <&mpic>;
+		};
+
+		serial@4600 {
+			device_type = "serial";
+			compatible = "ns16550";
+			reg = <4600 100>;
+			clock-frequency = <0>;
+			interrupts = <1c 2>;
+			interrupt-parent = <&mpic>;
+		};
+
+		mpic: pic@40000 {
+			clock-frequency = <0>;
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <2>;
+			reg = <40000 40000>;
+			built-in;
+			compatible = "chrp,open-pic";
+			device_type = "open-pic";
+			big-endian;
+		};
+	};
+};

[snip]

Quoted 127 lines

diff -purN -X dontdiff linux-2.6/arch/powerpc/platforms/86xx/ Kconfig linux-2.6-esi/arch/powerpc/platforms/86xx/Kconfig
--- linux-2.6/arch/powerpc/platforms/86xx/Kconfig 2007-07-31
10:15:36.000000000 -0500
+++ linux-2.6-esi/arch/powerpc/platforms/86xx/Kconfig 2007-07-31
10:36:45.000000000 -0500

arch/powerpc/platforms/86xx/Kconfig +7 -0
@@ -10,6 +10,12 @@ config MPC8641_HPCN
 	help
 	  This option enables support for the MPC8641 HPCN board.
 
+config SBC8641D
+	bool "Wind River SBC8641D"
+	select DEFAULT_UIMAGE
+	help
+	  This option enables support for the SBC8641D board.
+
 endchoice
 
 config MPC8641
@@ -18,3 +24,4 @@ config MPC8641
 	select PPC_UDBG_16550
 	select MPIC
 	default y if MPC8641_HPCN
+	default y if SBC8641D

diff -purN -X dontdiff linux-2.6/arch/powerpc/platforms/86xx/ Makefile linux-2.6-esi/arch/powerpc/platforms/86xx/Makefile
--- linux-2.6/arch/powerpc/platforms/86xx/Makefile 2007-07-31
10:15:36.000000000 -0500
+++ linux-2.6-esi/arch/powerpc/platforms/86xx/Makefile 2007-07-31
10:37:30.000000000 -0500

arch/powerpc/platforms/86xx/Makefile +1 -0
@@ -4,3 +4,4 @@
 
 obj-$(CONFIG_SMP)		+= mpc86xx_smp.o
 obj-$(CONFIG_MPC8641_HPCN)	+= mpc86xx_hpcn.o
+obj-$(CONFIG_SBC8641D)		+= sbc8641d.o

diff -purN -X dontdiff linux-2.6/arch/powerpc/platforms/86xx/ sbc8641d.c linux-2.6-esi/arch/powerpc/platforms/86xx/sbc8641d.c
--- linux-2.6/arch/powerpc/platforms/86xx/sbc8641d.c 1969-12-31
18:00:00.000000000 -0600
+++ linux-2.6-esi/arch/powerpc/platforms/86xx/sbc8641d.c 2007-07-31
15:55:59.000000000 -0500

arch/powerpc/platforms/86xx/sbc8641d.c +12 -0
@@ -0,0 +1,206 @@
+/*
+ * SBC8641D board specific routines
+ *
+ * Copyright 2007 Embedded Specialties, Inc.
+ * Joe Hamman <[email protected]>
+ *
+ * Recode: ZHANG WEI <[email protected]>
+ * Initial author: Xianghua Xiao <[email protected]>
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or

modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */

arch/powerpc/platforms/86xx/sbc8641d.c +66 -0
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <asm/mpc86xx.h>
+#include <asm/prom.h>
+#include <mm/mmu_decl.h>
+#include <asm/udbg.h>
+#include <asm/i8259.h>
+#include <asm-generic/rtc.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+
+#include "mpc86xx.h"
+#include "sbc8641d.h"
+
+#define DEBUG
+
+#ifdef DEBUG
+#define DBG(fmt...) do { printk(KERN_ERR fmt); } while(0)
+#else
+#define DBG(fmt...) do { } while(0)
+#endif
+
+/* unsigned long isa_io_base = 0;
+unsigned long isa_mem_base = 0;
+unsigned long pci_dram_offset = 0; */
+
+
+void __init
+sbc8641d_init_irq(void)
+{
+	struct mpic *mpic1;
+	struct device_node *np;
+	struct resource res;
+
+	/* Determine PIC address. */
+	np = of_find_node_by_type(NULL, "open-pic");
+	if (np == NULL)
+		return;
+	of_address_to_resource(np, 0, &res);
+
+	/* Alloc mpic structure and per isu has 16 INT entries. */
+	mpic1 = mpic_alloc(np, res.start,
+			MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+			16, NR_IRQS - 4,
+			" MPIC     ");
+	BUG_ON(mpic1 == NULL);
+
+	mpic_assign_isu(mpic1, 0, res.start + 0x10000);
+
+	/* 48 Internal Interrupts */
+	mpic_assign_isu(mpic1, 1, res.start + 0x10200);
+	mpic_assign_isu(mpic1, 2, res.start + 0x10400);
+	mpic_assign_isu(mpic1, 3, res.start + 0x10600);
+
+	/* 16 External interrupts
Quoted 8 lines

arch/powerpc/platforms/86xx/sbc8641d.c line 86

Quoted 4 lines
arch/powerpc/platforms/86xx/sbc8641d.c +4 -0
+	 * Moving them from [0 - 15] to [64 - 79]
+	 */
+	mpic_assign_isu(mpic1, 4, res.start + 0x10000);
+

look at a 2.6.22-rc1 kernel to see how this has changed. It also effects the .dts interrupt numbers. Please match how the mpc8641hpcn does things.

Will do.

Quoted 19 lines
Quoted 19 lines
arch/powerpc/platforms/86xx/sbc8641d.c +18 -0
+	mpic_init(mpic1);
+
+}
+
+
+static void __init
+sbc8641d_setup_arch(void)
+{
+	struct device_node *np;
+
+	if (ppc_md.progress)
+		ppc_md.progress("sbc8641d_setup_arch()", 0);
+
+	np = of_find_node_by_type(NULL, "cpu");
+	if (np != 0) {
+		const unsigned int *fp;
+
+		fp = get_property(np, "clock-frequency", NULL);
Quoted 8 lines

arch/powerpc/platforms/86xx/sbc8641d.c line 110

Quoted 6 lines
arch/powerpc/platforms/86xx/sbc8641d.c +6 -0
+		if (fp != 0)
+			loops_per_jiffy = *fp / HZ;
+		else
+			loops_per_jiffy = 50000000 / HZ;
+		of_node_put(np);
+	}

git ride of this code to find loops_per_jiffy.

Will do.

Quoted 25 lines
Quoted 25 lines
arch/powerpc/platforms/86xx/sbc8641d.c +24 -0
+
+	printk("SBC8641D board from Wind River Systems\n");
+
+#ifdef CONFIG_SMP
+	mpc86xx_smp_init();
+#endif
+}
+
+
+void
+sbc8641d_show_cpuinfo(struct seq_file *m)
+{
+	struct device_node *root;
+	uint memsize = total_memory;
+	const char *model = "";
+	uint svid = mfspr(SPRN_SVR);
+
+	seq_printf(m, "Vendor\t\t: Wind River Systems\n");
+
+	root = of_find_node_by_path("/");
+	if (root)
+		model = get_property(root, "model", NULL);
+	seq_printf(m, "Machine\t\t: %s\n", model);
+	of_node_put(root);
Quoted 8 lines

arch/powerpc/platforms/86xx/sbc8641d.c line 139

Quoted 5 lines
arch/powerpc/platforms/86xx/sbc8641d.c +5 -0
+
+	seq_printf(m, "SVR\t\t: 0x%x\n", svid);
+	seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
+}
+

This is mostly redundant with the basic show cpu info, do you need your own?

The plan is to add code to read the EEPROM device and show more info.

Quoted 14 lines

arch/powerpc/platforms/86xx/sbc8641d.c line 149

Quoted 11 lines
arch/powerpc/platforms/86xx/sbc8641d.c +10 -0
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init sbc8641d_probe(void)
+{
+	unsigned long root = of_get_flat_dt_root();
+
+	if (of_flat_dt_is_compatible(root, "mpc86xx"))
+		return 1;	/* Looks good */

the check you have is too generic, you probably need something more specific in the top level compatible property.

Will do.

Quoted 82 lines
Quoted 82 lines
arch/powerpc/platforms/86xx/sbc8641d.c +57 -0
+
+	return 0;
+}
+
+
+void
+sbc8641d_restart(char *cmd)
+{
+	void __iomem *rstcr;
+
+	rstcr = ioremap(get_immrbase() + MPC86XX_RSTCR_OFFSET, 0x100);
+
+	local_irq_disable();
+
+	/* Assert reset request to Reset Control Register */
+	out_be32(rstcr, 0x2);
+
+	/* not reached */
+}
+
+
+long __init
+sbc8641d_time_init(void)
+{
+	unsigned int temp;
+
+	/* Set the time base to zero */
+	mtspr(SPRN_TBWL, 0);
+	mtspr(SPRN_TBWU, 0);
+
+	temp = mfspr(SPRN_HID0);
+	temp |= HID0_TBEN;
+	mtspr(SPRN_HID0, temp);
+	asm volatile("isync");
+
+	return 0;
+}
+
+
+define_machine(sbc8641d) {
+	.name			= "SBC8641D",
+	.probe			= sbc8641d_probe,
+	.setup_arch		= sbc8641d_setup_arch,
+	.init_IRQ		= sbc8641d_init_irq,
+	.show_cpuinfo		= sbc8641d_show_cpuinfo,
+	.get_irq		= mpic_get_irq,
+	.restart		= sbc8641d_restart,
+	.time_init		= sbc8641d_time_init,
+	.calibrate_decr		= generic_calibrate_decr,
+	.progress		= udbg_progress,
+
+#ifdef CONFIG_GEN_RTC
+	/* RTC interface, using functions in include/asm-generic/rtc.h */
+	.get_rtc_time		= get_rtc_time,
+	.set_rtc_time		= set_rtc_time,
+#endif
+};

diff -purN -X dontdiff linux-2.6/arch/powerpc/platforms/86xx/ sbc8641d.h linux-2.6-esi/arch/powerpc/platforms/86xx/sbc8641d.h
--- linux-2.6/arch/powerpc/platforms/86xx/sbc8641d.h 1969-12-31
18:00:00.000000000 -0600
+++ linux-2.6-esi/arch/powerpc/platforms/86xx/sbc8641d.h 2007-07-31
15:57:01.000000000 -0500

arch/powerpc/platforms/86xx/sbc8641d.h +9 -0
@@ -0,0 +1,24 @@
+/*
+ * SBC8641D board definitions
+ *
+ * Copyright 2007 Embedded Specialties, Inc.
+ * Joe Hamman <[email protected]>
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or

modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * Author: Xianghua Xiao <[email protected]>

Quoted 8 lines

arch/powerpc/platforms/86xx/sbc8641d.h

Quoted 8 lines

+ */

arch/powerpc/platforms/86xx/sbc8641d.h +7 -0
+
+#ifndef __SBC8641D_H__
+#define __SBC8641D_H__
+
+#include <linux/init.h>
+
+#define MPC86XX_RSTCR_OFFSET	(0xe00b0)	/* Reset Control

Register

Quoted 13 lines

*/

Quoted 12 lines
arch/powerpc/platforms/86xx/sbc8641d.h +2 -0
+
+#endif	/* __SBC8641D_H__ */

diff -purN -X dontdiff linux-2.6/drivers/net/gianfar.h linux-2.6- esi/drivers/net/gianfar.h
--- linux-2.6/drivers/net/gianfar.h 2007-07-31 10:15:39.000000000
-0500
+++ linux-2.6-esi/drivers/net/gianfar.h 2007-07-31
10:39:10.000000000 -0500

drivers/net/gianfar.h +0 -0
@@ -131,7 +131,7 @@ extern const char gfar_driver_version[];
 #define DEFAULT_RXCOUNT	16
 #define DEFAULT_RXTIME	4
 
Quoted 4 lines

drivers/net/gianfar.h extern const char gfar_driver_version[]; · line 134

Quoted 2 lines
drivers/net/gianfar.h +1 -1
-#define TBIPA_VALUE		0x1f
+#define TBIPA_VALUE		0x1e

we need to turn this into a config option or something.

I was a little concerned when I saw a hard-coded address. I never would have found the conflict with the QUAD PHY (it starts at 0x1f and increments for each device) without your help.

Let me know what you think and I'll put something together.

Quoted 5 lines
Quoted 5 lines
drivers/net/gianfar.h +0 -0
 #define MIIMCFG_INIT_VALUE	0x00000007
 #define MIIMCFG_RESET           0x80000000
 #define MIIMIND_BUSY            0x00000001
#4 lore raw
Quoted 13 lines · Joe Hamman

Sorry, I replied to only the first question.

Quoted 10 lines

-----Original Message-----
From: Kumar Gala [mailto:[email protected]]
Sent: Wednesday, August 01, 2007 9:18 AM
To: [email protected]
Cc: [email protected]
Subject: Re: [PATCH] Add support for Wind River SBC8641D board

On Jul 31, 2007, at 7:36 PM, Joe Hamman wrote:

Quoted 7 lines
Quoted 4 lines
Quoted 1 line

Add support for Wind River's SBC8641D reference board.

Is this a single core or dual core chip?

The board I have is single core. I would have to see if I could get access to a dual core board.

You may want to think about having both core's in the .dts and build with !CONFIG_SMP for single and CONFIG_SMP for dual.

Quoted 24 lines
Quoted 15 lines
Quoted 15 lines
arch/powerpc/platforms/86xx/sbc8641d.c +15 -0
+void
+sbc8641d_show_cpuinfo(struct seq_file *m)
+{
+	struct device_node *root;
+	uint memsize = total_memory;
+	const char *model = "";
+	uint svid = mfspr(SPRN_SVR);
+
+	seq_printf(m, "Vendor\t\t: Wind River Systems\n");
+
+	root = of_find_node_by_path("/");
+	if (root)
+		model = get_property(root, "model", NULL);
+	seq_printf(m, "Machine\t\t: %s\n", model);
+	of_node_put(root);
Quoted 8 lines

arch/powerpc/platforms/86xx/sbc8641d.c line 139

Quoted 5 lines
arch/powerpc/platforms/86xx/sbc8641d.c +5 -0
+
+	seq_printf(m, "SVR\t\t: 0x%x\n", svid);
+	seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
+}
+

This is mostly redundant with the basic show cpu info, do you need your own?

Quoted 1 line

The plan is to add code to read the EEPROM device and show more info.

Ok thats fine than.

Quoted 66 lines
Quoted 5 lines
Quoted 5 lines
arch/powerpc/platforms/86xx/sbc8641d.c +5 -0
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init sbc8641d_probe(void)
Quoted 8 lines

arch/powerpc/platforms/86xx/sbc8641d.c line 149

Quoted 5 lines
arch/powerpc/platforms/86xx/sbc8641d.c +5 -0
+{
+	unsigned long root = of_get_flat_dt_root();
+
+	if (of_flat_dt_is_compatible(root, "mpc86xx"))
+		return 1;	/* Looks good */

the check you have is too generic, you probably need something more specific in the top level compatible property.

Will do.

Quoted 50 lines
Quoted 50 lines
arch/powerpc/platforms/86xx/sbc8641d.c +49 -0
+
+	return 0;
+}
+
+
+void
+sbc8641d_restart(char *cmd)
+{
+	void __iomem *rstcr;
+
+	rstcr = ioremap(get_immrbase() + MPC86XX_RSTCR_OFFSET, 0x100);
+
+	local_irq_disable();
+
+	/* Assert reset request to Reset Control Register */
+	out_be32(rstcr, 0x2);
+
+	/* not reached */
+}
+
+
+long __init
+sbc8641d_time_init(void)
+{
+	unsigned int temp;
+
+	/* Set the time base to zero */
+	mtspr(SPRN_TBWL, 0);
+	mtspr(SPRN_TBWU, 0);
+
+	temp = mfspr(SPRN_HID0);
+	temp |= HID0_TBEN;
+	mtspr(SPRN_HID0, temp);
+	asm volatile("isync");
+
+	return 0;
+}
+
+
+define_machine(sbc8641d) {
+	.name			= "SBC8641D",
+	.probe			= sbc8641d_probe,
+	.setup_arch		= sbc8641d_setup_arch,
+	.init_IRQ		= sbc8641d_init_irq,
+	.show_cpuinfo		= sbc8641d_show_cpuinfo,
+	.get_irq		= mpic_get_irq,
+	.restart		= sbc8641d_restart,
+	.time_init		= sbc8641d_time_init,
+	.calibrate_decr		= generic_calibrate_decr,
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arch/powerpc/platforms/86xx/sbc8641d.c line 206

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arch/powerpc/platforms/86xx/sbc8641d.c +8 -0
+	.progress		= udbg_progress,
+
+#ifdef CONFIG_GEN_RTC
+	/* RTC interface, using functions in include/asm-generic/rtc.h */
+	.get_rtc_time		= get_rtc_time,
+	.set_rtc_time		= set_rtc_time,
+#endif
+};

Noticed you didn't have an PCIe support. Is that something that exists on the board? is wired to anything?

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diff -purN -X dontdiff linux-2.6/drivers/net/gianfar.h linux-2.6- esi/drivers/net/gianfar.h
--- linux-2.6/drivers/net/gianfar.h 2007-07-31 10:15:39.000000000
-0500
+++ linux-2.6-esi/drivers/net/gianfar.h 2007-07-31
10:39:10.000000000 -0500

drivers/net/gianfar.h +0 -0
@@ -131,7 +131,7 @@ extern const char gfar_driver_version[];
 #define DEFAULT_RXCOUNT	16
 #define DEFAULT_RXTIME	4
 
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drivers/net/gianfar.h extern const char gfar_driver_version[]; · line 134

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drivers/net/gianfar.h +1 -1
-#define TBIPA_VALUE		0x1f
+#define TBIPA_VALUE		0x1e

we need to turn this into a config option or something.

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I was a little concerned when I saw a hard-coded address. I never would have found the conflict with the QUAD PHY (it starts at 0x1f and increments for each device) without your help.

Let me know what you think and I'll put something together.

I'll talk to someone here and see. I think a simple thing would be to make it a Kconfig'ble option to what the value is for TBIPA_VALUE and default to 0x1f but changeable in your defconfig.

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drivers/net/gianfar.h +0 -0
 #define MIIMCFG_INIT_VALUE	0x00000007
 #define MIIMCFG_RESET           0x80000000
 #define MIIMIND_BUSY            0x00000001