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(big) real mode emulation - push imm8

PATCH Applied Avi Kivity 4 participants 36 messages Sep 1, 2007 – Sep 19, 2007 28 messages not in the archive KVM

lore
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lore

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Avi Kivity

author
#3 lore raw
Quoted 7 lines · Jim Paris
Quoted 6 lines

And regarding the patches in the dos format, I tried sending patches to my yahoo/gmail account and I don't see them in the DOS format. It's strange it is reaching you in the DOS format. I don't know a way to avoid it right now. Please let me know if there is any known trick or method to avoid this issue.

Quoted 7 lines

Your attachments look correct to me. They have CR/LF endings in the base64 encoded data, but that is the correct "canonical form" for text/* attachments as described by MIME (RFC2049 etc). Avi, I think your client should be converting to the "local form" when you save them -- Evolution and Mutt at least do this.

Okay. I'll just run dos2unix then, and file a bug report against thunderbird.

Quoted 4 lines

Regardless, Nitin might be able to avoid the problems by sending the attachments with a non-text mime-type, maybe by renaming them to *.dat?

That might cause them not to be viewed inline, so I'd rather not.

Signature · 8 lines
Any sufficiently difficult bug is indistinguishable from a feature.


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author
#5 lore raw
Quoted 7 lines · Nitin A Kamble

Hi Avi,
Attached is the patch to implement the push imm8 instruction opcode
0x6a.

Please apply or comment.

The patches look good, but I am holding on right now because of the emulator split. If that is not merged in the next couple of days, I will merge your patches.

Quoted 7 lines

And regarding the patches in the dos format, I tried sending patches to my yahoo/gmail account and I don't see them in the DOS format. It's strange it is reaching you in the DOS format. I don't know a way to avoid it right now. Please let me know if there is any known trick or method to avoid this issue.

It's probably an issue at my end (Thunderbird). I'll just have to remember to run dos2unix on the patches.

Signature · 7 lines
error compiling committee.c: too many arguments to function


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#7 lore raw
Quoted 5 lines · Avi Kivity
Quoted 4 lines · Nitin A Kamble

Hi Avi,
Attached is the patch to implement the push imm8 instruction opcode
0x6a.

Quoted 7 lines
Quoted 3 lines

Please apply or comment.

The patches look good, but I am holding on right now because of the emulator split. If that is not merged in the next couple of days, I will merge your patches.

I'm currently working on this.

But first of all I'm trying to install a FC-6 to reproduce the problem (I don't have it with a Debian etch): I don't know why but I have some problems with the fedora installer (even If I take older kvm or qemu). The merge seems good.

Avi, if you want you can apply all modification you have on the x86_emulator, I'll rewrite the emulator split according these modifications.

Tx,
Laurent

Signature · 2 lines
------------- Laurent.Vivier-6ktuUTfB/[email protected]  --------------
          "Software is hard" - Donald Knuth

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author
#9 lore raw
Quoted 12 lines · Laurent Vivier
Quoted 10 lines · Avi Kivity
Quoted 8 lines · Nitin A Kamble

Hi Avi,
Attached is the patch to implement the push imm8 instruction opcode
0x6a.

Please apply or comment.

Quoted 8 lines
Quoted 4 lines

The patches look good, but I am holding on right now because of the emulator split. If that is not merged in the next couple of days, I will merge your patches.

I'm currently working on this.

Thanks!

Quoted 7 lines

But first of all I'm trying to install a FC-6 to reproduce the problem (I don't have it with a Debian etch): I don't know why but I have some problems with the fedora installer (even If I take older kvm or qemu). The merge seems good.

Avi, if you want you can apply all modification you have on the x86_emulator, I'll rewrite the emulator split according these modifications.

Okay, I'll apply Nitin's patches.

Signature · 7 lines
error compiling committee.c: too many arguments to function


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#11 lore raw

Hi Avi,
Thanks for pushing my patch in.

Can you also take the attached patch? It will make my daily merges easier.

Thanks & Regards,
Nitin
Linux Open Source Technology Center, Intel Corporation
------------------------------------------------------------------------
--------
The Mind is like a parachute; it works much better when it's open.

-----Original Message-----
From: Avi Kivity [mailto:avi-atKUWr5tajBWk0Htik3J/[email protected]]
Sent: Wednesday, September 12, 2007 1:28 AM
To: Laurent Vivier
Cc: Kamble, Nitin A; kvm-devel
Subject: Re: [kvm-devel] [PATCH] (big) real mode emulation - push imm8

Quoted 6 lines · Laurent Vivier
Quoted 4 lines · Avi Kivity
Quoted 2 lines · Nitin A Kamble

Hi Avi,
Attached is the patch to implement the push imm8 instruction

opcode

Quoted 6 lines
Quoted 6 lines
Quoted 6 lines

0x6a.

Please apply or comment.

Quoted 8 lines
Quoted 4 lines

The patches look good, but I am holding on right now because of the emulator split. If that is not merged in the next couple of days, I will merge your patches.

I'm currently working on this.

Thanks!

Quoted 1 line

But first of all I'm trying to install a FC-6 to reproduce the problem

(I don't

Quoted 1 line

have it with a Debian etch): I don't know why but I have some problems

with the

Quoted 1 line

fedora installer (even If I take older kvm or qemu). The merge seems

good.

Quoted 2 lines

Avi, if you want you can apply all modification you have on the

x86_emulator,

Quoted 2 lines

I'll rewrite the emulator split according these modifications.

Okay, I'll apply Nitin's patches.

Signature · 1 line
error compiling committee.c: too many arguments to function

Hi Avi,
Attached is the patch to sort remaining op-codes entries in the
x86_emulate.c
This patch is just restructuring current code, not new logic added to
the file. It makes my life simpler with merging my x86 emulation tree.

please apply.

Signature · 5 lines
Thanks & Regards,
Nitin
Open Source Technology Center, Intel Corporation
-----------------------------------------------------------------
The mind is like a parachute; it works much better when it's open

commit 0af0b63e81cc345009d63703e5a7228fc9edd4d2

Author: Nitin A Kamble <[email protected]>
Date:   Thu Sep 6 16:46:31 2007 -0700

sort remaining opcodes in the master tree, to make merge with my tree easiser.

drivers/kvm/x86_emulate.c +50 -47
index 7439b34..97b7616 100644
@@ -976,19 +976,8 @@ done_prefixes:
 		dst.val = src.val;
 		lock_prefix = 1;
 		break;
-	case 0xa0 ... 0xa1:	/* mov */
-		dst.ptr = (unsigned long *)&_regs[VCPU_REGS_RAX];
-		dst.val = src.val;
-		_eip += ad_bytes;	/* skip src displacement */
-		break;
-	case 0xa2 ... 0xa3:	/* mov */
-		dst.val = (unsigned long)_regs[VCPU_REGS_RAX];
-		_eip += ad_bytes;	/* skip dst displacement */
-		break;
 	case 0x88 ... 0x8b:	/* mov */
-	case 0xc6 ... 0xc7:	/* mov (sole member of Grp11) */
-		dst.val = src.val;
-		break;
+		goto mov;
 	case 0x8f:		/* pop (sole member of Grp1a) */
 		/* 64-bit mode: POP always pops a 64-bit operand. */
 		if (mode == X86EMUL_MODE_PROT64)
@@ -999,6 +988,15 @@ done_prefixes:
 			goto done;
 		register_address_increment(_regs[VCPU_REGS_RSP], dst.bytes);
 		break;
+	case 0xa0 ... 0xa1:	/* mov */
+		dst.ptr = (unsigned long *)&_regs[VCPU_REGS_RAX];
+		dst.val = src.val;
+		_eip += ad_bytes;	/* skip src displacement */
+		break;
+	case 0xa2 ... 0xa3:	/* mov */
+		dst.val = (unsigned long)_regs[VCPU_REGS_RAX];
+		_eip += ad_bytes;	/* skip dst displacement */
+		break;
 	case 0xc0 ... 0xc1:
 	      grp2:		/* Grp2 */
 		switch (modrm_reg) {
@@ -1026,6 +1024,10 @@ done_prefixes:
 			break;
 		}
 		break;
+	case 0xc6 ... 0xc7:	/* mov (sole member of Grp11) */
+	mov:
+		dst.val = src.val;
+		break;
 	case 0xd0 ... 0xd1:	/* Grp2 */
 		src.val = 1;
 		goto grp2;
@@ -1164,6 +1166,8 @@ special_insn:
 		dst.ptr = (void *) register_address(
 			ctxt->ss_base, _regs[VCPU_REGS_RSP]);
 		break;
+	case 0x58 ... 0x5f: /* pop reg */
+		dst.ptr = (unsigned long *)&_regs[b & 0x7];
 	case 0x6c:		/* insb */
 	case 0x6d:		/* insw/insd */
 		 if (kvm_emulate_pio_string(ctxt->vcpu, NULL,
@@ -1195,6 +1199,22 @@ special_insn:
 				) == 0)
 			return -1;
 		return 0;
+	case 0xc3: /* ret */
+		dst.ptr = &_eip;
+		goto pop_instruction;
+	case 0xf4:              /* hlt */
+		ctxt->vcpu->halt_request = 1;
+		goto done;
+
+pop_instruction:
+		if ((rc = ops->read_std(register_address(ctxt->ss_base,
+			_regs[VCPU_REGS_RSP]), dst.ptr, op_bytes, ctxt->vcpu))
+			!= 0)
+			goto done;
+
+		register_address_increment(_regs[VCPU_REGS_RSP], op_bytes);
+		no_wb = 1; /* Disable writeback. */
+		break;
 	}
 	if (rep_prefix) {
 		if (_regs[VCPU_REGS_RCX] == 0) {
@@ -1243,24 +1263,7 @@ special_insn:
 	case 0xae ... 0xaf:	/* scas */
 		DPRINTF("Urk! I don't handle SCAS.\n");
 		goto cannot_emulate;
-	case 0xf4:              /* hlt */
-		ctxt->vcpu->halt_request = 1;
-		goto done;
-	case 0xc3: /* ret */
-		dst.ptr = &_eip;
-		goto pop_instruction;
-	case 0x58 ... 0x5f: /* pop reg */
-		dst.ptr = (unsigned long *)&_regs[b & 0x7];
-
-pop_instruction:
-		if ((rc = ops->read_std(register_address(ctxt->ss_base,
-			_regs[VCPU_REGS_RSP]), dst.ptr, op_bytes, ctxt->vcpu))
-			!= 0)
-			goto done;
 
-		register_address_increment(_regs[VCPU_REGS_RSP], op_bytes);
-		no_wb = 1; /* Disable writeback. */
-		break;
 	}
 	goto writeback;
 
@@ -1354,6 +1357,16 @@ twobyte_insn:
 		/* Odd cmov opcodes (lsb == 1) have inverted sense. */
 		no_wb ^= b & 1;
 		break;
+	case 0xa3:
+	      bt:		/* bt */
+		src.val &= (dst.bytes << 3) - 1; /* only subword offset */
+		emulate_2op_SrcV_nobyte("bt", src, dst, _eflags);
+		break;
+	case 0xab:
+	      bts:		/* bts */
+		src.val &= (dst.bytes << 3) - 1; /* only subword offset */
+		emulate_2op_SrcV_nobyte("bts", src, dst, _eflags);
+		break;
 	case 0xb0 ... 0xb1:	/* cmpxchg */
 		/*
 		 * Save real source value, then compare EAX against
@@ -1371,30 +1384,15 @@ twobyte_insn:
 			dst.ptr = (unsigned long *)&_regs[VCPU_REGS_RAX];
 		}
 		break;
-	case 0xa3:
-	      bt:		/* bt */
-		src.val &= (dst.bytes << 3) - 1; /* only subword offset */
-		emulate_2op_SrcV_nobyte("bt", src, dst, _eflags);
-		break;
 	case 0xb3:
 	      btr:		/* btr */
 		src.val &= (dst.bytes << 3) - 1; /* only subword offset */
 		emulate_2op_SrcV_nobyte("btr", src, dst, _eflags);
 		break;
-	case 0xab:
-	      bts:		/* bts */
-		src.val &= (dst.bytes << 3) - 1; /* only subword offset */
-		emulate_2op_SrcV_nobyte("bts", src, dst, _eflags);
-		break;
 	case 0xb6 ... 0xb7:	/* movzx */
 		dst.bytes = op_bytes;
 		dst.val = (d & ByteOp) ? (u8) src.val : (u16) src.val;
 		break;
-	case 0xbb:
-	      btc:		/* btc */
-		src.val &= (dst.bytes << 3) - 1; /* only subword offset */
-		emulate_2op_SrcV_nobyte("btc", src, dst, _eflags);
-		break;
 	case 0xba:		/* Grp8 */
 		switch (modrm_reg & 3) {
 		case 0:
@@ -1407,6 +1405,11 @@ twobyte_insn:
 			goto btc;
 		}
 		break;
+	case 0xbb:
+	      btc:		/* btc */
+		src.val &= (dst.bytes << 3) - 1; /* only subword offset */
+		emulate_2op_SrcV_nobyte("btc", src, dst, _eflags);
+		break;
 	case 0xbe ... 0xbf:	/* movsx */
 		dst.bytes = op_bytes;
 		dst.val = (d & ByteOp) ? (s8) src.val : (s16) src.val;
@@ -1418,14 +1421,14 @@ twobyte_special_insn:
 	/* Disable writeback. */
 	no_wb = 1;
 	switch (b) {
+	case 0x06:
+		emulate_clts(ctxt->vcpu);
+		break;
 	case 0x09:		/* wbinvd */
 		break;
 	case 0x0d:		/* GrpP (prefetch) */
 	case 0x18:		/* Grp16 (prefetch/nop) */
 		break;
-	case 0x06:
-		emulate_clts(ctxt->vcpu);
-		break;
 	case 0x20: /* mov cr, reg */
 		if (modrm_mod != 3)
 			goto cannot_emulate;

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#14 lore raw

Hi Avi,
Attached is the updated version of the patch, to match the latest tip
of the tree.

Please apply.

Signature · 5 lines
Thanks & Regards,
Nitin
Open Source Technology Center, Intel Corporation
-----------------------------------------------------------------
The mind is like a parachute; it works much better when it's open
Quoted 52 lines · Nitin A

Hi Avi,
Thanks for pushing my patch in.

Can you also take the attached patch? It will make my daily merges easier.

Thanks & Regards,
Nitin
Linux Open Source Technology Center, Intel Corporation
------------------------------------------------------------------------
--------
The Mind is like a parachute; it works much better when it's open.

-----Original Message-----
From: Avi Kivity [mailto:avi-atKUWr5tajBWk0Htik3J/[email protected]]
Sent: Wednesday, September 12, 2007 1:28 AM
To: Laurent Vivier
Cc: Kamble, Nitin A; kvm-devel
Subject: Re: [kvm-devel] [PATCH] (big) real mode emulation - push imm8

Quoted 6 lines · Laurent Vivier
Quoted 4 lines · Avi Kivity
Quoted 2 lines · Nitin A Kamble

Hi Avi,
Attached is the patch to implement the push imm8 instruction

opcode

Quoted 6 lines
Quoted 6 lines
Quoted 6 lines

0x6a.

Please apply or comment.

Quoted 8 lines
Quoted 4 lines

The patches look good, but I am holding on right now because of the emulator split. If that is not merged in the next couple of days, I will merge your patches.

I'm currently working on this.

Thanks!

Quoted 1 line

But first of all I'm trying to install a FC-6 to reproduce the problem

(I don't

Quoted 1 line

have it with a Debian etch): I don't know why but I have some problems

with the

Quoted 1 line

fedora installer (even If I take older kvm or qemu). The merge seems

good.

Quoted 2 lines

Avi, if you want you can apply all modification you have on the

Quoted 24 lines

x86_emulator,

Quoted 2 lines

I'll rewrite the emulator split according these modifications.

Okay, I'll apply Nitin's patches.

email message attachment

Quoted 16 lines

-------- Forwarded Message --------
From: Kamble, Nitin A <[email protected]>
Reply-To: Kamble, Nitin A <[email protected]>
To: Avi Kivity <avi-atKUWr5tajBWk0Htik3J/[email protected]>
Cc: kvm-devel <[email protected]>
Subject: [PATCH] (big) real mode emulation - sort opcode entries 2
Date: Thu, 6 Sep 2007 14:54:55 -0700

Hi Avi,
Attached is the patch to sort remaining op-codes entries in the
x86_emulate.c
This patch is just restructuring current code, not new logic added to
the file. It makes my life simpler with merging my x86 emulation tree.

please apply.

-------------------------------------------------------------------------
This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2005.
http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/

_______________________________________________
kvm-devel mailing list [email protected]
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#16 lore raw

The patch was empty in the last email. My mistake. Reattaching it.

Thanks to Bernhard for pointing it out.

Signature · 5 lines
Thanks & Regards,
Nitin
Open Source Technology Center, Intel Corporation
-----------------------------------------------------------------
The mind is like a parachute; it works much better when it's open
Quoted 5 lines · Nitin A Kamble

Hi Avi,
Attached is the updated version of the patch, to match the latest tip
of the tree.

Please apply.

drivers/kvm/x86_emulate.c +49 -50
index 18c2b2c..cd3c5f7 100644
@@ -978,19 +978,8 @@ push:
 		dst.val = src.val;
 		lock_prefix = 1;
 		break;
-	case 0xa0 ... 0xa1:	/* mov */
-		dst.ptr = (unsigned long *)&_regs[VCPU_REGS_RAX];
-		dst.val = src.val;
-		_eip += ad_bytes;	/* skip src displacement */
-		break;
-	case 0xa2 ... 0xa3:	/* mov */
-		dst.val = (unsigned long)_regs[VCPU_REGS_RAX];
-		_eip += ad_bytes;	/* skip dst displacement */
-		break;
 	case 0x88 ... 0x8b:	/* mov */
-	case 0xc6 ... 0xc7:	/* mov (sole member of Grp11) */
-		dst.val = src.val;
-		break;
+		goto mov;
 	case 0x8f:		/* pop (sole member of Grp1a) */
 		/* 64-bit mode: POP always pops a 64-bit operand. */
 		if (mode == X86EMUL_MODE_PROT64)
@@ -1001,6 +990,15 @@ push:
 			goto done;
 		register_address_increment(_regs[VCPU_REGS_RSP], dst.bytes);
 		break;
+	case 0xa0 ... 0xa1:	/* mov */
+		dst.ptr = (unsigned long *)&_regs[VCPU_REGS_RAX];
+		dst.val = src.val;
+		_eip += ad_bytes;	/* skip src displacement */
+		break;
+	case 0xa2 ... 0xa3:	/* mov */
+		dst.val = (unsigned long)_regs[VCPU_REGS_RAX];
+		_eip += ad_bytes;	/* skip dst displacement */
+		break;
 	case 0xc0 ... 0xc1:
 	      grp2:		/* Grp2 */
 		switch (modrm_reg) {
@@ -1028,6 +1026,10 @@ push:
 			break;
 		}
 		break;
+	case 0xc6 ... 0xc7:	/* mov (sole member of Grp11) */
+	mov:
+		dst.val = src.val;
+		break;
 	case 0xd0 ... 0xd1:	/* Grp2 */
 		src.val = 1;
 		goto grp2;
@@ -1186,6 +1188,17 @@ special_insn:
 		dst.ptr = (void *) register_address(
 			ctxt->ss_base, _regs[VCPU_REGS_RSP]);
 		break;
+	case 0x58 ... 0x5f: /* pop reg */
+		dst.ptr = (unsigned long *)&_regs[b & 0x7];
+pop_instruction:
+		if ((rc = ops->read_std(register_address(ctxt->ss_base,
+			_regs[VCPU_REGS_RSP]), dst.ptr, op_bytes, ctxt->vcpu))
+			!= 0)
+			goto done;
+
+		register_address_increment(_regs[VCPU_REGS_RSP], op_bytes);
+		no_wb = 1; /* Disable writeback. */
+		break;
 	case 0x6c:		/* insb */
 	case 0x6d:		/* insw/insd */
 		 if (kvm_emulate_pio_string(ctxt->vcpu, NULL,
@@ -1217,12 +1230,15 @@ special_insn:
 				) == 0)
 			return -1;
 		return 0;
-
 	case 0x9c: /* pushf */
 		src.val =  (unsigned long) _eflags;
 		goto push;
-		break;
-
+	case 0xc3: /* ret */
+		dst.ptr = &_eip;
+		goto pop_instruction;
+	case 0xf4:              /* hlt */
+		ctxt->vcpu->halt_request = 1;
+		goto done;
 	}
 	if (rep_prefix) {
 		if (_regs[VCPU_REGS_RCX] == 0) {
@@ -1271,24 +1287,7 @@ special_insn:
 	case 0xae ... 0xaf:	/* scas */
 		DPRINTF("Urk! I don't handle SCAS.\n");
 		goto cannot_emulate;
-	case 0xf4:              /* hlt */
-		ctxt->vcpu->halt_request = 1;
-		goto done;
-	case 0xc3: /* ret */
-		dst.ptr = &_eip;
-		goto pop_instruction;
-	case 0x58 ... 0x5f: /* pop reg */
-		dst.ptr = (unsigned long *)&_regs[b & 0x7];
-
-pop_instruction:
-		if ((rc = ops->read_std(register_address(ctxt->ss_base,
-			_regs[VCPU_REGS_RSP]), dst.ptr, op_bytes, ctxt->vcpu))
-			!= 0)
-			goto done;
 
-		register_address_increment(_regs[VCPU_REGS_RSP], op_bytes);
-		no_wb = 1; /* Disable writeback. */
-		break;
 	}
 	goto writeback;
 
@@ -1382,6 +1381,16 @@ twobyte_insn:
 		/* Odd cmov opcodes (lsb == 1) have inverted sense. */
 		no_wb ^= b & 1;
 		break;
+	case 0xa3:
+	      bt:		/* bt */
+		src.val &= (dst.bytes << 3) - 1; /* only subword offset */
+		emulate_2op_SrcV_nobyte("bt", src, dst, _eflags);
+		break;
+	case 0xab:
+	      bts:		/* bts */
+		src.val &= (dst.bytes << 3) - 1; /* only subword offset */
+		emulate_2op_SrcV_nobyte("bts", src, dst, _eflags);
+		break;
 	case 0xb0 ... 0xb1:	/* cmpxchg */
 		/*
 		 * Save real source value, then compare EAX against
@@ -1399,30 +1408,15 @@ twobyte_insn:
 			dst.ptr = (unsigned long *)&_regs[VCPU_REGS_RAX];
 		}
 		break;
-	case 0xa3:
-	      bt:		/* bt */
-		src.val &= (dst.bytes << 3) - 1; /* only subword offset */
-		emulate_2op_SrcV_nobyte("bt", src, dst, _eflags);
-		break;
 	case 0xb3:
 	      btr:		/* btr */
 		src.val &= (dst.bytes << 3) - 1; /* only subword offset */
 		emulate_2op_SrcV_nobyte("btr", src, dst, _eflags);
 		break;
-	case 0xab:
-	      bts:		/* bts */
-		src.val &= (dst.bytes << 3) - 1; /* only subword offset */
-		emulate_2op_SrcV_nobyte("bts", src, dst, _eflags);
-		break;
 	case 0xb6 ... 0xb7:	/* movzx */
 		dst.bytes = op_bytes;
 		dst.val = (d & ByteOp) ? (u8) src.val : (u16) src.val;
 		break;
-	case 0xbb:
-	      btc:		/* btc */
-		src.val &= (dst.bytes << 3) - 1; /* only subword offset */
-		emulate_2op_SrcV_nobyte("btc", src, dst, _eflags);
-		break;
 	case 0xba:		/* Grp8 */
 		switch (modrm_reg & 3) {
 		case 0:
@@ -1435,6 +1429,11 @@ twobyte_insn:
 			goto btc;
 		}
 		break;
+	case 0xbb:
+	      btc:		/* btc */
+		src.val &= (dst.bytes << 3) - 1; /* only subword offset */
+		emulate_2op_SrcV_nobyte("btc", src, dst, _eflags);
+		break;
 	case 0xbe ... 0xbf:	/* movsx */
 		dst.bytes = op_bytes;
 		dst.val = (d & ByteOp) ? (s8) src.val : (s16) src.val;
@@ -1446,14 +1445,14 @@ twobyte_special_insn:
 	/* Disable writeback. */
 	no_wb = 1;
 	switch (b) {
+	case 0x06:
+		emulate_clts(ctxt->vcpu);
+		break;
 	case 0x09:		/* wbinvd */
 		break;
 	case 0x0d:		/* GrpP (prefetch) */
 	case 0x18:		/* Grp16 (prefetch/nop) */
 		break;
-	case 0x06:
-		emulate_clts(ctxt->vcpu);
-		break;
 	case 0x20: /* mov cr, reg */
 		if (modrm_mod != 3)
 			goto cannot_emulate;

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author Applied
#18 lore raw
Quoted 4 lines · Nitin A Kamble

The patch was empty in the last email. My mistake. Reattaching it.

Thanks to Bernhard for pointing it out.

Thanks, applied.

Signature · 7 lines
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#19 lore raw

PATCH 1/1 (big) real mode emulation - jump conditional relative

In reply to a message not in the archive

Hi Avi,
Attached is the patch to implement instruction:

	jump conditional relative (like: jnz jo etc)
	opcode : 0x0f80 - 0x0f8f

Please apply.

Signature · 5 lines
Thanks & Regards,
Nitin
Open Source Technology Center, Intel Corporation
-----------------------------------------------------------------
The mind is like a parachute; it works much better when it's open

commit 3a29a61aabc299ccd5b41d50207e2dfbc7b38236

Author: Nitin A Kamble <[email protected]>
Date:   Thu Sep 13 14:57:28 2007 -0700

Implement emulation of instruction:
jump conditional rel
opcodes: 0x0f80 - 0x0f8f

drivers/kvm/x86_emulate.c +60 -1
index 18c2b2c..007961b 100644
@@ -188,7 +188,10 @@ static u16 twobyte_table[256] = {
 	/* 0x70 - 0x7F */
 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	/* 0x80 - 0x8F */
-	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
+	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
+	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
+	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
 	/* 0x90 - 0x9F */
 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	/* 0xA0 - 0xA7 */
@@ -479,6 +482,42 @@ static int read_descriptor(struct x86_emulate_ctxt *ctxt,
 	return rc;
 }
 
+static int
+test_cc(unsigned int condition, unsigned int flags)
+{
+    int rc = 0;
+
+	switch ((condition & 15) >> 1) {
+	case 0: /* o */
+		rc |= (flags & EFLG_OF);
+		break;
+	case 1: /* b/c/nae */
+		rc |= (flags & EFLG_CF);
+		break;
+	case 2: /* z/e */
+		rc |= (flags & EFLG_ZF);
+		break;
+	case 3: /* be/na */
+		rc |= (flags & (EFLG_CF|EFLG_ZF));
+		break;
+	case 4: /* s */
+		rc |= (flags & EFLG_SF);
+		break;
+	case 5: /* p/pe */
+		rc |= (flags & EFLG_PF);
+		break;
+	case 7: /* le/ng */
+		rc |= (flags & EFLG_ZF);
+		/* fall through */
+	case 6: /* l/nge */
+		rc |= (!(flags & EFLG_SF) != !(flags & EFLG_OF));
+		break;
+	}
+
+	/* Odd condition identifiers (lsb == 1) have inverted sense. */
+	return (!!rc ^ (condition & 1));
+}
+
 int
 x86_emulate_memop(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
 {
@@ -1487,6 +1526,26 @@ twobyte_special_insn:
 		}
 		rc = X86EMUL_CONTINUE;
 		break;
+	case 0x80 ... 0x8f: /* jnz rel, etc*/ {
+		long int rel;
+		switch (op_bytes) {
+		case 2:
+			rel = insn_fetch(s16, 2, _eip);
+			break;
+		case 4:
+			rel = insn_fetch(s32, 4, _eip);
+			break;
+		case 8:
+			rel = insn_fetch(s64, 8, _eip);
+			break;
+		default:
+			DPRINTF("jnz: Invalid op_bytes\n");
+			goto cannot_emulate;
+		}
+		if (test_cc(b, _eflags))
+			JMP_REL(rel);
+		}
+		break;
 	case 0xc7:		/* Grp9 (cmpxchg8b) */
 		{
 			u64 old, new;

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#21 lore raw

Re: [PATCH] (big) real mode emulation - jump conditional relative

Quoted 6 lines · Nitin A Kamble

Hi Avi,
Attached is the patch to implement instruction:

	jump conditional relative (like: jnz jo etc)
	opcode : 0x0f80 - 0x0f8f

Please apply.

Hi Nitin,

Out of curiousity, how far do you think we are from being able to run a big real mode guest?

Regards,

Anthony Liguori

Quoted 8 lines

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Quoted 4 lines

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#23 lore raw

Re: [PATCH] (big) real mode emulation - jump conditional relative

Hi Anthony,
I think not very far. Currently I am able to complete int 10 call, and
it is going back to protected mode after the big real mode with SuSE 10.1. Currently it is getting to a bad place in protected mode after emulation. I am debugging it.

Thanks & Regards,
Nitin
Linux Open Source Technology Center, Intel Corporation
------------------------------------------------------------------------
--------
The Mind is like a parachute; it works much better when it's open.

-----Original Message-----
From: Anthony Liguori [mailto:[email protected]]
Sent: Thursday, September 13, 2007 1:48 PM
To: Kamble, Nitin A
Cc: Avi Kivity; kvm-devel; Laurent Vivier
Subject: Re: [kvm-devel] [PATCH] (big) real mode emulation - jump conditional relative

Quoted 6 lines · Nitin A Kamble

Hi Avi,
Attached is the patch to implement instruction:

	jump conditional relative (like: jnz jo etc)
	opcode : 0x0f80 - 0x0f8f

Please apply.

Hi Nitin,

Out of curiousity, how far do you think we are from being able to run a big real mode guest?

Regards,

Anthony Liguori

Quoted 1 line

------------------------------------------------------------------------

Quoted 2 lines

------------------------------------------------------------------------
-

Quoted 4 lines

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#24 lore raw

PATCH 1/1 (big) real mode emulation - jump conditional short relative

In reply to a message not in the archive

Hi Avi,
This patch is extension to the previous "jump conditional" patch. it
implements more jump conditional instruction, opcodes 0x70-0x7f.

Please Apply.

Signature · 5 lines
Thanks & Regards,
Nitin
Open Source Technology Center, Intel Corporation
-----------------------------------------------------------------
The mind is like a parachute; it works much better when it's open

commit c8ea6835e9e4af29339b6abd7800fdd570a23d3a

Author: Nitin A Kamble <[email protected]>
Date:   Thu Sep 13 19:21:43 2007 -0700

Implement emulation of more jump conditional instructions
jcc shortrel
opcodes: 0x70 - 0x7f

drivers/kvm/x86_emulate.c +12 -2
index 60feccc..eaf89fa 100644
@@ -111,8 +111,12 @@ static u8 opcode_table[256] = {
 	0, 0, ImplicitOps|Mov, 0,
 	SrcNone  | ByteOp  | ImplicitOps, SrcNone  | ImplicitOps, /* insb, insw/insd */
 	SrcNone  | ByteOp  | ImplicitOps, SrcNone  | ImplicitOps, /* outsb, outsw/outsd */
-	/* 0x70 - 0x7F */
-	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	/* 0x70 - 0x77 */
+	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
+	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
+	/* 0x78 - 0x7F */
+	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
+	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
 	/* 0x80 - 0x87 */
 	ByteOp | DstMem | SrcImm | ModRM, DstMem | SrcImm | ModRM,
 	ByteOp | DstMem | SrcImm | ModRM, DstMem | SrcImmByte | ModRM,
@@ -1269,6 +1273,12 @@ pop_instruction:
 				) == 0)
 			return -1;
 		return 0;
+	case 0x70 ... 0x7f: /* jcc (short) */ {
+		int rel = insn_fetch(s8, 1, _eip);
+		if (test_cc(b, _eflags))
+		JMP_REL(rel);
+		break;
+	}
 	case 0x9c: /* pushf */
 		src.val =  (unsigned long) _eflags;
 		goto push;

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#26 lore raw

PATCH 1/1 (big) real mode emulation - or instruction correction

Hi Avi,
This patch corrects the emulation of the instruction "or" for opcodes
0xc & 0cd.
Please Apply.

Signature · 5 lines
Thanks & Regards,
Nitin
Open Source Technology Center, Intel Corporation
-----------------------------------------------------------------
The mind is like a parachute; it works much better when it's open

commit e7b48d62cfaf4261ec228ee58bcb3d30b434ab8c

Author: Nitin A Kamble <[email protected]>
Date:   Thu Sep 13 19:30:26 2007 -0700

Correct the emulation of or instruction, opcodes 0xc & 0xd.

drivers/kvm/x86_emulate.c +18 -1
index eaf89fa..2ffe7f8 100644
@@ -913,10 +913,27 @@ done_prefixes:
 	      add:		/* add */
 		emulate_2op_SrcV("add", src, dst, _eflags);
 		break;
-	case 0x08 ... 0x0d:
+	case 0x08 ... 0x0b:
 	      or:		/* or */
 		emulate_2op_SrcV("or", src, dst, _eflags);
 		break;
+	case 0x0c: 		/* or al imm8 */
+		dst.type = OP_REG;
+		dst.ptr = &_regs[VCPU_REGS_RAX];
+		dst.val = *(u8 *)dst.ptr;
+		dst.bytes = 1;
+		dst.orig_val = dst.val;
+		goto or;
+	case 0x0d:		/* or ax imm16, or eax imm32 */
+		dst.type = OP_REG;
+		dst.bytes = op_bytes;
+		dst.ptr = &_regs[VCPU_REGS_RAX];
+		if (op_bytes == 2)
+			dst.val = *(u16 *)dst.ptr;
+		else
+			dst.val = *(u32 *)dst.ptr;
+		dst.orig_val = dst.val;
+		goto or;
 	case 0x10 ... 0x15:
 	      adc:		/* adc */
 		emulate_2op_SrcV("adc", src, dst, _eflags);

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#28 lore raw

PATCH 1/1 (big) real mode emulation - sub imm

Hi Avi,
Attached patch implement emulation of instructions:

	sub al imm8  (opcode 0x2c)
	sub ax imm16, sub eax imm32 (opcode 0x2d)

Please Apply

Signature · 5 lines
Thanks & Regards,
Nitin
Open Source Technology Center, Intel Corporation
-----------------------------------------------------------------
The mind is like a parachute; it works much better when it's open

commit 6c2690c56af49dd810b504d7c5b8983e4bf25604

Author: Nitin A Kamble <[email protected]>
Date:   Thu Sep 13 19:39:56 2007 -0700

Implement emulation of instructions:
sub al imm8 (opcode 0x2c)
sub ax imm16, sub eax imm32 (opcode 0x2d)

drivers/kvm/x86_emulate.c +16 -2
index 2ffe7f8..5ca4626 100644
@@ -87,7 +87,7 @@ static u8 opcode_table[256] = {
 	/* 0x28 - 0x2F */
 	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
 	ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
-	0, 0, 0, 0,
+	SrcImmByte, SrcImm, 0, 0,
 	/* 0x30 - 0x37 */
 	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
 	ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
@@ -963,10 +963,24 @@ done_prefixes:
 			dst.val = *(u32 *)dst.ptr;
 		dst.orig_val = dst.val;
 		goto and;
-	case 0x28 ... 0x2d:
+	case 0x28 ... 0x2b:
 	      sub:		/* sub */
 		emulate_2op_SrcV("sub", src, dst, _eflags);
 		break;
+	case 0x2c: 		/* sub al imm8 */
+		dst.type = OP_REG;
+		dst.ptr = &_regs[VCPU_REGS_RAX];
+		dst.val = *(u8 *)dst.ptr;
+		dst.bytes = 1;
+		dst.orig_val = dst.val;
+		goto sub;
+	case 0x2d:		/* sub ax imm16, sub eax imm32 */
+		dst.type = OP_REG;
+		dst.bytes = 2;
+		dst.ptr = &_regs[VCPU_REGS_RAX];
+		dst.val = *(u16 *)dst.ptr;
+		dst.orig_val = dst.val;
+		goto sub;
 	case 0x30 ... 0x35:
 	      xor:		/* xor */
 		emulate_2op_SrcV("xor", src, dst, _eflags);

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#30 lore raw

PATCH 1/1 (big) real mode emulation - cmp correction

Hi Avi,
Attached is the patch to correct the implementation of instruction:

	cmp
	opcodes: 0x3c, 0x3d

Please Apply.

Signature · 5 lines
Thanks & Regards,
Nitin
Open Source Technology Center, Intel Corporation
-----------------------------------------------------------------
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commit 637711de0b9b2431c32cfdd880fed6baabec3982

Author: Nitin A Kamble <[email protected]>
Date:   Thu Sep 13 19:52:21 2007 -0700

Correct emulation of instruction
cmp
opcodes: 0x3c & 0x3d

drivers/kvm/x86_emulate.c +22 -1
index 5ca4626..2e4c631 100644
@@ -985,10 +985,31 @@ done_prefixes:
 	      xor:		/* xor */
 		emulate_2op_SrcV("xor", src, dst, _eflags);
 		break;
-	case 0x38 ... 0x3d:
+	case 0x38 ... 0x3b:
 	      cmp:		/* cmp */
 		emulate_2op_SrcV("cmp", src, dst, _eflags);
 		break;
+	case 0x3c:
+		dst.type = OP_REG;
+		dst.ptr = &_regs[VCPU_REGS_RAX];
+		dst.val = *(u8 *)dst.ptr;
+		dst.bytes = 1;
+		dst.orig_val = dst.val;
+		goto cmp;
+	case 0x3d:
+		dst.ptr = (unsigned long *) &_regs[VCPU_REGS_RAX];
+		switch ((dst.bytes = op_bytes)) {
+		case 2:
+			dst.val = *(u16 *) dst.ptr;
+			break;
+		case 4:
+			dst.val = *(u32 *) dst.ptr;
+			break;
+		case 8:
+			dst.val = *(u64 *) dst.ptr;
+			break;
+		}
+		goto cmp;
 	case 0x63:		/* movsxd */
 		if (mode != X86EMUL_MODE_PROT64)
 			goto cannot_emulate;

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#32 lore raw

Re: [PATCH] (big) real mode emulation - mov correction

Hi Avi,
The attached patch corrects the emulation of instruction:

    	mov
    	opcodes:  0x88 - 0x8b

Please apply.

Signature · 5 lines
Thanks & Regards,
Nitin
Open Source Technology Center, Intel Corporation
-----------------------------------------------------------------
The mind is like a parachute; it works much better when it's open

commit e976ee1c4f89211f971c704c28617dd6a3b84dc9

Author: Nitin A Kamble <[email protected]>
Date:   Thu Sep 13 19:59:00 2007 -0700

Correct behavior of instruction:
mov
opcodes: 0x88 - 0x8b

drivers/kvm/x86_emulate.c +5 -0
index 2e4c631..e3fb9ba 100644
@@ -1074,6 +1074,11 @@ push:
 		lock_prefix = 1;
 		break;
 	case 0x88 ... 0x8b:	/* mov */
+		if ((modrm_mod == 0x3) && (d & SrcMem)) {
+			d &= ~SrcMem;
+			d |= SrcReg;
+			goto modrm_done;
+		}
 		goto mov;
 	case 0x8f:		/* pop (sole member of Grp1a) */
 		/* 64-bit mode: POP always pops a 64-bit operand. */

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#34 lore raw

PATCH 1/1 (big) real mode emulation - lea

Hi Avi,
Attached is the patch to implement instruction:

	lea
	opcode:  0x8d

Please apply

Signature · 5 lines
Thanks & Regards,
Nitin
Open Source Technology Center, Intel Corporation
-----------------------------------------------------------------
The mind is like a parachute; it works much better when it's open

commit 7e19bcbeb8feebf9ee80c0948ca64c03729d7dda

Author: Nitin A Kamble <[email protected]>
Date:   Thu Sep 13 20:07:11 2007 -0700

Implement emulation of instruction:
lea r16/r32, m
opcode: 0x8d:

drivers/kvm/x86_emulate.c +4 -1
index e3fb9ba..2d2801f 100644
@@ -125,7 +125,7 @@ static u8 opcode_table[256] = {
 	/* 0x88 - 0x8F */
 	ByteOp | DstMem | SrcReg | ModRM | Mov, DstMem | SrcReg | ModRM | Mov,
 	ByteOp | DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
-	0, 0, 0, DstMem | SrcNone | ModRM | Mov,
+	0, ModRM | DstReg, 0, DstMem | SrcNone | ModRM | Mov,
 	/* 0x90 - 0x9F */
 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ImplicitOps, 0, 0, 0,
 	/* 0xA0 - 0xA7 */
@@ -1080,6 +1080,9 @@ push:
 			goto modrm_done;
 		}
 		goto mov;
+	case 0x8d: /* lea r16/r32, m */
+		dst.val = modrm_val;
+		break;
 	case 0x8f:		/* pop (sole member of Grp1a) */
 		/* 64-bit mode: POP always pops a 64-bit operand. */
 		if (mode == X86EMUL_MODE_PROT64)

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#36 lore raw

PATCH 1/1 (big) real mode emulation - mov imm

Hi Avi,
Attached is the patch to implement instruction:

	mov rl/rh/r, imm
	opcodes: 0xb0 - 0xbf

Please apply,

Signature · 5 lines
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Open Source Technology Center, Intel Corporation
-----------------------------------------------------------------
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commit 910f3167e57c224206a2ef5fe2cb248494724087

Author: Nitin A Kamble <[email protected]>
Date:   Thu Sep 13 20:18:51 2007 -0700

Implement emulation of instruction
mov rl/rh/r imm
opcodes: 0xb0 - 0xbf

drivers/kvm/x86_emulate.c +23 -2
index 2d2801f..c2540c3 100644
@@ -137,8 +137,12 @@ static u8 opcode_table[256] = {
 	0, 0, ByteOp | ImplicitOps | Mov, ImplicitOps | Mov,
 	ByteOp | ImplicitOps | Mov, ImplicitOps | Mov,
 	ByteOp | ImplicitOps, ImplicitOps,
-	/* 0xB0 - 0xBF */
-	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	/* 0xB0 - 0xB7 */
+	Mov | SrcImmByte, Mov | SrcImmByte, Mov | SrcImmByte, Mov | SrcImmByte,
+	Mov | SrcImmByte, Mov | SrcImmByte, Mov | SrcImmByte, Mov | SrcImmByte,
+	/* 0xB8 - 0xBF */
+	Mov | SrcImm, Mov | SrcImm, Mov | SrcImm, Mov | SrcImm,
+	Mov | SrcImm, Mov | SrcImm, Mov | SrcImm, Mov | SrcImm,
 	/* 0xC0 - 0xC7 */
 	ByteOp | DstMem | SrcImm | ModRM, DstMem | SrcImmByte | ModRM,
 	0, ImplicitOps, 0, 0,
@@ -1102,6 +1106,23 @@ push:
 		dst.val = (unsigned long)_regs[VCPU_REGS_RAX];
 		_eip += ad_bytes;	/* skip dst displacement */
 		break;
+	case 0xb0 ... 0xb3:	/* mov rl, imm8 */
+		dst.ptr = (unsigned long *)&_regs[VCPU_REGS_RAX + (b & 0x3)];
+		dst.val = src.val;
+		dst.type = OP_REG;
+		dst.bytes = 1;
+		break;
+	case 0xb4 ... 0xb7:	/* mov rh, imm8 */
+		dst.ptr = ((void *)&_regs[VCPU_REGS_RAX + (b & 0x3)] + 1);
+		dst.val = src.val;
+		dst.type = OP_REG;
+		dst.bytes = 1;
+		break;
+	case 0xb8 ... 0xbf:	/* mov r, imm */
+		dst.ptr = (unsigned long *)&_regs[VCPU_REGS_RAX + (b & 0x7)];
+		dst.val = src.val;
+		dst.type = OP_REG;
+		break;
 	case 0xc0 ... 0xc1:
 	      grp2:		/* Grp2 */
 		switch (modrm_reg) {

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#38 lore raw

Re: [PATCH] (big) real mode emulation - initialization fixes

Hi Avi,
Attached is the patch to initialize src.val & dst.val. Without this,
certain instructions are getting affected in their emulation.

Please apply.

Signature · 5 lines
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Nitin
Open Source Technology Center, Intel Corporation
-----------------------------------------------------------------
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commit 113fa85a2bc3f6f4b53c4f748f5b4b3144572595

Author: Nitin A Kamble <[email protected]>
Date:   Thu Sep 13 20:26:57 2007 -0700

Intialize src.val & dst.val, to fix bugs in certain instruction emulations.

drivers/kvm/x86_emulate.c +2 -0
index c2540c3..90ee392 100644
@@ -832,6 +832,7 @@ done_prefixes:
 	      srcmem_common:
 		src.type = OP_MEM;
 		src.ptr = (unsigned long *)cr2;
+		src.val = 0;
 		if ((rc = ops->read_emulated((unsigned long)src.ptr,
 					     &src.val, src.bytes, ctxt->vcpu)) != 0)
 			goto done;
@@ -896,6 +897,7 @@ done_prefixes:
 		dst.type = OP_MEM;
 		dst.ptr = (unsigned long *)cr2;
 		dst.bytes = (d & ByteOp) ? 1 : op_bytes;
+		dst.val = 0;
 		if (d & BitOp) {
 			unsigned long mask = ~(dst.bytes * 8 - 1);
 

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#40 lore raw

PATCH 1/1 (big) real mode emulation - popf

Hi Avi,
Attached is the patch to implement emulation of instruction:

	popf
	opcode: 0x9d

Please apply.

Signature · 5 lines
Thanks & Regards,
Nitin
Open Source Technology Center, Intel Corporation
-----------------------------------------------------------------
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commit 7bbe21004014731ac7f645de879a91b9160e6a1d

Author: Nitin A Kamble <[email protected]>
Date:   Thu Sep 13 20:45:34 2007 -0700

Implement emulation of instruction:
popf
opcode: 0x9d

drivers/kvm/x86_emulate.c +4 -1
index 90ee392..58e8394 100644
@@ -127,7 +127,7 @@ static u8 opcode_table[256] = {
 	ByteOp | DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
 	0, ModRM | DstReg, 0, DstMem | SrcNone | ModRM | Mov,
 	/* 0x90 - 0x9F */
-	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ImplicitOps, 0, 0, 0,
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ImplicitOps, ImplicitOps, 0, 0,
 	/* 0xA0 - 0xA7 */
 	ByteOp | DstReg | SrcMem | Mov, DstReg | SrcMem | Mov,
 	ByteOp | DstMem | SrcReg | Mov, DstMem | SrcReg | Mov,
@@ -1365,6 +1365,9 @@ pop_instruction:
 	case 0x9c: /* pushf */
 		src.val =  (unsigned long) _eflags;
 		goto push;
+	case 0x9d: /* popf */
+		dst.ptr = (unsigned long *) &_eflags;
+		goto pop_instruction;
 	case 0xc3: /* ret */
 		dst.ptr = &_eip;
 		goto pop_instruction;

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#42 lore raw

PATCH 1/1 (big) real mode emulation - jmp abs

Hi Avi,
Attached is the patch to implement instruction:

	jump absolute
	opcode: 0xff /4

Please apply.

Signature · 5 lines
Thanks & Regards,
Nitin
Open Source Technology Center, Intel Corporation
-----------------------------------------------------------------
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commit d67d775e429b32da323715f52f4ef4ce03a9031c

Author: Nitin A Kamble <[email protected]>
Date:   Fri Sep 14 14:25:23 2007 -0700

Implement emulation of instruction:
jump absolute r/m
opcode: 0xff /4

drivers/kvm/x86_emulate.c +6 -0
index 58e8394..ab7db47 100644
@@ -1229,6 +1229,12 @@ push:
 		case 1:	/* dec */
 			emulate_1op("dec", dst, _eflags);
 			break;
+		case 4: /* jmp abs */
+			if (b == 0xff)
+				_eip = dst.val;
+			else
+				goto cannot_emulate;
+			break;
 		case 6:	/* push */
 			/* 64-bit mode: PUSH always pushes a 64-bit operand. */
 			if (mode == X86EMUL_MODE_PROT64) {

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#44 lore raw

PATCH 1/1 (big) real mode emulation - inc reg

Hi Avi,
Attached is the patch to implement instructions:

	inc reg
	opcode: 0x40 - 0x47

Please apply.

Signature · 5 lines
Thanks & Regards,
Nitin
Open Source Technology Center, Intel Corporation
-----------------------------------------------------------------
The mind is like a parachute; it works much better when it's open

commit c47e7ccd17a9fe79e0f5e8b3198d6cd84e7c85ed

Author: Nitin A Kamble <[email protected]>
Date:   Fri Sep 14 14:47:42 2007 -0700

Implement emulation of instruction:
inc reg
opcode: 0x40 - 0x47

drivers/kvm/x86_emulate.c +21 -2
index ab7db47..f5a4f4a 100644
@@ -96,8 +96,11 @@ static u8 opcode_table[256] = {
 	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
 	ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
 	0, 0, 0, 0,
-	/* 0x40 - 0x4F */
-	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	/* 0x40 - 0x47 */
+	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
+	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
+	/* 0x48 - 0x4F */
+	0, 0, 0, 0, 0, 0, 0, 0,
 	/* 0x50 - 0x57 */
 	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
 	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
@@ -1390,6 +1393,22 @@ pop_instruction:
 		_eip = ctxt->vcpu->rip;
 	}
 	switch (b) {
+	case 0x40 ... 0x47:	/* inc reg */
+		dst.ptr = (unsigned long *)&_regs[b & 0x7];
+		dst.val = *dst.ptr;
+			switch (op_bytes) {
+			case 2:
+				*(u16 *)dst.ptr = (u16)dst.val + 1;
+				break;
+			case 4:
+				*dst.ptr = (u32)dst.val + 1;
+				break;	/* 64b: zero-ext */
+			case 8:
+				*dst.ptr = dst.val + 1;
+				break;
+			}
+		no_wb = 1; /* Disable writeback. */
+		break;
 	case 0xa4 ... 0xa5:	/* movs */
 		dst.type = OP_MEM;
 		dst.bytes = (d & ByteOp) ? 1 : op_bytes;

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#46 lore raw

PATCH 1/1 (big) real mode emulation - dec reg

Hi Avi,
Attached is the patch to implement emulation of instruction:

	dec reg
	opcodes: 0x48 - 0x4f

Please apply.

Signature · 5 lines
Thanks & Regards,
Nitin
Open Source Technology Center, Intel Corporation
-----------------------------------------------------------------
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commit ea06cdff59c8f9d74be2f6d7b7c4137a7c150a50

Author: Nitin A Kamble <[email protected]>
Date:   Fri Sep 14 14:55:33 2007 -0700

Implement emulation of instruction:
dec reg
opcode: 0x48 - 0x4f

drivers/kvm/x86_emulate.c +18 -1
index f5a4f4a..64909ff 100644
@@ -100,7 +100,8 @@ static u8 opcode_table[256] = {
 	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
 	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
 	/* 0x48 - 0x4F */
-	0, 0, 0, 0, 0, 0, 0, 0,
+	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
+	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
 	/* 0x50 - 0x57 */
 	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
 	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
@@ -1409,6 +1410,22 @@ pop_instruction:
 			}
 		no_wb = 1; /* Disable writeback. */
 		break;
+	case 0x48 ... 0x4f: /* dec r16/r32 */
+		dst.ptr = (unsigned long *)&_regs[b & 0x7];
+		dst.val = *dst.ptr;
+		switch (op_bytes) {
+		case 2:
+			*(u16 *)dst.ptr = (u16)dst.val - 1;
+			break;
+		case 4:
+			*dst.ptr = (u32)dst.val - 1;
+			break;	/* 64b: zero-ext */
+		case 8:
+			*dst.ptr = dst.val - 1;
+			break;
+		}
+		no_wb = 1; /* Disable writeback. */
+		break;
 	case 0xa4 ... 0xa5:	/* movs */
 		dst.type = OP_MEM;
 		dst.bytes = (d & ByteOp) ? 1 : op_bytes;

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#48 lore raw

PATCH 1/1 (big) real mode emulation - correct code placement

Hi Avi,
Some emulation case statements have gone to wrong place in the
upstream tree. This patch fixes that. This time I have created the patch using the git-format-patch command as per your suggestion.

Please apply.

Signature · 5 lines
Thanks & Regards,
Nitin
Open Source Technology Center, Intel Corporation
-----------------------------------------------------------------
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From 3d283270bd7ad2039dbce056ddc656e2b5d4e076 Mon Sep 17 00:00:00 2001
From: Nitin A Kamble <[email protected]>
Date: Tue, 18 Sep 2007 16:34:25 -0700
Subject: [PATCH] This code has gone to wrong place in the file. Moving it back to the right location.

---
 drivers/kvm/x86_emulate.c |   51 +++++++++++++++++++++++----------------------
 1 files changed, 26 insertions(+), 25 deletions(-)
drivers/kvm/x86_emulate.c +26 -25
index 3a1c712..7e20605 100644
@@ -1130,31 +1130,6 @@ push:
 	case 0xd2 ... 0xd3:	/* Grp2 */
 		c->src.val = c->regs[VCPU_REGS_RCX];
 		goto grp2;
-	case 0xe8: /* call (near) */ {
-		long int rel;
-		switch (c->op_bytes) {
-		case 2:
-			rel = insn_fetch(s16, 2, c->eip);
-			break;
-		case 4:
-			rel = insn_fetch(s32, 4, c->eip);
-			break;
-		case 8:
-			rel = insn_fetch(s64, 8, c->eip);
-			break;
-		default:
-			DPRINTF("Call: Invalid op_bytes\n");
-			goto cannot_emulate;
-		}
-		c->src.val = (unsigned long) c->eip;
-		JMP_REL(rel);
-		goto push;
-	}
-	case 0xe9: /* jmp rel */
-	case 0xeb: /* jmp rel short */
-		JMP_REL(c->src.val);
-		no_wb = 1; /* Disable writeback. */
-		break;
 	case 0xf6 ... 0xf7:	/* Grp3 */
 		switch (c->modrm_reg) {
 		case 0 ... 1:	/* test */
@@ -1434,6 +1409,32 @@ special_insn:
 	case 0xae ... 0xaf:	/* scas */
 		DPRINTF("Urk! I don't handle SCAS.\n");
 		goto cannot_emulate;
+	case 0xe8: /* call (near) */ {
+		long int rel;
+		switch (c->op_bytes) {
+		case 2:
+			rel = insn_fetch(s16, 2, c->eip);
+			break;
+		case 4:
+			rel = insn_fetch(s32, 4, c->eip);
+			break;
+		case 8:
+			rel = insn_fetch(s64, 8, c->eip);
+			break;
+		default:
+			DPRINTF("Call: Invalid op_bytes\n");
+			goto cannot_emulate;
+		}
+		c->src.val = (unsigned long) c->eip;
+		JMP_REL(rel);
+		goto push;
+	}
+	case 0xe9: /* jmp rel */
+	case 0xeb: /* jmp rel short */
+		JMP_REL(c->src.val);
+		no_wb = 1; /* Disable writeback. */
+		break;
+
 
 	}
 	goto writeback;
Signature · 1 line
1.5.2.2

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author Applied
#50 lore raw

Re: [PATCH] (big) real mode emulation - correct code placement

Quoted 3 lines · Nitin A Kamble

Hi Avi,
Some emulation case statements have gone to wrong place in the
upstream tree. This patch fixes that.

Applied, thanks.

Quoted 3 lines

This time I have created the patch
using the git-format-patch command as per your suggestion.

Much easier to apply. But now my mailer doesn't quote it...

Signature · 7 lines
error compiling committee.c: too many arguments to function


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author
#51 lore raw

Re: [PATCH] (big) real mode emulation - inc reg

In reply to a message not in the archive
Quoted 9 lines · Nitin A Kamble

Hi Avi,
Attached is the patch to implement instructions:

	inc reg
	opcode: 0x40 - 0x47

Please apply.

drivers/kvm/x86_emulate.c pop_instruction: · line 1400

Quoted 8 lines
drivers/kvm/x86_emulate.c +4 -0
@@ -1390,6 +1393,22 @@ pop_instruction:
 		_eip = ctxt->vcpu->rip;
 	}
 	switch (b) {
+	case 0x40 ... 0x47:	/* inc reg */
+		dst.ptr = (unsigned long *)&_regs[b & 0x7];
+		dst.val = *dst.ptr;
+			switch (op_bytes) {
 

Too much indentation here?

Quoted 14 lines
drivers/kvm/x86_emulate.c +12 -0
+			case 2:
+				*(u16 *)dst.ptr = (u16)dst.val + 1;
+				break;
+			case 4:
+				*dst.ptr = (u32)dst.val + 1;
+				break;	/* 64b: zero-ext */
+			case 8:
+				*dst.ptr = dst.val + 1;
+				break;
+			}
+		no_wb = 1; /* Disable writeback. */
+		break;
 	case 0xa4 ... 0xa5:	/* movs */
 		dst.type = OP_MEM;
Quoted 2 lines

dst.bytes = (d & ByteOp) ? 1 : op_bytes;

Why are we disabling writeback instead of using the regular writeback mechanism? Shouldn't just setting dst.val be sufficient?

Signature · 7 lines
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author Applied
#52 lore raw

Re: [PATCH] (big) real mode emulation - jmp abs

In reply to a message not in the archive
Quoted 5 lines · Nitin A Kamble

Hi Avi,
Attached is the patch to implement instruction:

	jump absolute
	opcode: 0xff /4

Applied, thanks.

Signature · 7 lines
Do not meddle in the internals of kernels, for they are subtle and quick to panic.


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author Applied
#53 lore raw

Re: [PATCH] (big) real mode emulation - popf

In reply to a message not in the archive
Quoted 6 lines · Nitin A Kamble

Hi Avi,
Attached is the patch to implement emulation of instruction:

	popf
	opcode: 0x9d

Applied, thanks.

Signature · 7 lines
Do not meddle in the internals of kernels, for they are subtle and quick to panic.


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author
#54 lore raw

Re: [PATCH] (big) real mode emulation - initialization fixes

In reply to a message not in the archive
Quoted 7 lines · Nitin A Kamble

Hi Avi,
Attached is the patch to initialize src.val & dst.val. Without this,
certain instructions are getting affected in their emulation.

Please apply.

This seems like it is papering over other bugs. Some instructions use src.val or dst.val without having decoded the src or dst operand.

Which instructions are these? Can we fix them instead?

Quoted 25 lines

Intialize src.val & dst.val, to fix bugs in certain instruction emulations.

drivers/kvm/x86_emulate.c +2 -0
index c2540c3..90ee392 100644
@@ -832,6 +832,7 @@ done_prefixes:
 	      srcmem_common:
 		src.type = OP_MEM;
 		src.ptr = (unsigned long *)cr2;
+		src.val = 0;
 		if ((rc = ops->read_emulated((unsigned long)src.ptr,
 					     &src.val, src.bytes, ctxt->vcpu)) != 0)
 			goto done;
@@ -896,6 +897,7 @@ done_prefixes:
 		dst.type = OP_MEM;
 		dst.ptr = (unsigned long *)cr2;
 		dst.bytes = (d & ByteOp) ? 1 : op_bytes;
+		dst.val = 0;
 		if (d & BitOp) {
 			unsigned long mask = ~(dst.bytes * 8 - 1);
 
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#56 lore raw

Re: [PATCH] (big) real mode emulation - initialization fixes

Quoted 4 lines · Avi Kivity

This seems like it is papering over other bugs. Some instructions use src.val or dst.val without having decoded the src or dst operand.

Which instructions are these? Can we fix them instead?

Instructions using 8bit operands such as al, ah are affected.
Especially utilizing signed operands. By not using this initialization these operands are getting wrong value from remaining stale bits.

Signature · 5 lines
Thanks & Regards,
Nitin
Open Source Technology Center, Intel Corporation
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author
#58 lore raw

Re: [PATCH] (big) real mode emulation - initialization fixes

Quoted 5 lines · Nitin A Kamble
Quoted 3 lines · Avi Kivity

This seems like it is papering over other bugs. Some instructions use src.val or dst.val without having decoded the src or dst operand.

Quoted 8 lines
Quoted 2 lines

Which instructions are these? Can we fix them instead?

Instructions using 8bit operands such as al, ah are affected.
Especially utilizing signed operands. By not using this initialization these operands are getting wrong value from remaining stale bits.

I see. SrcMem decode does ->read_emulated() into src.val, leaving stale bits. I agree your patch is the best way to fix it.

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author Applied
#59 lore raw

Re: [PATCH] (big) real mode emulation - initialization fixes

In reply to a message not in the archive
Quoted 4 lines · Nitin A Kamble

Hi Avi,
Attached is the patch to initialize src.val & dst.val. Without this,
certain instructions are getting affected in their emulation.

Applied, thanks.

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author
#60 lore raw

Re: [PATCH] (big) real mode emulation - mov imm

In reply to a message not in the archive
Quoted 12 lines · Nitin A Kamble

Hi Avi,
Attached is the patch to implement instruction:

	mov rl/rh/r, imm
	opcodes: 0xb0 - 0xbf
  
	case 0xb0 ... 0xb3:	/* mov rl, imm8 */
drivers/kvm/x86_emulate.c +6 -0
+		dst.ptr = (unsigned long *)&_regs[VCPU_REGS_RAX + (b & 0x3)];
+		dst.val = src.val;
+		dst.type = OP_REG;
+		dst.bytes = 1;
+		break;
+	case 0xb4 ... 0xb7:	/* mov rh, imm8 */

drivers/kvm/x86_emulate.c push: · line 1125

Quoted 10 lines
drivers/kvm/x86_emulate.c +10 -0
+		dst.ptr = ((void *)&_regs[VCPU_REGS_RAX + (b & 0x3)] + 1);
+		dst.val = src.val;
+		dst.type = OP_REG;
+		dst.bytes = 1;
+		break;
+	case 0xb8 ... 0xbf:	/* mov r, imm */
+		dst.ptr = (unsigned long *)&_regs[VCPU_REGS_RAX + (b & 0x7)];
+		dst.val = src.val;
+		dst.type = OP_REG;
+		break;

Can't the decoder select the dst reg?

Looks like duplicate work here.

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author Applied
#61 lore raw

Re: [PATCH] (big) real mode emulation - lea

In reply to a message not in the archive
Quoted 6 lines · Nitin A Kamble

Hi Avi,
Attached is the patch to implement instruction:

	lea
	opcode:  0x8d

Applied, thanks.

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author
#62 lore raw

Re: [PATCH] (big) real mode emulation - or instruction correction

In reply to a message not in the archive
Quoted 13 lines · Nitin A Kamble

Hi Avi,
This patch corrects the emulation of the instruction "or" for opcodes
0xc & 0cd.
Please Apply.

drivers/kvm/x86_emulate.c +7 -0
+	case 0x0c: 		/* or al imm8 */
+		dst.type = OP_REG;
+		dst.ptr = &_regs[VCPU_REGS_RAX];
+		dst.val = *(u8 *)dst.ptr;
+		dst.bytes = 1;
+		dst.orig_val = dst.val;
+		goto or;

drivers/kvm/x86_emulate.c done_prefixes: · line 936

Quoted 10 lines
drivers/kvm/x86_emulate.c +10 -0
+	case 0x0d:		/* or ax imm16, or eax imm32 */
+		dst.type = OP_REG;
+		dst.bytes = op_bytes;
+		dst.ptr = &_regs[VCPU_REGS_RAX];
+		if (op_bytes == 2)
+			dst.val = *(u16 *)dst.ptr;
+		else
+			dst.val = *(u32 *)dst.ptr;
+		dst.orig_val = dst.val;
+		goto or;

Instead of repeating this code for all instructions that use the accumulator implicitly, we should define a bit in the decoder flags (like DstAcc) so that all the code is consolidated in the decoder. This applies to 'sub imm' and 'cmp correction', and probably others as well.

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author Applied
#63 lore raw

Re: [PATCH] (big) real mode emulation - jump conditional relative

In reply to a message not in the archive
Quoted 7 lines · Nitin A Kamble

Hi Avi,
Attached is the patch to implement instruction:

	jump conditional relative (like: jnz jo etc)
	opcode : 0x0f80 - 0x0f8f

Please apply.

Applied this and jump conditional short, thanks.

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