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Support setting affinity for U3/U4 MSI sources

PATCH In review Olof Johansson 3 participants 3 messages Sep 17, 2007 – Sep 20, 2007 PowerPC

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#0 lore raw

PATCH 1/1 Support setting affinity for U3/U4 MSI sources

Hook up affinity-setting for U3/U4 MSI interrupt sources.

Tested on Quad G5 with myri10ge.

arch/powerpc/sysdev/mpic.c +1 -1
index 8de29f2..22600fd 100644
@@ -768,7 +768,7 @@ static void mpic_end_ipi(unsigned int irq)
 
 #endif /* CONFIG_SMP */
 
-static void mpic_set_affinity(unsigned int irq, cpumask_t cpumask)
+void mpic_set_affinity(unsigned int irq, cpumask_t cpumask)
 {
 	struct mpic *mpic = mpic_from_irq(irq);
 	unsigned int src = mpic_irq_to_hw(irq);
arch/powerpc/sysdev/mpic.h +1 -0
index 3a1c3d2..1cb6bd8 100644
@@ -34,5 +34,6 @@ extern int mpic_set_irq_type(unsigned int virq, unsigned int flow_type);
 extern void mpic_end_irq(unsigned int irq);
 extern void mpic_mask_irq(unsigned int irq);
 extern void mpic_unmask_irq(unsigned int irq);
+extern void mpic_set_affinity(unsigned int irq, cpumask_t cpumask);
 
 #endif /* _POWERPC_SYSDEV_MPIC_H */
arch/powerpc/sysdev/mpic_u3msi.c +1 -0
index 305b864..0fc4e96 100644
@@ -40,6 +40,7 @@ static struct irq_chip mpic_u3msi_chip = {
 	.unmask		= mpic_u3msi_unmask_irq,
 	.eoi		= mpic_end_irq,
 	.set_type	= mpic_set_irq_type,
+	.set_affinity	= mpic_set_affinity,
 	.typename	= "MPIC-U3MSI",
 };
 
Acked-by on v1 1/1
#1 lore raw
Quoted 6 lines · Olof Johansson

Hook up affinity-setting for U3/U4 MSI interrupt sources.

Tested on Quad G5 with myri10ge.

Quoted 41 lines
arch/powerpc/sysdev/mpic.c +1 -1
index 8de29f2..22600fd 100644
@@ -768,7 +768,7 @@ static void mpic_end_ipi(unsigned int irq)
 
 #endif /* CONFIG_SMP */
 
-static void mpic_set_affinity(unsigned int irq, cpumask_t cpumask)
+void mpic_set_affinity(unsigned int irq, cpumask_t cpumask)
 {
 	struct mpic *mpic = mpic_from_irq(irq);
 	unsigned int src = mpic_irq_to_hw(irq);
arch/powerpc/sysdev/mpic.h +1 -0
index 3a1c3d2..1cb6bd8 100644
@@ -34,5 +34,6 @@ extern int mpic_set_irq_type(unsigned int virq, unsigned int flow_type);
 extern void mpic_end_irq(unsigned int irq);
 extern void mpic_mask_irq(unsigned int irq);
 extern void mpic_unmask_irq(unsigned int irq);
+extern void mpic_set_affinity(unsigned int irq, cpumask_t cpumask);
 
 #endif /* _POWERPC_SYSDEV_MPIC_H */
arch/powerpc/sysdev/mpic_u3msi.c +1 -0
index 305b864..0fc4e96 100644
@@ -40,6 +40,7 @@ static struct irq_chip mpic_u3msi_chip = {
 	.unmask		= mpic_u3msi_unmask_irq,
 	.eoi		= mpic_end_irq,
 	.set_type	= mpic_set_irq_type,
+	.set_affinity	= mpic_set_affinity,
 	.typename	= "MPIC-U3MSI",
 };
 

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Acked-by on v1 1/1
#2 lore raw
In reply to Olof Johansson
Quoted 3 lines · Olof Johansson

Hook up affinity-setting for U3/U4 MSI interrupt sources.

Tested on Quad G5 with myri10ge.

And a JS21 blade:

# echo 1 > /proc/irq/21/smp_affinity 
# cat /proc/interrupts 
           CPU0       CPU1       
 21:        126        375  MPIC-U3MSI Edge      eth1
# ping -c 1000 -f cradle
1000 packets transmitted, 1000 received, 0% packet loss, time 135ms
# cat /proc/interrupts 
           CPU0       CPU1       
 21:       2153        375  MPIC-U3MSI Edge      eth1
# echo 2 > /proc/irq/21/smp_affinity 
# cat /proc/interrupts 
           CPU0       CPU1       
 21:       2174        379  MPIC-U3MSI Edge      eth1
# ping -c 1000 -f cradle
1000 packets transmitted, 1000 received, 0% packet loss, time 138ms
# cat /proc/interrupts 
           CPU0       CPU1       
 21:       2174       2389  MPIC-U3MSI Edge      eth1

cheers

Signature · 8 lines
Michael Ellerman
OzLabs, IBM Australia Development Lab

wwweb: http://michael.ellerman.id.au
phone: +61 2 6212 1183 (tie line 70 21183)

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we borrow it from our children. - S.M.A.R.T Person