8610: Add 8610 DIU display driver

PATCH New Jon Loeliger 1 participant 1 message Nov 2, 2007

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Jon Loeliger

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2007-11-02 21:24 UTC #0 lore raw

PATCH 1/1 8610: Add 8610 DIU display driver

From: York Sun <[email protected]>

1280x1024 and 1024x768 @ 32 bpp are supported now. DVI, Single-link LVDS, Double-link LVDS are all supported.

Environmental variable "monitor" is used to specify monitor port.

A new command "diufb" is introduced to reinitialize monitor and display a BMP file in the memory. So far, 1-bit, 4-bit, 8-bit and 24-bit BMP formats are supported.

diufb init
- initialize the diu driver
Enable the port specified in the environmental variable "monitor"

diufb addr
- display bmp file in memory.
The bmp image should be no bigger than the resolution, 1280x1024 for DVI and double-link LVDS, 1024x768 for single-link LVDS.

Note, this driver allocate memory but doesn't free it after use It is written on purpose -- to avoid a failure of reallocation due to memory fragement.

ECC of DDR is disabled for DIU performance. L2 data cache is also disabled.

Signed-off-by York Sun <[email protected]>

Signed-off-by Jon Loeliger <[email protected]>

---
 board/freescale/common/Makefile               |    4 +-
 board/freescale/common/fsl_diu_fb.c           |  656 +++++++++++++++++++++++++
 board/freescale/common/fsl_diu_fb.h           |   35 ++
 board/freescale/mpc8610hpcd/Makefile          |    4 +-
 board/freescale/mpc8610hpcd/mpc8610hpcd.c     |   45 ++-
 board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c |  105 ++++
 include/configs/MPC8610HPCD.h                 |   19 +-
 7 files changed, 858 insertions(+), 10 deletions(-)
 create mode 100644 board/freescale/common/fsl_diu_fb.c
 create mode 100644 board/freescale/common/fsl_diu_fb.h
 create mode 100644 board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c

board/freescale/common/Makefile +3 -1

index 44f613e..9cee9f1 100644
@@ -31,7 +31,9 @@ LIB	= $(obj)lib$(VENDOR).a
 
 COBJS	:= sys_eeprom.o	\
 	   pixis.o	\
-	   pq-mds-pib.o
+	   pq-mds-pib.o \
+	   fsl_logo_bmp.o \
+	   fsl_diu_fb.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))

board/freescale/common/fsl_diu_fb.c new file +656 -0

656 lines not on this page · raw message

board/freescale/common/fsl_diu_fb.h new file +35 -0

new file mode 100644
index 0000000..9ddd4c0
@@ -0,0 +1,35 @@
+/*
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ * York Sun <[email protected]>
+ *
+ * FSL DIU Framebuffer driver
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+extern int fsl_diu_init(int xres,
+			unsigned int pixel_format,
+			int gamma_fix,
+			unsigned char *splash_bmp);
+extern void fsl_diu_clear_screen(void);
+extern int fsl_diu_display_bmp(unsigned char *bmp,
+			       int xoffset,
+			       int yoffset,
+			       int transpar);

board/freescale/mpc8610hpcd/Makefile +3 -1

index 6f5a5c1..76087c1 100644
@@ -29,7 +29,9 @@ LIB	= $(obj)lib$(BOARD).a
 
 COBJS	:= $(BOARD).o \
 	../common/sys_eeprom.o \
-	../common/pixis.o
+	../common/pixis.o \
+	mpc8610hpcd_diu.o \
+	../common/fsl_diu_fb.o
 
 SOBJS	:= init.o

board/freescale/mpc8610hpcd/mpc8610hpcd.c +42 -3

63 lines not on this page · raw message

board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c new file +105 -0

105 lines not on this page · raw message

include/configs/MPC8610HPCD.h +14 -5

index 9fa42f3..00c94ef 100644
@@ -21,6 +21,7 @@
 #define CONFIG_NUM_CPUS		1	/* Number of CPUs in the system */
 #define CONFIG_LINUX_RESET_VEC	0x100	/* Reset vector used by Linux */
 
+#define CONFIG_FSL_DIU_FB	1	/* FSL DIU */
 #ifdef RUN_DIAG
 #define CFG_DIAG_ADDR		0xff800000
 #endif

@@ -38,7 +39,7 @@
 #define CONFIG_SPD_EEPROM		/* Use SPD for DDR */
 #undef CONFIG_DDR_DLL			/* possible DLL fix needed */
 #define CONFIG_DDR_2T_TIMING		/* Sets the 2T timing bit */
-#define CONFIG_DDR_ECC			/* only for ECC DDR module */
+#undef  CONFIG_DDR_ECC			/* only for ECC DDR module */
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER	/* DDR controller or DMA? */
 #define CONFIG_MEM_INIT_VALUE		0xDeadBeef
 #define CONFIG_NUM_DDR_CONTROLLERS	1

@@ -51,13 +52,14 @@
  */
 #define CFG_L2
 #define L2_INIT		0
-#define L2_ENABLE	(L2CR_L2E)
+#define L2_ENABLE	(L2CR_L2E |0x00100000 )
 
 #ifndef CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_CLK_FREQ	get_board_sys_clk(0)
 #endif
 
 #define CONFIG_BOARD_EARLY_INIT_F	1	/* Call board_pre_init */
+#define CONFIG_MISC_INIT_R		1
 
 #undef	CFG_DRAM_TEST			/* memory test, takes time */
 #define CFG_MEMTEST_START	0x00200000	/* memtest region */

@@ -159,6 +161,7 @@
 #define PIXIS_RST		0x4	/* PIXIS Reset Control register */
 #define PIXIS_AUX		0x6	/* PIXIS Auxiliary register; Scratch */
 #define PIXIS_SPD		0x7	/* Register for SYSCLK speed */
+#define PIXIS_BRDCFG0		0x8	/* PIXIS Board Configuration Register0*/
 #define PIXIS_VCTL		0x10	/* VELA Control Register */
 #define PIXIS_VCFGEN0		0x12	/* VELA Config Enable 0 */
 #define PIXIS_VCFGEN1		0x13	/* VELA Config Enable 1 */

@@ -208,7 +211,7 @@
 #define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET
 
 #define CFG_MONITOR_LEN		(512 * 1024)	/* Reserve 512 KB for Mon */
-#define CFG_MALLOC_LEN		(128 * 1024)	/* Reserved for malloc */
+#define CFG_MALLOC_LEN		(6 * 1024 * 1024)	/* Reserved for malloc */
 
 /* Serial Port */
 #define CONFIG_CONS_INDEX	1

@@ -474,6 +477,9 @@
 
 #undef CONFIG_WATCHDOG			/* watchdog disabled */
 
+/*DIU Configuration*/
+#define DIU_CONNECT_TO_DVI		/* DIU controller connects to DVI encoder*/
+
 /*
  * Miscellaneous configurable options
  */

@@ -621,7 +627,8 @@
  "diuregs=md e002c000 1d\0" \
  "dium=mw e002c01c\0" \
  "diuerr=md e002c014 1\0" \
- "othbootargs=debug\0" \
+ "othbootargs=diufb=15M video=fslfb:1280x1024-32 at 60,monitor=0 debug\0" \
+ "monitor=0-DVI\0" \
  "pmregs=md e00e1000 2b\0" \
  "lawregs=md e0000c08 4b\0" \
  "lbcregs=md e0005000 36\0" \

@@ -641,7 +648,9 @@
  "ramdiskfile=8610hpcd/ramdisk.uboot\0"                         \
  "dtbaddr=c00000\0"                                             \
  "dtbfile=8610hpcd/mpc8610_hpcd.dtb\0"                          \
- "bdev=sda3\0"
+ "bdev=sda3\0"							\
+ "othbootargs=diufb=15M video=fslfb:1280x1024-32 at 60,monitor=0\0"\
+ "monitor=0-DVI\0"
 #endif
 
 #define CONFIG_NFSBOOTCOMMAND					\

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