mpc85xx: Add support for SBC8548
PATCH 2/2 mpc85xx: Add support for SBC8548
Add support for Wind River's SBC8548 reference board.
Signed-off by: Joe Hamman <[email protected]>
board/sbc8548/u-boot.lds new file +149 -0
@@ -0,0 +1,149 @@ +/* + * Copyright 2004, 2007 Freescale Semiconductor. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + .resetvec 0xFFFFFFFC : + { + *(.resetvec) + } = 0xffff + + .bootpg 0xFFFFF000 : + { + cpu/mpc85xx/start.o (.bootpg) + board/sbc8548/init.o (.bootpg) + } = 0xffff + + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + cpu/mpc85xx/start.o (.text) + board/sbc8548/init.o (.text) + cpu/mpc85xx/traps.o (.text) + cpu/mpc85xx/interrupts.o (.text) + cpu/mpc85xx/cpu_init.o (.text) + cpu/mpc85xx/cpu.o (.text) + drivers/net/tsec.o (.text) + cpu/mpc85xx/speed.o (.text) + common/dlmalloc.o (.text) + lib_generic/crc32.o (.text) + lib_ppc/extable.o (.text) + lib_generic/zlib.o (.text) + *(.text) + *(.fixup) + *(.got1) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + *(.rodata.str1.4) + *(.eh_frame) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; + __fixup_entries = (. - _FIXUP_TABLE_) >> 2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + _end = . ; + PROVIDE (end = .); +}
doc/README.sbc8548 new file +27 -0
@@ -0,0 +1,27 @@ +Wind River SBC8548 reference board +=========================== + +Copyright 2007, Embedded Specialties, Inc. +Copyright 2007 Wind River Systemes, Inc. +----------------------------- + +1. Building U-Boot +------------------ +The SBC8548 code is known to build using ELDK 4.1. + + $ make sbc8548_config + Configuring for sbc8548 board... + + $ make + + +2. Switch and Jumper Settings +----------------------------- +All Jumpers & Switches are in their default positions. Please refer to +the board documentation for details. Some settings control CPU voltages +and settings may change with board revisions. + +3. Known limitations +-------------------- +PCI: + The code to support PCI is currently disabled and has not been verified.
include/configs/sbc8548.h new file +663 -0
663 lines not on this page · raw message
PATCH 2/2 mpc85xx: Add support for SBC8548
Quoted 103 lines
include/configs/sbc8548.h new file +3
-0+#if defined(CONFIG_PCIE1 ) +#define PCIE_ENV \ + "pciereg=md ${a}000 6; md ${a}020 4; md ${a}bf8 2; echo o;md ${a}c00 25;" \
(quoted diff) +1
-0+ "echo i; md ${a}da0 15; echo e;md ${a}e00 e; echo d; md ${a}f00 c\0" \
+ "pcieerr=md ${a}020 1; md ${a}e00 e; pci d.b $b.0 7 1; pci d.w $b. 0 1e 1;" \include/configs/sbc8548.h new file +3
-0+"pci d.w $b.0 56 1; pci d $b.0 104 1; pci d $b.0 110 1;" \ +"pci d $b.0 130 1\0" \ + "pcieerrc=mw ${a}020 ffffffff; mw ${a}e00 ffffffff; pci w.b $b.0 7ff;" \
(quoted diff) +1
-0+ "pci w.w $b.0 1e ffff; pci w.w $b.0 56 ffff; pci w $b.0 104ffffffff;"\
include/configs/sbc8548.h new file +13
-0+"pci w $b.0 110 ffffffff; pci w $b.0 130 ffffffff\0" \ +"pciecfg=pci d $b.0 0 20; pci d $b.0 100 e; pci d $b.0 400 69\0" \ +"pcie1regs=setenv a e000a; run pciereg\0" \ +"pcie1cfg=setenv b 3; run pciecfg\0" \ +"pcie1err=setenv a e000a; setenv b 3; run pcieerr\0" \ + "pcie1errc=setenv a e000a; setenv b 3; run pcieerrc\0" +#else +#define PCIE_ENV "" +#endif + +#if defined(CONFIG_PCI1 ) || defined(CONFIG_PCI2 ) +#define PCI_ENV \ + "pcireg=md ${a}000 3; echo o;md ${a}c00 25; echo i; md ${a}da015;" \
include/configs/sbc8548.h new file +32
-0+"echo e;md ${a}e00 9\0" \ +"pcierr=md ${a}e00 8; pci d.b $b.0 7 1;pci d.w $b.0 1e 1;" \ +"pci d.w $b.0 56 1\0" \ +"pcierrc=mw ${a}e00 ffffffff; mw ${a}e0c 0; pci w.b $b.0 7 ff;" \ + "pci w.w $b.0 1e ffff; pci w.w $b.0 56 ffff\0" +#else +#define PCI_ENV "" +#endif + +#if defined(CONFIG_PCI1 ) +#define PCI_ENV1 \ + "pci1regs=setenv a e0008; run pcireg\0" \ + "pci1err=setenv a e0008; setenv b 0; run pcierr\0" \ + "pci1errc=setenv a e0008; setenv b 0; run pcierrc\0" +#else +#define PCI_ENV1 "" +#endif + +#if defined(CONFIG_PCI2 ) +#define PCI_ENV2 \ + "pci2regs=setenv a e0009; run pcireg\0" \ + "pci2err=setenv a e0009; setenv b 123; run pcierr\0" \ + "pci2errc=setenv a e0009; setenv b 123; run pcierrc\0" +#else +#define PCI_ENV2 "" +#endif + +#if defined(CONFIG_TSEC_ENET ) +#define ENET_ENV \ + "enetreg1=md ${a}000 2; md ${a}010 9; md ${a}050 4; md ${a}08c 1;" \ + "md ${a}098 2\0" \ + "enetregt=echo t;md ${a}100 6; md ${a}140 2; md ${a}180 10; md ${a}200 10\0" \
+ "enetregr=echo r;md ${a}300 6; md ${a}330 5; md ${a}380 10; md $ {a}400 10\0" \
+ "enetregm=echo mac;md ${a}500 5; md ${a}520 28;echo fifo;md $ {a}a00 1;" \include/configs/sbc8548.h new file +27
-0+"echo mib;md ${a}680 31\0" \ +"enetreg=run enetreg1; run enetregm; run enetregt; run enetregr\0" \ +"enet1regs=setenv a e0024; run enetreg\0" \ +"enet2regs=setenv a e0025; run enetreg\0" \ +"enet3regs=setenv a e0026; run enetreg\0" \ + "enet4regs=setenv a e0027; run enetreg\0" +#else +#define ENET_ENV "" +#endif + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ + "tftpflash=tftpboot $loadaddr $uboot; " \ + "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "consoledev=ttyS0\0" \ + "ramdiskaddr=2000000\0" \ + "ramdiskfile=uRamdisk\0" \ + "fdtaddr=c00000\0" \ + "fdtfile=sbc8548.dtb\0" \ + "eoi=mw e00400b0 0\0" \ + "iack=md e00400a0 1\0" \ + "ddrreg=md ${a}000 8; md ${a}080 8;md ${a}100 d; md ${a}140 4; md ${a}bf0 4;" \
include/configs/sbc8548.h new file +8
-0+"md ${a}e00 3; md ${a}e20 3; md ${a}e40 7; md ${a}f00 5\0" \ +"ddrregs=setenv a e0002; run ddrreg\0" \ +"gureg=md ${a}000 2c; md ${a}0b0 1; md ${a}0c0 1; md ${a}b20 3;" \ +"md ${a}e00 1; md ${a}e60 1; md ${a}ef0 15\0" \ +"guregs=setenv a e00e0; run gureg\0" \ +"ecmreg=md ${a}000 1; md ${a}010 1; md ${a}bf8 2; md ${a}e00 6\0" \ +"ecmregs=setenv a e0001; run ecmreg\0" \ +"lawregs=md e0000c08 4b\0" \
include/configs/sbc8548.h line 641
Quoted 10 lines
include/configs/sbc8548.h new file +10
-0+"lbcregs=md e0005000 36\0" \ +"dma0regs=md e0021100 12\0" \ +"dma1regs=md e0021180 12\0" \ +"dma2regs=md e0021200 12\0" \ +"dma3regs=md e0021280 12\0" \ +PCIE_ENV \ +PCI_ENV \ +PCI_ENV1 \ +PCI_ENV2 \ +ENET_ENV
Do you really use any of the PCI, ENET, etc _ENV stuff? I've removed it and suggest it be done via an auto script.
- k
PATCH 2/2 mpc85xx: Add support for SBC8548
Quoted 117 lines
-----Original Message-----
From: Kumar Gala [mailto:galak at kernel.crashing.org]
Sent: Wednesday, December 12, 2007 10:22 PM
To: joe.hamman at embeddedspecialties.com
Cc: afleming at gmail.com; u-boot-users at lists.sourceforge.net
Subject: Re: [U-Boot-Users] [PATCH 2/2] mpc85xx: Add support for SBC8548Quoted 108 lines
include/configs/sbc8548.h new file +3
-0+#if defined(CONFIG_PCIE1 ) +#define PCIE_ENV \ + "pciereg=md ${a}000 6; md ${a}020 4; md ${a}bf8 2; echo o;md ${a}c00 25;" \
(quoted diff) +1
-0+ "echo i; md ${a}da0 15; echo e;md ${a}e00 e; echo d; md ${a}f00 c\0" \
+ "pcieerr=md ${a}020 1; md ${a}e00 e; pci d.b $b.0 7 1; pci d.w $b. 0 1e 1;" \include/configs/sbc8548.h new file +3
-0+"pci d.w $b.0 56 1; pci d $b.0 104 1; pci d $b.0 110 1;" \ +"pci d $b.0 130 1\0" \ + "pcieerrc=mw ${a}020 ffffffff; mw ${a}e00 ffffffff; pci w.b $b.0 7ff;" \
(quoted diff) +1
-0+ "pci w.w $b.0 1e ffff; pci w.w $b.0 56 ffff; pci w $b.0 104ffffffff;"\
include/configs/sbc8548.h new file +13
-0+"pci w $b.0 110 ffffffff; pci w $b.0 130 ffffffff\0" \ +"pciecfg=pci d $b.0 0 20; pci d $b.0 100 e; pci d $b.0 400 69\0" \ +"pcie1regs=setenv a e000a; run pciereg\0" \ +"pcie1cfg=setenv b 3; run pciecfg\0" \ +"pcie1err=setenv a e000a; setenv b 3; run pcieerr\0" \ + "pcie1errc=setenv a e000a; setenv b 3; run pcieerrc\0" +#else +#define PCIE_ENV "" +#endif + +#if defined(CONFIG_PCI1 ) || defined(CONFIG_PCI2 ) +#define PCI_ENV \ + "pcireg=md ${a}000 3; echo o;md ${a}c00 25; echo i; md ${a}da015;" \
include/configs/sbc8548.h new file +32
-0+"echo e;md ${a}e00 9\0" \ +"pcierr=md ${a}e00 8; pci d.b $b.0 7 1;pci d.w $b.0 1e 1;" \ +"pci d.w $b.0 56 1\0" \ +"pcierrc=mw ${a}e00 ffffffff; mw ${a}e0c 0; pci w.b $b.0 7 ff;" \ + "pci w.w $b.0 1e ffff; pci w.w $b.0 56 ffff\0" +#else +#define PCI_ENV "" +#endif + +#if defined(CONFIG_PCI1 ) +#define PCI_ENV1 \ + "pci1regs=setenv a e0008; run pcireg\0" \ + "pci1err=setenv a e0008; setenv b 0; run pcierr\0" \ + "pci1errc=setenv a e0008; setenv b 0; run pcierrc\0" +#else +#define PCI_ENV1 "" +#endif + +#if defined(CONFIG_PCI2 ) +#define PCI_ENV2 \ + "pci2regs=setenv a e0009; run pcireg\0" \ + "pci2err=setenv a e0009; setenv b 123; run pcierr\0" \ + "pci2errc=setenv a e0009; setenv b 123; run pcierrc\0" +#else +#define PCI_ENV2 "" +#endif + +#if defined(CONFIG_TSEC_ENET ) +#define ENET_ENV \ + "enetreg1=md ${a}000 2; md ${a}010 9; md ${a}050 4; md ${a}08c 1;" \ + "md ${a}098 2\0" \ + "enetregt=echo t;md ${a}100 6; md ${a}140 2; md ${a}180 10; md ${a}200 10\0" \
+ "enetregr=echo r;md ${a}300 6; md ${a}330 5; md ${a}380 10; md $ {a}400 10\0" \
+ "enetregm=echo mac;md ${a}500 5; md ${a}520 28;echo fifo;md $ {a}a00 1;" \include/configs/sbc8548.h new file +27
-0+"echo mib;md ${a}680 31\0" \ +"enetreg=run enetreg1; run enetregm; run enetregt; run enetregr\0" \ +"enet1regs=setenv a e0024; run enetreg\0" \ +"enet2regs=setenv a e0025; run enetreg\0" \ +"enet3regs=setenv a e0026; run enetreg\0" \ + "enet4regs=setenv a e0027; run enetreg\0" +#else +#define ENET_ENV "" +#endif + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ + "tftpflash=tftpboot $loadaddr $uboot; " \ + "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "consoledev=ttyS0\0" \ + "ramdiskaddr=2000000\0" \ + "ramdiskfile=uRamdisk\0" \ + "fdtaddr=c00000\0" \ + "fdtfile=sbc8548.dtb\0" \ + "eoi=mw e00400b0 0\0" \ + "iack=md e00400a0 1\0" \ + "ddrreg=md ${a}000 8; md ${a}080 8;md ${a}100 d; md ${a}140 4; md ${a}bf0 4;" \
include/configs/sbc8548.h new file +13
-0+"md ${a}e00 3; md ${a}e20 3; md ${a}e40 7; md ${a}f00 5\0" \ +"ddrregs=setenv a e0002; run ddrreg\0" \ +"gureg=md ${a}000 2c; md ${a}0b0 1; md ${a}0c0 1; md ${a}b20 3;" \ +"md ${a}e00 1; md ${a}e60 1; md ${a}ef0 15\0" \ +"guregs=setenv a e00e0; run gureg\0" \ +"ecmreg=md ${a}000 1; md ${a}010 1; md ${a}bf8 2; md ${a}e00 6\0" \ +"ecmregs=setenv a e0001; run ecmreg\0" \ +"lawregs=md e0000c08 4b\0" \ +"lbcregs=md e0005000 36\0" \ +"dma0regs=md e0021100 12\0" \ +"dma1regs=md e0021180 12\0" \ +"dma2regs=md e0021200 12\0" \ +"dma3regs=md e0021280 12\0" \
Quoted 8 lines
Quoted 5 lines
+
PCIE_ENV\
+PCI_ENV\
+PCI_ENV1\
+PCI_ENV2\
+ENET_ENVDo you really use any of the PCI, ENET, etc
_ENVstuff? I've removed it and suggest it be done via an auto script.
Removed.
Thanks for the comments!
Joe