mpc83xx: Add MPC837x PCIE controller RC mode initialize code
PATCH 1/1 mpc83xx: Add MPC837x PCIE controller RC mode initialize code
This patch is based on Dave Liu`s previously sent MPC837x patches.
Initial the MPC837x PCIE controller.
Note that configue address bit field is not compatible with PCIE spec 10a. So, the pci command output is not reliable.
Just map 16M pci configure space which corresponding to a bus configure space at once. If want to access bus number other than 0. Need to remap the pci configure window by hand.
Signed-off-by Tony Li <[email protected]>
--- Makefile | 19 ++- board/freescale/mpc837xemds/Makefile | 2 +- board/freescale/mpc837xemds/mpc837xemds.c | 3 + board/freescale/mpc837xemds/pci.c | 3 +- board/freescale/mpc837xemds/pcie.c | 95 ++++++++++ cpu/mpc83xx/Makefile | 2 +- cpu/mpc83xx/pcie.c | 277 +++++++++++++++++++++++++++++ doc/README.mpc837xemds | 6 + include/asm-ppc/immap_83xx.h | 119 ++++++++++++- include/configs/MPC837XEMDS.h | 23 +++- include/mpc83xx.h | 42 +++++ include/pci.h | 4 + 12 files changed, 583 insertions(+), 12 deletions(-) create mode 100644 board/freescale/mpc837xemds/pcie.c create mode 100644 cpu/mpc83xx/pcie.c
Makefile +17 -2
@@ -1831,13 +1831,28 @@ MPC8360EMDS_SLAVE_config: unconfig @$(MKCONFIG) -a MPC8360EMDS ppc mpc83xx mpc8360emds freescale MPC837XEMDS_config \ -MPC837XEMDS_HOST_config: unconfig +MPC837XEMDS_HOST_config \ +MPC837XEMDS_PCIE_config \ +MPC837XEMDS_PCIE_X2_config \ +MPC837XEMDS_HOST_PCIE_config \ +MPC837XEMDS_HOST_PCIE_X2_config: unconfig @mkdir -p $(obj)include @echo "" >$(obj)include/config.h ; \ if [ "$(findstring _HOST_,$@)" ] ; then \ echo -n "... PCI HOST " ; \ echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \ - fi ; + echo "#define CONFIG_PQ_MDS_PIB" >>$(obj)include/config.h ; \ + fi ; \ + if [ "$(findstring _PCIE_,$@)" ] ; then\ + echo -n "... PCIE "; \ + echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \ + echo "#define CONFIG_PCIE" >>$(obj)include/config.h ; \ + fi; \ + if [ "$(findstring _PCIE_X2_,$@)" ] ; then\ + echo -n "_X2 "; \ + echo "#define CONFIG_PCIE_X2" >>$(obj)include/config.h ; \ + fi; + @$(MKCONFIG) -a MPC837XEMDS ppc mpc83xx mpc837xemds freescale sbc8349_config: unconfig
board/freescale/mpc837xemds/Makefile +1 -1
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS := $(BOARD).o pci.o nand.o +COBJS := $(BOARD).o pci.o pcie.o nand.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS))
board/freescale/mpc837xemds/mpc837xemds.c +3 -0
@@ -48,6 +48,9 @@ int board_early_init_r(void)#ifdef CONFIG_PQ_MDS_PIB pib_init ();#endif +#ifdef CONFIG_PCIE +pcie_init_board (); +#endif return 0 ; }
board/freescale/mpc837xemds/pci.c +2 -1
@@ -59,7 +59,8 @@ void pci_init_board(void) pci_law[1 ].ar =LBLAWAR_EN |LBLAWAR_1MB ;udelay (2000 ); - +#if defined(CONFIG_PQ_MDS_PIB )mpc83xx_pci_init (1 , reg,0 ); +#endif }#endif /* CONFIG_PCI */
board/freescale/mpc837xemds/pcie.c new file +95 -0
95 lines not on this page · raw message
cpu/mpc83xx/Makefile +1 -1
@@ -29,7 +29,7 @@ LIB = $(obj)lib$(CPU).a START = start.o COBJS = traps.o cpu.o cpu_init.o speed.o interrupts.o \ - spd_sdram.o ecc.o qe_io.o pci.o + spd_sdram.o ecc.o qe_io.o pci.o pcie.o SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
cpu/mpc83xx/pcie.c new file +277 -0
277 lines not on this page · raw message
doc/README.mpc837xemds +6 -0
@@ -45,6 +45,12 @@ Freescale MPC837xEMDS Board 0x8000_0000 0x8fff_ffff PCI MEM prefetch 256M 0x9000_0000 0x9fff_ffff PCI MEM non-prefetch 256M 0xc000_0000 0xdfff_ffff Empty 512M + 0xa000_0000 0xafff_ffff PCI Express 1 Mem 256M + 0xb000_0000 0xb0ff_ffff PCI Express 1 Config 16M + 0xb100_0000 0xb17f_ffff PCI Express 1 IO 8M + 0xc000_0000 0xcfff_ffff PCI Express 2 Mem 256M + 0xd000_0000 0xd0ff_ffff PCI Express 2 Config 16M + 0xd100_0000 0xd17f_ffff PCI Express 2 IO 8M 0xe000_0000 0xe00f_ffff Int Mem Reg Space 1M 0xe010_0000 0xe02f_ffff Empty 2M 0xe030_0000 0xe03f_ffff PCI IO 1M
include/asm-ppc/immap_83xx.h +113 -6
142 lines not on this page · raw message
include/configs/MPC837XEMDS.h +22 -1
@@ -374,7 +374,7 @@#ifdef CONFIG_PCI #define CONFIG_83XX_GENERIC_PCI 1/* Use generic PCI setup */ -#define CONFIG_PQ_MDS_PIB 1/* PQ MDS Platform IO Board */ +#define CONFIG_83XX_GENERIC_PCIE 1/* Use generic PCIE setup*/ #define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
@@ -384,6 +384,27 @@#define CFG_PCI_SUBSYS_VENDORID 0x1957/* Freescale */ #endif /* CONFIG_PCI */ +/* PCIE address map */ +#define CFG_PCIE1_BASE 0xA0000000 +#define CFG_PCIE1_MEM_BASE CFG_PCIE1_BASE +#define CFG_PCIE1_MEM_PHYS CFG_PCIE1_MEM_BASE +#define CFG_PCIE1_MEM_SIZE 0x10000000 +#define CFG_PCIE1_CFG_BASE (CFG_PCIE1_MEM_BASE + CFG_PCIE1_MEM_SIZE) +#define CFG_PCIE1_CFG_SIZE 0x01000000 +#define CFG_PCIE1_IO_BASE 0x0 +#define CFG_PCIE1_IO_PHYS (CFG_PCIE1_CFG_BASE + CFG_PCIE1_CFG_SIZE) +#define CFG_PCIE1_IO_SIZE 0x00800000 + +#define CFG_PCIE2_BASE 0xC0000000 +#define CFG_PCIE2_MEM_BASE CFG_PCIE2_BASE +#define CFG_PCIE2_MEM_PHYS CFG_PCIE2_MEM_BASE +#define CFG_PCIE2_MEM_SIZE 0x10000000 +#define CFG_PCIE2_CFG_BASE (CFG_PCIE2_MEM_BASE + CFG_PCIE2_MEM_SIZE) +#define CFG_PCIE2_CFG_SIZE 0x01000000 +#define CFG_PCIE2_IO_BASE 0x0 +#define CFG_PCIE2_IO_PHYS (CFG_PCIE2_CFG_BASE + CFG_PCIE2_CFG_SIZE) +#define CFG_PCIE2_IO_SIZE 0x00800000 +#ifndef CONFIG_NET_MULTI #define CONFIG_NET_MULTI 1#endif
include/mpc83xx.h +42 -0
48 lines not on this page · raw message
include/pci.h +4 -0
@@ -374,6 +374,8 @@ extern void pci_cfgfunc_config_device(struct pci_controller* hose, pci_dev_t dev#define MAX_PCI_REGIONS 7 +#define INDIRECT_TYPE_NO_PCIE_LINK 1 +/* * Structure of a PCI controller (host bridge) */
@@ -386,6 +388,8 @@ struct pci_controller {volatile unsigned int *cfg_addr;volatile unsigned char *cfg_data; +int indirect_type; +struct pci_region regions[MAX_PCI_REGIONS ];int region_count;
Signature · 1 line
1.5.3