PATCH] ColdFire: Cleanup MCF532x header files

ColdFire: MCF532x header files cleanup

---
 include/asm-m68k/immap_5329.h |  193 +---------------------------
 include/asm-m68k/m5329.h      |  281
-----------------------------------------
 2 files changed, 6 insertions(+), 468 deletions(-)

m68k/immap_5329.h
index 271c276..b97f8f1 100644

Gather Address */
- u16 biter; /* 0x1C Beginning Minor Loop Link, Major Loop Count */
- u16 csr; /* 0x1E Control and Status */
-} tcd_st;
-
-typedef struct tcd_multiple {
- tcd_st tcd[16];
-} tcd_t;
-
/* Interrupt module registers */
typedef struct int0_ctrl {
/* Interrupt Controller 0 */
@@ -389,20 +282,6 @@ typedef struct intgack_ctrl1 {
u8 Lniack[7]; /* 0xE1 - 0xE7 Global Level 0 Interrupt Acknowledge */
} intgack_t;

-/*I2C module registers */
-typedef struct i2c_ctrl {
- u8 adr; /* 0x00 address register */
- u8 res1[3]; /* 0x01 - 0x03 */
- u8 fdr; /* 0x04 frequency divider register */
- u8 res2[3]; /* 0x05 - 0x07 */
- u8 cr; /* 0x08 control register */
- u8 res3[3]; /* 0x09 - 0x0B */
- u8 sr; /* 0x0C status register */
- u8 res4[3]; /* 0x0D - 0x0F */
- u8 dr; /* 0x10 data register */
- u8 res5[3]; /* 0x11 - 0x13 */
-} i2c_t;
-
/* QSPI module registers */
typedef struct qspi_ctrl {
u16 qmr; /* Mode register */
@@ -617,43 +496,6 @@ typedef struct gpio_ctrl {
u8 dscr_irq; /* 0x72 */
} gpio_t;

-/* LCD module registers */
-typedef struct lcd_ctrl {
- u32 ssar; /* 0x00 Screen Start Address Register */
- u32 sr; /* 0x04 LCD Size Register */
- u32 vpw; /* 0x08 Virtual Page Width Register */
- u32 cpr; /* 0x0C Cursor Position Register */
- u32 cwhb; /* 0x10 Cursor Width Height and Blink Register */
- u32 ccmr; /* 0x14 Color Cursor Mapping Register */
- u32 pcr; /* 0x18 Panel Configuration Register */
- u32 hcr; /* 0x1C Horizontal Configuration Register */
- u32 vcr; /* 0x20 Vertical Configuration Register */
- u32 por; /* 0x24 Panning Offset Register */
- u32 scr; /* 0x28 Sharp Configuration Register */
- u32 pccr; /* 0x2C PWM Contrast Control Register */
- u32 dcr; /* 0x30 DMA Control Register */
- u32 rmcr; /* 0x34 Refresh Mode Control Register */
- u32 icr; /* 0x38 Refresh Mode Control Register */
- u32 ier; /* 0x3C Interrupt Enable Register */
- u32 isr; /* 0x40 Interrupt Status Register */
- u32 res[4];
- u32 gwsar; /* 0x50 Graphic Window Start Address Register */
- u32 gwsr; /* 0x54 Graphic Window Size Register */
- u32 gwvpw; /* 0x58 Graphic Window Virtual Page Width Register */
- u32 gwpor; /* 0x5C Graphic Window Panning Offset Register */
- u32 gwpr; /* 0x60 Graphic Window Position Register */
- u32 gwcr; /* 0x64 Graphic Window Control Register */
- u32 gwdcr; /* 0x68 Graphic Window DMA Control Register */
-} lcd_t;
-
-typedef struct lcdbg_ctrl {
- u32 bglut[255];
-} lcdbg_t;
-
-typedef struct lcdgw_ctrl {
- u32 gwlut[255];
-} lcdgw_t;
-
/* USB OTG module registers */
typedef struct usb_otg {
u32 id; /* 0x000 Identification Register */
@@ -758,29 +600,6 @@ typedef struct sdram_ctrl {
u32 cs1; /* 0x114 Chip Select 1 Configuration */
} sdram_t;

-/* Synchronous serial interface */
-typedef struct ssi_ctrl {
- u32 tx0; /* 0x00 Transmit Data Register 0 */
- u32 tx1; /* 0x04 Transmit Data Register 1 */
- u32 rx0; /* 0x08 Receive Data Register 0 */
- u32 rx1; /* 0x0C Receive Data Register 1 */
- u32 cr; /* 0x10 Control Register */
- u32 isr; /* 0x14 Interrupt Status Register */
- u32 ier; /* 0x18 Interrupt Enable Register */
- u32 tcr; /* 0x1C Transmit Configuration Register */
- u32 rcr; /* 0x20 Receive Configuration Register */
- u32 ccr; /* 0x24 Clock Control Register */
- u32 res1; /* 0x28 */
- u32 fcsr; /* 0x2C FIFO Control/Status Register */
- u32 res2[2]; /* 0x30 - 0x37 */
- u32 acr; /* 0x38 AC97 Control Register */
- u32 acadd; /* 0x3C AC97 Command Address Register */
- u32 acdat; /* 0x40 AC97 Command Data Register */
- u32 atag; /* 0x44 AC97 Tag Register */
- u32 tmask; /* 0x48 Transmit Time Slot Mask Register */
- u32 rmask; /* 0x4C Receive Time Slot Mask Register */
-} ssi_t;
-
/* Clock Module registers */
typedef struct pll_ctrl {
u8 podr; /* 0x00 Output Divider Register */

1.5.2