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Rearranging things before sending patches to mainline

PATCH In review Tony Lindgren 1 participant 12 messages Mar 12, 2008 – Mar 13, 2008 1 message not in the archive

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A message that is not in the archive (sent off-list or not yet received): 34xx-2008-03-12

Tony Lindgren

author maintainer
#1 lore raw

cover Rearranging things before sending patches to mainline

Hi all,

Attached series moves things around a bit to make room for 34xx PM, renames some files to have consistent naming, and moves STI support from plat-omap to drivers/misc.

This is all to allow us to get arch/arm/*omap* stuff in sync with mainline. I'll be putting together a series of patches for Russell over next few days for post 2.6.25.

Regards,

Tony

author maintainer
#2 lore raw

PATCH 1/10 ARM: OMAP2: Fix _REGADDR macro offset calculations and cm.h for assembly

Make sure unexpected register offsets don't get calculated because of (unlikely) macro parameter calculations. Also fix cm.h so it can be included from assembly functions.

---
 arch/arm/mach-omap2/cm.h         |   21 +++++++++++++++------
 arch/arm/mach-omap2/prm.h        |    3 ++-
 arch/arm/mach-omap2/sdrc.h       |   16 ++++++++++------
 include/asm-arm/arch-omap/sdrc.h |    4 ----
 4 files changed, 27 insertions(+), 17 deletions(-)
arch/arm/mach-omap2/cm.h +15 -6
index 53cacc9..1a8f289 100644
@@ -14,12 +14,19 @@
  * published by the Free Software Foundation.
  */
 
-#include <linux/kernel.h>
-#include <asm/io.h>
 #include "prcm_common.h"
 
-
-#define OMAP_CM_REGADDR(module, reg)	 (void __iomem *)IO_ADDRESS(OMAP2_CM_BASE + module + reg)
+#ifndef __ASSEMBLER__
+#define OMAP_CM_REGADDR(module, reg)					\
+	(void __iomem *)IO_ADDRESS(OMAP2_CM_BASE + (module) + (reg))
+#else
+#define OMAP2420_CM_REGADDR(module, reg)				\
+			IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
+#define OMAP2430_CM_REGADDR(module, reg)				\
+			IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg))
+#define OMAP34XX_CM_REGADDR(module, reg)				\
+			IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg))
+#endif
 
 /*
  * Architecture-specific global CM registers
@@ -32,7 +39,7 @@
 
 #define OMAP3430_CM_CLKOUT_CTRL		OMAP_CM_REGADDR(OMAP3430_CCR_MOD, 0x0070)
 
-
+#ifndef __ASSEMBLER__
 /* Clock management global register get/set */
 
 static void __attribute__((unused)) cm_write_reg(u32 val, void __iomem *addr)
@@ -46,7 +53,7 @@ static u32 __attribute__((unused)) cm_read_reg(void __iomem *addr)
 {
 	return __raw_readl(addr);
 }
-
+#endif
 
 /*
  * Module specific CM registers from CM_BASE + domain offset
@@ -86,6 +93,7 @@ static u32 __attribute__((unused)) cm_read_reg(void __iomem *addr)
 
 /* Clock management domain register get/set */
 
+#ifndef __ASSEMBLER__
 static void __attribute__((unused)) cm_write_mod_reg(u32 val, s16 module, s16 idx)
 {
 	cm_write_reg(val, OMAP_CM_REGADDR(module, idx));
@@ -95,6 +103,7 @@ static u32 __attribute__((unused)) cm_read_mod_reg(s16 module, s16 idx)
 {
 	return cm_read_reg(OMAP_CM_REGADDR(module, idx));
 }
+#endif
 
 /* CM register bits shared between 24XX and 3430 */
 
arch/arm/mach-omap2/prm.h +2 -1
index e090ab4..fd8c81d 100644
@@ -19,7 +19,8 @@
 #include "prcm_common.h"
 
 
-#define OMAP_PRM_REGADDR(module, reg)	(void __iomem *)IO_ADDRESS(OMAP2_PRM_BASE + module + reg)
+#define OMAP_PRM_REGADDR(module, reg)					\
+	(void __iomem *)IO_ADDRESS(OMAP2_PRM_BASE + (module) + (reg))
 
 /*
  * Architecture-specific global PRM registers
arch/arm/mach-omap2/sdrc.h +10 -6
index dfc86f1..aa38621 100644
@@ -15,15 +15,16 @@
  */
 #undef DEBUG
 
-#include <linux/kernel.h>
 #include <asm/arch/sdrc.h>
 
+#ifndef __ASSEMBLER__
 extern unsigned long omap2_sdrc_base;
 extern unsigned long omap2_sms_base;
 
-#define OMAP_SDRC_REGADDR(reg)	(void __iomem *)IO_ADDRESS(omap2_sdrc_base + reg)
-#define OMAP_SMS_REGADDR(reg)	(void __iomem *)IO_ADDRESS(omap2_sms_base + reg)
-
+#define OMAP_SDRC_REGADDR(reg)						\
+		(void __iomem *)IO_ADDRESS(omap2_sdrc_base + (reg))
+#define OMAP_SMS_REGADDR(reg)						\
+		(void __iomem *)IO_ADDRESS(omap2_sms_base + (reg))
 
 /* SDRC global register get/set */
 
@@ -54,7 +55,10 @@ static u32 __attribute__((unused)) sms_read_reg(u16 reg)
 {
 	return __raw_readl(OMAP_SMS_REGADDR(reg));
 }
-
-
+#else
+#define OMAP242X_SDRC_REGADDR(reg)	IO_ADDRESS(OMAP242X_SDRC_BASE + (reg))
+#define OMAP243X_SDRC_REGADDR(reg)	IO_ADDRESS(OMAP243X_SDRC_BASE + (reg))
+#define OMAP34XX_SDRC_REGADDR(reg)	IO_ADDRESS(OMAP343X_SDRC_BASE + (reg))
+#endif	/* __ASSEMBLER__ */
 
 #endif
include/asm-arm/arch-omap/sdrc.h +0 -4
index 8f74097..673b396 100644
@@ -16,10 +16,6 @@
 
 #include <asm/arch/io.h>
 
-#define OMAP242X_SDRC_REGADDR(reg)	(void __iomem *)IO_ADDRESS(OMAP242X_SDRC_BASE + reg)
-#define OMAP243X_SDRC_REGADDR(reg)	(void __iomem *)IO_ADDRESS(OMAP243X_SDRC_BASE + reg)
-#define OMAP343X_SDRC_REGADDR(reg)	(void __iomem *)IO_ADDRESS(OMAP343X_SDRC_BASE + reg)
-
 /* SDRC register offsets - read/write with sdrc_{read,write}_reg() */
 
 #define SDRC_SYSCONFIG		0x010
Signature · 1 line
1.5.3.6
author maintainer
#3 lore raw

PATCH 2/10 ARM: OMAP2: Move sram-fn.S to sram24xx.S

This is to make room for sram34xx.S

---
 arch/arm/mach-omap2/Makefile   |    5 +-
 arch/arm/mach-omap2/sram-fn.S  |  337 ----------------------------------------
 arch/arm/mach-omap2/sram24xx.S |  337 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 341 insertions(+), 338 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/sram-fn.S
 create mode 100644 arch/arm/mach-omap2/sram24xx.S
arch/arm/mach-omap2/Makefile +4 -1
index 842f9fb..5157ff2 100644
@@ -3,9 +3,12 @@
 #
 
 # Common support
-obj-y := irq.o id.o io.o sram-fn.o memory.o control.o prcm.o clock.o mux.o \
+obj-y := irq.o id.o io.o memory.o control.o prcm.o clock.o mux.o \
 		devices.o serial.o gpmc.o timer-gp.o
 
+# Functions loaded to SRAM
+obj-$(CONFIG_ARCH_OMAP2)		+= sram24xx.o
+
 # Power Management
 obj-$(CONFIG_PM) += pm.o sleep.o
 
arch/arm/mach-omap2/sram-fn.S deleted +0 -337

337 lines not on this page · raw message

arch/arm/mach-omap2/sram24xx.S new file +337 -0

337 lines not on this page · raw message

Signature · 1 line
1.5.3.6
author maintainer
#4 lore raw

PATCH 3/10 ARM: OMAP2: Rename 24xx specific SRAM functions

This is needed to make room for 34xx specific SRAM functions.

---
 arch/arm/mach-omap2/sram24xx.S   |  112 +++++++++++++++++++-------------------
 arch/arm/plat-omap/sram.c        |  102 +++++++++++++++++++---------------
 include/asm-arm/arch-omap/sram.h |   20 ++++---
 3 files changed, 124 insertions(+), 110 deletions(-)
arch/arm/mach-omap2/sram24xx.S +56 -56
index ba1e005..5f1a305 100644
@@ -30,14 +30,14 @@
 
 	.text
 
-ENTRY(sram_ddr_init)
+ENTRY(omap24xx_sram_ddr_init)
 	stmfd	sp!, {r0 - r12, lr}	@ save registers on stack
 
 	mov	r12, r2			@ capture CS1 vs CS0
 	mov	r8, r3			@ capture force parameter
 
 	/* frequency shift down */
-	ldr	r2, omap2_sdi_cm_clksel2_pll	@ get address of dpllout reg
+	ldr	r2, omap24xx_sdi_cm_clksel2_pll	@ get address of dpllout reg
 	mov	r3, #0x1		@ value for 1x operation
 	str	r3, [r2]		@ go to L1-freq operation
 
@@ -46,7 +46,7 @@ ENTRY(sram_ddr_init)
 	bl voltage_shift		@ go drop voltage
 
 	/* dll lock mode */
-	ldr	r11, omap2_sdi_sdrc_dlla_ctrl	@ addr of dlla ctrl
+	ldr	r11, omap24xx_sdi_sdrc_dlla_ctrl	@ addr of dlla ctrl
 	ldr	r10, [r11]		@ get current val
 	cmp	r12, #0x1		@ cs1 base (2422 es2.05/1)
 	addeq	r11, r11, #0x8		@ if cs1 base, move to DLLB
@@ -97,7 +97,7 @@ i_dll_delay:
 	 * wait for it to finish, use 32k sync counter, 1tick=31uS.
 	 */
 voltage_shift:
-	ldr	r4, omap2_sdi_prcm_voltctrl	@ get addr of volt ctrl.
+	ldr	r4, omap24xx_sdi_prcm_voltctrl	@ get addr of volt ctrl.
 	ldr	r5, [r4]		@ get value.
 	ldr	r6, prcm_mask_val	@ get value of mask
 	and	r5, r5, r6		@ apply mask to clear bits
@@ -107,7 +107,7 @@ voltage_shift:
 	orr	r5, r5, r3		@ build value for force
 	str	r5, [r4]		@ Force transition to L1
 
-	ldr	r3, omap2_sdi_timer_32ksynct_cr	@ get addr of counter
+	ldr	r3, omap24xx_sdi_timer_32ksynct_cr	@ get addr of counter
 	ldr	r5, [r3]		@ get value
 	add	r5, r5, #0x3		@ give it at most 93uS
 volt_delay:
@@ -117,36 +117,36 @@ volt_delay:
 	mov	pc, lr			@ back to caller.
 
 /* relative load constants */
-	.globl omap2_sdi_cm_clksel2_pll
-	.globl omap2_sdi_sdrc_dlla_ctrl
-	.globl omap2_sdi_prcm_voltctrl
-	.globl omap2_sdi_timer_32ksynct_cr
+	.globl omap24xx_sdi_cm_clksel2_pll
+	.globl omap24xx_sdi_sdrc_dlla_ctrl
+	.globl omap24xx_sdi_prcm_voltctrl
+	.globl omap24xx_sdi_timer_32ksynct_cr
 
-omap2_sdi_cm_clksel2_pll:
+omap24xx_sdi_cm_clksel2_pll:
 	.word SRAM_VA_MAGIC
-omap2_sdi_sdrc_dlla_ctrl:
+omap24xx_sdi_sdrc_dlla_ctrl:
 	.word SRAM_VA_MAGIC
-omap2_sdi_prcm_voltctrl:
+omap24xx_sdi_prcm_voltctrl:
 	.word SRAM_VA_MAGIC
 prcm_mask_val:
 	.word 0xFFFF3FFC
-omap2_sdi_timer_32ksynct_cr:
+omap24xx_sdi_timer_32ksynct_cr:
 	.word SRAM_VA_MAGIC
-ENTRY(sram_ddr_init_sz)
-	.word	. - sram_ddr_init
+ENTRY(omap24xx_sram_ddr_init_sz)
+	.word	. - omap24xx_sram_ddr_init
 
 /*
  * Reprograms memory timings.
  * r0 = [PRCM_FULL | PRCM_HALF] r1 = SDRC_DLLA_CTRL value r2 = [DDR | SDR]
  * PRCM_FULL = 2, PRCM_HALF = 1, DDR = 1, SDR = 0
  */
-ENTRY(sram_reprogram_sdrc)
+ENTRY(omap24xx_sram_reprogram_sdrc)
 	stmfd	sp!, {r0 - r10, lr}	@ save registers on stack
 	mov	r3, #0x0		@ clear for mrc call
 	mcr	p15, 0, r3, c7, c10, 4	@ memory barrier, finish ARM SDR/DDR
 	nop
 	nop
-	ldr	r6, omap2_srs_sdrc_rfr_ctrl	@ get addr of refresh reg
+	ldr	r6, omap24xx_srs_sdrc_rfr_ctrl	@ get addr of refresh reg
 	ldr	r5, [r6]		@ get value
 	mov	r5, r5, lsr #8		@ isolate rfr field and drop burst
 
@@ -160,7 +160,7 @@ ENTRY(sram_reprogram_sdrc)
 	movne	r5, r5, lsl #1		@ mult by 2 if to full
 	mov	r5, r5, lsl #8		@ put rfr field back into place
 	add	r5, r5, #0x1		@ turn on burst of 1
-	ldr	r4, omap2_srs_cm_clksel2_pll	@ get address of out reg
+	ldr	r4, omap24xx_srs_cm_clksel2_pll	@ get address of out reg
 	ldr	r3, [r4]		@ get curr value
 	orr	r3, r3, #0x3
 	bic	r3, r3, #0x3		@ clear lower bits
@@ -181,7 +181,7 @@ ENTRY(sram_reprogram_sdrc)
 	bne	freq_out		@ leave if SDR, no DLL function
 
 	/* With DDR, we need to take care of the DLL for the frequency change */
-	ldr	r2, omap2_srs_sdrc_dlla_ctrl	@ addr of dlla ctrl
+	ldr	r2, omap24xx_srs_sdrc_dlla_ctrl	@ addr of dlla ctrl
 	str	r1, [r2]		@ write out new SDRC_DLLA_CTRL
 	add	r2, r2, #0x8		@ addr to SDRC_DLLB_CTRL
 	str	r1, [r2]		@ commit to SDRC_DLLB_CTRL
@@ -197,7 +197,7 @@ freq_out:
      *	wait for it to finish, use 32k sync counter, 1tick=31uS.
      */
 voltage_shift_c:
-	ldr	r10, omap2_srs_prcm_voltctrl	@ get addr of volt ctrl
+	ldr	r10, omap24xx_srs_prcm_voltctrl	@ get addr of volt ctrl
 	ldr	r8, [r10]		@ get value
 	ldr	r7, ddr_prcm_mask_val	@ get value of mask
 	and	r8, r8, r7		@ apply mask to clear bits
@@ -207,7 +207,7 @@ voltage_shift_c:
 	orr	r8, r8, r7		@ build value for force
 	str	r8, [r10]		@ Force transition to L1
 
-	ldr	r10, omap2_srs_timer_32ksynct	@ get addr of counter
+	ldr	r10, omap24xx_srs_timer_32ksynct	@ get addr of counter
 	ldr	r8, [r10]		@ get value
 	add	r8, r8, #0x2		@ give it at most 62uS (min 31+)
 volt_delay_c:
@@ -216,45 +216,45 @@ volt_delay_c:
 	bhi	volt_delay_c		@ not yet->branch
 	mov	pc, lr			@ back to caller
 
-	.globl omap2_srs_cm_clksel2_pll
-	.globl omap2_srs_sdrc_dlla_ctrl
-	.globl omap2_srs_sdrc_rfr_ctrl
-	.globl omap2_srs_prcm_voltctrl
-	.globl omap2_srs_timer_32ksynct
+	.globl omap24xx_srs_cm_clksel2_pll
+	.globl omap24xx_srs_sdrc_dlla_ctrl
+	.globl omap24xx_srs_sdrc_rfr_ctrl
+	.globl omap24xx_srs_prcm_voltctrl
+	.globl omap24xx_srs_timer_32ksynct
 
-omap2_srs_cm_clksel2_pll:
+omap24xx_srs_cm_clksel2_pll:
 	.word SRAM_VA_MAGIC
-omap2_srs_sdrc_dlla_ctrl:
+omap24xx_srs_sdrc_dlla_ctrl:
 	.word SRAM_VA_MAGIC
-omap2_srs_sdrc_rfr_ctrl:
+omap24xx_srs_sdrc_rfr_ctrl:
 	.word SRAM_VA_MAGIC
-omap2_srs_prcm_voltctrl:
+omap24xx_srs_prcm_voltctrl:
 	.word SRAM_VA_MAGIC
 ddr_prcm_mask_val:
 	.word 0xFFFF3FFC
-omap2_srs_timer_32ksynct:
+omap24xx_srs_timer_32ksynct:
 	.word SRAM_VA_MAGIC
 
-ENTRY(sram_reprogram_sdrc_sz)
-	.word	. - sram_reprogram_sdrc
+ENTRY(omap24xx_sram_reprogram_sdrc_sz)
+	.word	. - omap24xx_sram_reprogram_sdrc
 
 /*
  * Set dividers and pll. Also recalculate DLL value for DDR and unlock mode.
  */
-ENTRY(sram_set_prcm)
+ENTRY(omap24xx_sram_set_prcm)
 	stmfd	sp!, {r0-r12, lr}	@ regs to stack
 	adr	r4, pbegin		@ addr of preload start
 	adr	r8, pend		@ addr of preload end
 	mcrr	p15, 1, r8, r4, c12	@ preload into icache
 pbegin:
 	/* move into fast relock bypass */
-	ldr	r8, omap2_ssp_pll_ctl	@ get addr
+	ldr	r8, omap24xx_ssp_pll_ctl	@ get addr
 	ldr	r5, [r8]		@ get val
 	mvn	r6, #0x3		@ clear mask
 	and	r5, r5, r6		@ clear field
 	orr	r7, r5, #0x2		@ fast relock val
 	str	r7, [r8]		@ go to fast relock
-	ldr	r4, omap2_ssp_pll_stat	@ addr of stat
+	ldr	r4, omap24xx_ssp_pll_stat	@ addr of stat
 block:
 	/* wait for bypass */
 	ldr	r8, [r4]		@ stat value
@@ -263,10 +263,10 @@ block:
 	bne	block			@ loop if not
 
 	/* set new dpll dividers _after_ in bypass */
-	ldr	r4, omap2_ssp_pll_div	@ get addr
+	ldr	r4, omap24xx_ssp_pll_div	@ get addr
 	str	r0, [r4]		@ set dpll ctrl val
 
-	ldr	r4, omap2_ssp_set_config	@ get addr
+	ldr	r4, omap24xx_ssp_set_config	@ get addr
 	mov	r8, #1			@ valid cfg msk
 	str	r8, [r4]		@ make dividers take
 
@@ -280,8 +280,8 @@ wait_a_bit:
 	beq	pend			@ jump over dpll relock
 
 	/* relock DPLL with new vals */
-	ldr	r5, omap2_ssp_pll_stat	@ get addr
-	ldr	r4, omap2_ssp_pll_ctl	@ get addr
+	ldr	r5, omap24xx_ssp_pll_stat	@ get addr
+	ldr	r4, omap24xx_ssp_pll_ctl	@ get addr
 	orr	r8, r7, #0x3		@ val for lock dpll
 	str	r8, [r4]		@ set val
 	mov	r0, #1000		@ dead spin a bit
@@ -295,9 +295,9 @@ wait_lock:
 	bne	wait_lock		@ wait if not
 pend:
 	/* update memory timings & briefly lock dll */
-	ldr	r4, omap2_ssp_sdrc_rfr	@ get addr
+	ldr	r4, omap24xx_ssp_sdrc_rfr	@ get addr
 	str	r1, [r4]		@ update refresh timing
-	ldr	r11, omap2_ssp_dlla_ctrl	@ get addr of DLLA ctrl
+	ldr	r11, omap24xx_ssp_dlla_ctrl	@ get addr of DLLA ctrl
 	ldr	r10, [r11]		@ get current val
 	mvn	r9, #0x4		@ mask to get clear bit2
 	and	r10, r10, r9		@ clear bit2 for lock mode
@@ -313,25 +313,25 @@ wait_dll_lock:
 	nop
 	ldmfd	sp!, {r0-r12, pc}	@ restore regs and return
 
-	.globl omap2_ssp_set_config
-	.globl omap2_ssp_pll_ctl
-	.globl omap2_ssp_pll_stat
-	.globl omap2_ssp_pll_div
-	.globl omap2_ssp_sdrc_rfr
-	.globl omap2_ssp_dlla_ctrl
+	.globl omap24xx_ssp_set_config
+	.globl omap24xx_ssp_pll_ctl
+	.globl omap24xx_ssp_pll_stat
+	.globl omap24xx_ssp_pll_div
+	.globl omap24xx_ssp_sdrc_rfr
+	.globl omap24xx_ssp_dlla_ctrl
 
-omap2_ssp_set_config:
+omap24xx_ssp_set_config:
 	.word SRAM_VA_MAGIC
-omap2_ssp_pll_ctl:
+omap24xx_ssp_pll_ctl:
 	.word SRAM_VA_MAGIC
-omap2_ssp_pll_stat:
+omap24xx_ssp_pll_stat:
 	.word SRAM_VA_MAGIC
-omap2_ssp_pll_div:
+omap24xx_ssp_pll_div:
 	.word SRAM_VA_MAGIC
-omap2_ssp_sdrc_rfr:
+omap24xx_ssp_sdrc_rfr:
 	.word SRAM_VA_MAGIC
-omap2_ssp_dlla_ctrl:
+omap24xx_ssp_dlla_ctrl:
 	.word SRAM_VA_MAGIC
 
-ENTRY(sram_set_prcm_sz)
-	.word	. - sram_set_prcm
+ENTRY(omap24xx_sram_set_prcm_sz)
+	.word	. - omap24xx_sram_set_prcm
arch/arm/plat-omap/sram.c +57 -45

173 lines not on this page · raw message

include/asm-arm/arch-omap/sram.h +11 -9
index 5bfbe37..2b7f103 100644
@@ -24,17 +24,19 @@ extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
 extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
 
 /* Do not use these */
-extern void sram_reprogram_clock(u32 ckctl, u32 dpllctl);
-extern unsigned long sram_reprogram_clock_sz;
+extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
+extern unsigned long omap24xx_sram_reprogram_clock_sz;
 
-extern void sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
-			  u32 base_cs, u32 force_unlock);
-extern unsigned long sram_ddr_init_sz;
+extern void omap24xx_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
+						u32 base_cs, u32 force_unlock);
+extern unsigned long omap24xx_sram_ddr_init_sz;
 
-extern u32 sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
-extern unsigned long sram_set_prcm_sz;
+extern u32 omap24xx_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
+						int bypass);
+extern unsigned long omap24xx_sram_set_prcm_sz;
 
-extern void sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type);
-extern unsigned long sram_reprogram_sdrc_sz;
+extern void omap24xx_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
+						u32 mem_type);
+extern unsigned long omap24xx_sram_reprogram_sdrc_sz;
 
 #endif
Signature · 1 line
1.5.3.6
author maintainer
#5 lore raw

PATCH 4/10 ARM: OMAP3: Add SRAM support for 3430

From: Dasu, Karthik P <[email protected]>

Add SRAM support for 3430

Patch modified by Tony to leave out new functions, they will be added later in a separate patch.

---
 arch/arm/plat-omap/sram.c |   56 +++++++++++++++++++++++++++++++++++++-------
 1 files changed, 47 insertions(+), 9 deletions(-)
arch/arm/plat-omap/sram.c +47 -9
index 6b1ce47..1186d2b 100644
@@ -39,6 +39,10 @@
 #define OMAP2_SRAM_PUB_PA	0x4020f800
 #define OMAP2_SRAM_VA		VMALLOC_END
 #define OMAP2_SRAM_PUB_VA	(VMALLOC_END + 0x800)
+#define OMAP3_SRAM_PA           0x40200000
+#define OMAP3_SRAM_VA           0xd7000000
+#define OMAP3_SRAM_PUB_PA       0x40208000
+#define OMAP3_SRAM_PUB_VA       0xd7008000
 
 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
 #define SRAM_BOOTLOADER_SZ	0x00
@@ -49,6 +53,14 @@
 #define OMAP24XX_VA_REQINFOPERM0	IO_ADDRESS(0x68005048)
 #define OMAP24XX_VA_READPERM0		IO_ADDRESS(0x68005050)
 #define OMAP24XX_VA_WRITEPERM0		IO_ADDRESS(0x68005058)
+
+#define OMAP34XX_VA_REQINFOPERM0	IO_ADDRESS(0x68012848)
+#define OMAP34XX_VA_READPERM0		IO_ADDRESS(0x68012850)
+#define OMAP34XX_VA_WRITEPERM0		IO_ADDRESS(0x68012858)
+#define OMAP34XX_VA_ADDR_MATCH2		IO_ADDRESS(0x68012880)
+#define OMAP34XX_VA_SMS_RG_ATT0		IO_ADDRESS(0x6C000048)
+#define OMAP34XX_VA_CONTROL_STAT	IO_ADDRESS(0x480022F0)
+
 #define GP_DEVICE		0x300
 
 #define ROUND_DOWN(value,boundary)	((value) & (~((boundary)-1)))
@@ -102,6 +114,13 @@ static int is_sram_locked(void)
 			__raw_writel(0xCFDE, OMAP24XX_VA_READPERM0);  /* all i-read */
 			__raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
 		}
+		if (cpu_is_omap34xx()) {
+			__raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
+			__raw_writel(0xFFFF, OMAP34XX_VA_READPERM0);  /* all i-read */
+			__raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
+			__raw_writel(0x0, OMAP34XX_VA_ADDR_MATCH2);
+			__raw_writel(0xFFFFFFFF, OMAP34XX_VA_SMS_RG_ATT0);
+		}
 		return 0;
 	} else
 		return 1; /* assume locked with no PPA or security driver */
@@ -119,16 +138,28 @@ void __init omap_detect_sram(void)
 
 	if (cpu_class_is_omap2()) {
 		if (is_sram_locked()) {
-			omap_sram_base = OMAP2_SRAM_PUB_VA;
-			omap_sram_start = OMAP2_SRAM_PUB_PA;
-			omap_sram_size = 0x800; /* 2K */
+			if (cpu_is_omap34xx()) {
+				omap_sram_base = OMAP3_SRAM_PUB_VA;
+				omap_sram_start = OMAP3_SRAM_PUB_PA;
+				omap_sram_size = 0x8000; /* 32K */
+			} else {
+				omap_sram_base = OMAP2_SRAM_PUB_VA;
+				omap_sram_start = OMAP2_SRAM_PUB_PA;
+				omap_sram_size = 0x800; /* 2K */
+			}
 		} else {
-			omap_sram_base = OMAP2_SRAM_VA;
-			omap_sram_start = OMAP2_SRAM_PA;
-			if (cpu_is_omap242x())
-				omap_sram_size = 0xa0000; /* 640K */
-			else if (cpu_is_omap243x() || cpu_is_omap34xx())
+			if (cpu_is_omap34xx()) {
+				omap_sram_base = OMAP3_SRAM_VA;
+				omap_sram_start = OMAP3_SRAM_PA;
 				omap_sram_size = 0x10000; /* 64K */
+			} else {
+				omap_sram_base = OMAP2_SRAM_VA;
+				omap_sram_start = OMAP2_SRAM_PA;
+				if (cpu_is_omap242x())
+					omap_sram_size = 0xa0000; /* 640K */
+				else if (cpu_is_omap243x())
+					omap_sram_size = 0x10000; /* 64K */
+			}
 		}
 	} else {
 		omap_sram_base = OMAP1_SRAM_VA;
@@ -174,7 +205,7 @@ void __init omap_map_sram(void)
 	if (omap_sram_size == 0)
 		return;
 
-	if (cpu_class_is_omap2()) {
+	if (cpu_is_omap24xx()) {
 		omap_sram_io_desc[0].virtual = OMAP2_SRAM_VA;
 
 		base = OMAP2_SRAM_PA;
@@ -182,6 +213,13 @@ void __init omap_map_sram(void)
 		omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
 	}
 
+	if (cpu_is_omap34xx()) {
+		omap_sram_io_desc[0].virtual = OMAP3_SRAM_VA;
+		base = OMAP3_SRAM_PA;
+		base = ROUND_DOWN(base, PAGE_SIZE);
+		omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
+	}
+
 	omap_sram_io_desc[0].length = 1024 * 1024;	/* Use section desc */
 	iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc));
 
Signature · 1 line
1.5.3.6
author maintainer
#6 lore raw

PATCH 5/10 ARM: OMAP2: Rename cm_regbits_24xx.h to cm-regbits-24xx.h

This is to follow current naming before sending files upstream.

---
 arch/arm/mach-omap2/clock.c           |    2 +-
 arch/arm/mach-omap2/clock24xx.c       |    2 +-
 arch/arm/mach-omap2/clock24xx.h       |    2 +-
 arch/arm/mach-omap2/cm-regbits-24xx.h |  401 +++++++++++++++++++++++++++++++++
 arch/arm/mach-omap2/cm_regbits_24xx.h |  401 ---------------------------------
 arch/arm/mach-omap2/pm.c              |    2 +-
 drivers/dsp/dspgateway/dsp.h          |    2 +-
 7 files changed, 406 insertions(+), 406 deletions(-)
 create mode 100644 arch/arm/mach-omap2/cm-regbits-24xx.h
 delete mode 100644 arch/arm/mach-omap2/cm_regbits_24xx.h
arch/arm/mach-omap2/clock.c +1 -1
index 314ac57..3f41144 100644
@@ -42,7 +42,7 @@
 #include "prm.h"
 #include "prm_regbits_24xx.h"
 #include "cm.h"
-#include "cm_regbits_24xx.h"
+#include "cm-regbits-24xx.h"
 #include "cm_regbits_34xx.h"
 
 #define MAX_CLOCK_ENABLE_WAIT		100000
arch/arm/mach-omap2/clock24xx.c +1 -1
index 1053fc9..e8d0fe3 100644
@@ -38,7 +38,7 @@
 #include "prm.h"
 #include "prm_regbits_24xx.h"
 #include "cm.h"
-#include "cm_regbits_24xx.h"
+#include "cm-regbits-24xx.h"
 
 /* CM_CLKEN_PLL.EN_{54,96}M_PLL options (24XX) */
 #define EN_APLL_STOPPED			0
arch/arm/mach-omap2/clock24xx.h +1 -1
index 6ea0c1b..2b4a6a6 100644
@@ -26,7 +26,7 @@
 #include "prm.h"
 #include "cm.h"
 #include "prm_regbits_24xx.h"
-#include "cm_regbits_24xx.h"
+#include "cm-regbits-24xx.h"
 #include "sdrc.h"
 
 static void omap2_table_mpu_recalc(struct clk *clk);
arch/arm/mach-omap2/cm-regbits-24xx.h new file +401 -0

401 lines not on this page · raw message

arch/arm/mach-omap2/cm_regbits_24xx.h deleted +0 -401

401 lines not on this page · raw message

arch/arm/mach-omap2/pm.c +1 -1
index a1fe348..095b910 100644
@@ -49,7 +49,7 @@
 #include "prm.h"
 #include "prm_regbits_24xx.h"
 #include "cm.h"
-#include "cm_regbits_24xx.h"
+#include "cm-regbits-24xx.h"
 #include "sdrc.h"
 
 /* These addrs are in assembly language code to be patched at runtime */
drivers/dsp/dspgateway/dsp.h +1 -1
index 23321be..7d238e5 100644
@@ -33,7 +33,7 @@
 #include "../../../arch/arm/mach-omap2/prm.h"
 #include "../../../arch/arm/mach-omap2/prm_regbits_24xx.h"
 #include "../../../arch/arm/mach-omap2/cm.h"
-#include "../../../arch/arm/mach-omap2/cm_regbits_24xx.h"
+#include "../../../arch/arm/mach-omap2/cm-regbits-24xx.h"
 #endif
 
 /*
Signature · 1 line
1.5.3.6
author maintainer
#7 lore raw

PATCH 6/10 ARM: OMAP3: Rename cm_regbits_34xx.h to cm-regbits-34xx.h

Rename cm_regbits_34xx.h to cm-regbits-34xx.h

---
 arch/arm/mach-omap2/clock.c           |    2 +-
 arch/arm/mach-omap2/clock34xx.c       |    2 +-
 arch/arm/mach-omap2/clock34xx.h       |    2 +-
 arch/arm/mach-omap2/cm-regbits-34xx.h |  667 +++++++++++++++++++++++++++++++++
 arch/arm/mach-omap2/cm_regbits_34xx.h |  667 ---------------------------------
 drivers/usb/host/ehci-omap.h          |    2 +-
 6 files changed, 671 insertions(+), 671 deletions(-)
 create mode 100644 arch/arm/mach-omap2/cm-regbits-34xx.h
 delete mode 100644 arch/arm/mach-omap2/cm_regbits_34xx.h
arch/arm/mach-omap2/clock.c +1 -1
index 3f41144..3f107d4 100644
@@ -43,7 +43,7 @@
 #include "prm_regbits_24xx.h"
 #include "cm.h"
 #include "cm-regbits-24xx.h"
-#include "cm_regbits_34xx.h"
+#include "cm-regbits-34xx.h"
 
 #define MAX_CLOCK_ENABLE_WAIT		100000
 
arch/arm/mach-omap2/clock34xx.c +1 -1
index 2558a23..616e071 100644
@@ -35,7 +35,7 @@
 #include "prm.h"
 #include "prm_regbits_34xx.h"
 #include "cm.h"
-#include "cm_regbits_34xx.h"
+#include "cm-regbits-34xx.h"
 
 /* CM_CLKEN_PLL*.EN* bit values */
 #define DPLL_LOCKED		0x7
arch/arm/mach-omap2/clock34xx.h +1 -1
index 99cb536..9f61352 100644
@@ -14,7 +14,7 @@
 
 #include "clock.h"
 #include "cm.h"
-#include "cm_regbits_34xx.h"
+#include "cm-regbits-34xx.h"
 #include "prm.h"
 #include "prm_regbits_34xx.h"
 
arch/arm/mach-omap2/cm-regbits-34xx.h new file +667 -0

667 lines not on this page · raw message

arch/arm/mach-omap2/cm_regbits_34xx.h deleted +0 -667

667 lines not on this page · raw message

drivers/usb/host/ehci-omap.h +1 -1
index 86cd962..f75eda7 100644
@@ -25,7 +25,7 @@
 
 #include <asm/hardware.h>
 #include "../../../arch/arm/mach-omap2/cm.h"
-#include "../../../arch/arm/mach-omap2/cm_regbits_34xx.h"
+#include "../../../arch/arm/mach-omap2/cm-regbits-34xx.h"
 
 /*
  * OMAP USBHOST Register addresses: PHYSICAL ADDRESSES
Signature · 1 line
1.5.3.6
author maintainer
#8 lore raw

PATCH 7/10 ARM: OMAP2: Rename prcm_common.h to prcm-common.h

Rename prcm_common.h to prcm-common.h

---
 arch/arm/mach-omap2/cm.h          |    2 +-
 arch/arm/mach-omap2/prcm-common.h |  317 +++++++++++++++++++++++++++++++++++++
 arch/arm/mach-omap2/prcm_common.h |  317 -------------------------------------
 arch/arm/mach-omap2/prm.h         |    2 +-
 4 files changed, 319 insertions(+), 319 deletions(-)
 create mode 100644 arch/arm/mach-omap2/prcm-common.h
 delete mode 100644 arch/arm/mach-omap2/prcm_common.h
arch/arm/mach-omap2/cm.h +1 -1
index 1a8f289..8310e18 100644
@@ -14,7 +14,7 @@
  * published by the Free Software Foundation.
  */
 
-#include "prcm_common.h"
+#include "prcm-common.h"
 
 #ifndef __ASSEMBLER__
 #define OMAP_CM_REGADDR(module, reg)					\
arch/arm/mach-omap2/prcm-common.h new file +317 -0

317 lines not on this page · raw message

arch/arm/mach-omap2/prcm_common.h deleted +0 -317

317 lines not on this page · raw message

arch/arm/mach-omap2/prm.h +1 -1
index fd8c81d..fcc1aa0 100644
@@ -16,7 +16,7 @@
 
 #include <linux/kernel.h>
 #include <asm/io.h>
-#include "prcm_common.h"
+#include "prcm-common.h"
 
 
 #define OMAP_PRM_REGADDR(module, reg)					\
Signature · 1 line
1.5.3.6
author maintainer
#9 lore raw

PATCH 8/10 ARM: OMAP2: Rename prm_regbits_24xx.h to prm-regbits-24xx.h

Rename prm_regbits_24xx.h to prm-regbits-24xx.h

---
 arch/arm/mach-omap2/clock.c            |    2 +-
 arch/arm/mach-omap2/clock24xx.c        |    2 +-
 arch/arm/mach-omap2/clock24xx.h        |    2 +-
 arch/arm/mach-omap2/pm.c               |    2 +-
 arch/arm/mach-omap2/prcm.c             |    2 +-
 arch/arm/mach-omap2/prm-regbits-24xx.h |  279 ++++++++++++++++++++++++++++++++
 arch/arm/mach-omap2/prm_regbits_24xx.h |  279 --------------------------------
 drivers/dsp/dspgateway/dsp.h           |    2 +-
 8 files changed, 285 insertions(+), 285 deletions(-)
 create mode 100644 arch/arm/mach-omap2/prm-regbits-24xx.h
 delete mode 100644 arch/arm/mach-omap2/prm_regbits_24xx.h
arch/arm/mach-omap2/clock.c +1 -1
index 3f107d4..5cf88b7 100644
@@ -40,7 +40,7 @@
 #include "sdrc.h"
 #include "clock.h"
 #include "prm.h"
-#include "prm_regbits_24xx.h"
+#include "prm-regbits-24xx.h"
 #include "cm.h"
 #include "cm-regbits-24xx.h"
 #include "cm-regbits-34xx.h"
arch/arm/mach-omap2/clock24xx.c +1 -1
index e8d0fe3..35a255d 100644
@@ -36,7 +36,7 @@
 #include "clock.h"
 #include "clock24xx.h"
 #include "prm.h"
-#include "prm_regbits_24xx.h"
+#include "prm-regbits-24xx.h"
 #include "cm.h"
 #include "cm-regbits-24xx.h"
 
arch/arm/mach-omap2/clock24xx.h +1 -1
index 2b4a6a6..be95bf7 100644
@@ -25,7 +25,7 @@
 
 #include "prm.h"
 #include "cm.h"
-#include "prm_regbits_24xx.h"
+#include "prm-regbits-24xx.h"
 #include "cm-regbits-24xx.h"
 #include "sdrc.h"
 
arch/arm/mach-omap2/pm.c +1 -1
index 095b910..3a455e8 100644
@@ -47,7 +47,7 @@
 #include <asm/arch/board.h>
 
 #include "prm.h"
-#include "prm_regbits_24xx.h"
+#include "prm-regbits-24xx.h"
 #include "cm.h"
 #include "cm-regbits-24xx.h"
 #include "sdrc.h"
arch/arm/mach-omap2/prcm.c +1 -1
index 9857ba7..9ff918a 100644
@@ -18,7 +18,7 @@
 #include <linux/clk.h>
 
 #include "prm.h"
-#include "prm_regbits_24xx.h"
+#include "prm-regbits-24xx.h"
 
 extern void omap2_clk_prepare_for_reboot(void);
 
arch/arm/mach-omap2/prm-regbits-24xx.h new file +279 -0

279 lines not on this page · raw message

arch/arm/mach-omap2/prm_regbits_24xx.h deleted +0 -279

279 lines not on this page · raw message

drivers/dsp/dspgateway/dsp.h +1 -1
index 7d238e5..2a3dc24 100644
@@ -31,7 +31,7 @@
 
 #ifdef CONFIG_ARCH_OMAP2
 #include "../../../arch/arm/mach-omap2/prm.h"
-#include "../../../arch/arm/mach-omap2/prm_regbits_24xx.h"
+#include "../../../arch/arm/mach-omap2/prm-regbits-24xx.h"
 #include "../../../arch/arm/mach-omap2/cm.h"
 #include "../../../arch/arm/mach-omap2/cm-regbits-24xx.h"
 #endif
Signature · 1 line
1.5.3.6
author maintainer
#10 lore raw

PATCH 9/10 ARM: OMAP3: Rename prm_regbits_34xx.h to prm-regbits-34xx.h

Rename prm_regbits_34xx.h to prm-regbits-34xx.h

---
 arch/arm/mach-omap2/clock34xx.c        |    2 +-
 arch/arm/mach-omap2/clock34xx.h        |    2 +-
 arch/arm/mach-omap2/prm-regbits-34xx.h |  582 ++++++++++++++++++++++++++++++++
 arch/arm/mach-omap2/prm_regbits_34xx.h |  582 --------------------------------
 4 files changed, 584 insertions(+), 584 deletions(-)
 create mode 100644 arch/arm/mach-omap2/prm-regbits-34xx.h
 delete mode 100644 arch/arm/mach-omap2/prm_regbits_34xx.h
arch/arm/mach-omap2/clock34xx.c +1 -1
index 616e071..f05dd2e 100644
@@ -33,7 +33,7 @@
 #include "clock.h"
 #include "clock34xx.h"
 #include "prm.h"
-#include "prm_regbits_34xx.h"
+#include "prm-regbits-34xx.h"
 #include "cm.h"
 #include "cm-regbits-34xx.h"
 
arch/arm/mach-omap2/clock34xx.h +1 -1
index 9f61352..64f108d 100644
@@ -16,7 +16,7 @@
 #include "cm.h"
 #include "cm-regbits-34xx.h"
 #include "prm.h"
-#include "prm_regbits_34xx.h"
+#include "prm-regbits-34xx.h"
 
 static void omap3_dpll_recalc(struct clk *clk);
 static void omap3_clkoutx2_recalc(struct clk *clk);
arch/arm/mach-omap2/prm-regbits-34xx.h new file +582 -0

582 lines not on this page · raw message

arch/arm/mach-omap2/prm_regbits_34xx.h deleted +0 -582

582 lines not on this page · raw message

Signature · 1 line
1.5.3.6
author maintainer
#11 lore raw

PATCH 10/10 ARM: OMAP: Move STI support to drivers/misc

This is to allow syncing plat-omap with mainline kernel.

---
 arch/arm/plat-omap/Makefile          |    3 -
 arch/arm/plat-omap/sti/Makefile      |    4 -
 arch/arm/plat-omap/sti/sti-console.c |  189 ---------------
 arch/arm/plat-omap/sti/sti-fifo.c    |  117 ---------
 arch/arm/plat-omap/sti/sti-netlink.c |  152 ------------
 arch/arm/plat-omap/sti/sti.c         |  432 ----------------------------------
 drivers/misc/Makefile                |    1 +
 drivers/misc/sti/Makefile            |    4 +
 drivers/misc/sti/sti-console.c       |  189 +++++++++++++++
 drivers/misc/sti/sti-fifo.c          |  117 +++++++++
 drivers/misc/sti/sti-netlink.c       |  152 ++++++++++++
 drivers/misc/sti/sti.c               |  432 ++++++++++++++++++++++++++++++++++
 12 files changed, 895 insertions(+), 897 deletions(-)
 delete mode 100644 arch/arm/plat-omap/sti/Makefile
 delete mode 100644 arch/arm/plat-omap/sti/sti-console.c
 delete mode 100644 arch/arm/plat-omap/sti/sti-fifo.c
 delete mode 100644 arch/arm/plat-omap/sti/sti-netlink.c
 delete mode 100644 arch/arm/plat-omap/sti/sti.c
 create mode 100644 drivers/misc/sti/Makefile
 create mode 100644 drivers/misc/sti/sti-console.c
 create mode 100644 drivers/misc/sti/sti-fifo.c
 create mode 100644 drivers/misc/sti/sti-netlink.c
 create mode 100644 drivers/misc/sti/sti.c
arch/arm/plat-omap/Makefile +0 -3
index c1ada8f..a3f1f5c 100644
@@ -14,9 +14,6 @@ obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o
 
 obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
 
-# STI support
-obj-$(CONFIG_OMAP_STI) += sti/
-
 obj-$(CONFIG_CPU_FREQ) += cpu-omap.o
 obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
 obj-$(CONFIG_OMAP_BOOT_REASON) += bootreason.o
arch/arm/plat-omap/sti/Makefile deleted +0 -4
deleted file mode 100644
index 6ad9bb3..0000000
@@ -1,4 +0,0 @@
-obj-y += sti.o sti-fifo.o
-
-obj-$(CONFIG_OMAP_STI_CONSOLE)	+= sti-console.o
-obj-$(CONFIG_NET)		+= sti-netlink.o
arch/arm/plat-omap/sti/sti-console.c deleted +0 -189

189 lines not on this page · raw message

arch/arm/plat-omap/sti/sti-fifo.c deleted +0 -117

117 lines not on this page · raw message

arch/arm/plat-omap/sti/sti-netlink.c deleted +0 -152

152 lines not on this page · raw message

arch/arm/plat-omap/sti/sti.c deleted +0 -432

432 lines not on this page · raw message

drivers/misc/Makefile +1 -0
index 3b12f5d..d65b43d 100644
@@ -5,6 +5,7 @@ obj- := misc.o	# Dummy rule to force built-in.o to be made
 
 obj-$(CONFIG_IBM_ASM)		+= ibmasm/
 obj-$(CONFIG_HDPU_FEATURES)	+= hdpuftrs/
+obj-$(CONFIG_OMAP_STI)		+= sti/
 obj-$(CONFIG_MSI_LAPTOP)     += msi-laptop.o
 obj-$(CONFIG_ACER_WMI)     += acer-wmi.o
 obj-$(CONFIG_ASUS_LAPTOP)     += asus-laptop.o
drivers/misc/sti/Makefile new file +4 -0
new file mode 100644
index 0000000..6ad9bb3
@@ -0,0 +1,4 @@
+obj-y += sti.o sti-fifo.o
+
+obj-$(CONFIG_OMAP_STI_CONSOLE)	+= sti-console.o
+obj-$(CONFIG_NET)		+= sti-netlink.o
drivers/misc/sti/sti-console.c new file +189 -0

189 lines not on this page · raw message

drivers/misc/sti/sti-fifo.c new file +117 -0

117 lines not on this page · raw message

drivers/misc/sti/sti-netlink.c new file +152 -0

152 lines not on this page · raw message

drivers/misc/sti/sti.c new file +432 -0

432 lines not on this page · raw message

Signature · 6 lines
1.5.3.6

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author maintainer
#12 lore raw
In reply to Tony Lindgren
Quoted 9 lines · Tony Lindgren

Hi all,

Attached series moves things around a bit to make room for 34xx PM, renames some files to have consistent naming, and moves STI support from plat-omap to drivers/misc.

This is all to allow us to get arch/arm/*omap* stuff in sync with mainline. I'll be putting together a series of patches for Russell over next few days for post 2.6.25.

I've pushed these changes.

Tony