libertas: fix memory alignment problems on the blackfin
PATCH 1/1 libertas: fix memory alignment problems on the blackfin
Fixing unaligned memory access on the blackfin architecture (maybe on the ARM also).
---
drivers/net/wireless/libertas/scan.c +0 -0
@@ -567,11 +567,11 @@ static int lbs_process_bss(struct bss_descriptor *bss,
pos += 8;
/* beacon interval is 2 bytes long */
- bss->beaconperiod = le16_to_cpup((void *) pos);
+ bss->beaconperiod = le16_to_cpu(get_unaligned((__le16 *)pos));
pos += 2;
/* capability information is 2 bytes long */
- bss->capability = le16_to_cpup((void *) pos);
+ bss->capability = le16_to_cpu(get_unaligned((__le16 *)pos));
lbs_deb_scan("process_bss: capabilities 0x%04x\n", bss->capability);
pos += 2;Quoted 2 lines · Ihar Hrachyshka
Fixing unaligned memory access on the blackfin architecture (maybe on the ARM also).
There's helpers for this now: get_unaligned_le16
Cheers,
Harvey
Quoted 1 line
There's helpers for this now:
get_unaligned_le16
Ok, third pass - the first was in January... :)
Fixing unaligned memory access on the blackfin architecture (maybe on the ARM also).
---
drivers/net/wireless/libertas/scan.c +0 -0
@@ -567,11 +567,11 @@ static int lbs_process_bss(struct bss_descriptor *bss,
pos += 8;
/* beacon interval is 2 bytes long */
- bss->beaconperiod = le16_to_cpup((void *) pos);
+ bss->beaconperiod = get_unaligned_le16(pos);
pos += 2;
/* capability information is 2 bytes long */
- bss->capability = le16_to_cpup((void *) pos);
+ bss->capability = get_unaligned_le16(pos);
lbs_deb_scan("process_bss: capabilities 0x%04x\n", bss->capability);
pos += 2;Dan Williams
Acked-byQuoted 7 lines · Ihar Hrachyshka
Quoted 1 line
There's helpers for this now:
get_unaligned_le16Ok, third pass - the first was in January... :)
Fixing unaligned memory access on the blackfin architecture (maybe on the ARM also).
Signed-off-by Ihar Hrachyshka <[email protected]>
Quoted 24 lines
---
drivers/net/wireless/libertas/scan.c +2
-3@@ -567,11 +567,11 @@ static int lbs_process_bss(struct bss_descriptor *bss, pos +=8 ;/* beacon interval is 2 bytes long */ - bss->beaconperiod =le16_to_cpup ((void *) pos); + bss->beaconperiod =get_unaligned_le16 (pos); pos +=2 ;/* capability information is 2 bytes long */ - bss->capability =le16_to_cpup ((void *) pos); + bss->capability =get_unaligned_le16 (pos);lbs_deb_scan ("process_bss: capabilities 0x%04x\n" , bss->capability); pos +=2 ; --To unsubscribe from this list: send the line "unsubscribe linux-wireless" in the body of a message to [email protected]
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Quoted 2 lines
Fixing unaligned memory access on the blackfin architecture (maybe on the ARM also).
You can delete the "maybe", on ARM (more specificially, on a PXA255, which is ARMv5TE) I didn't had a problem.
Quoted 5 lines · Holger Schurig
Quoted 2 lines
Fixing unaligned memory access on the blackfin architecture (maybe on the ARM also).
You can delete the "maybe", on ARM (more specificially, on a PXA255, which is ARMv5TE) I didn't had a problem.
Ok, just blackfin. Is it a joke or should I resend the patch with another description?..
Quoted 6 lines
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Johannes Berg
maintainerQuoted 10 lines · Ihar Hrachyshka
Quoted 5 lines · Holger Schurig
Quoted 2 lines
Fixing unaligned memory access on the blackfin architecture (maybe on the ARM also).
You can delete the "maybe", on ARM (more specificially, on a PXA255, which is ARMv5TE) I didn't had a problem.
Ok, just blackfin. Is it a joke or should I resend the patch with another description?..
I'm sure arm has that problem too and sparc and others, but it may not always show up because the frame might actually be aligned sometimes.
OTOH, why are you getting unaligned frames in the first place? This is the beacon interval, so it's at a fixed modulo-two position from the start of the frame.
johannes
Quoted 12 lines · Johannes Berg
Quoted 10 lines · Ihar Hrachyshka
Quoted 5 lines · Holger Schurig
Quoted 2 lines
Fixing unaligned memory access on the blackfin architecture (maybe on the ARM also).
You can delete the "maybe", on ARM (more specificially, on a PXA255, which is ARMv5TE) I didn't had a problem.
Ok, just blackfin. Is it a joke or should I resend the patch with another description?..
Quoted 6 lines
I'm sure arm has that problem too and sparc and others, but it may not always show up because the frame might actually be aligned sometimes.
OTOH, why are you getting unaligned frames in the first place? This is the beacon interval, so it's at a fixed modulo-two position from the start of the frame.
Do you mean that we should add __attribute__ ((aligned (2))) for our 'bss_descriptor' structure definition rather align particular fields at runtime?
Quoted 3 lines
johannes
Johannes Berg
maintainerQuoted 17 lines · Ihar Hrachyshka
Quoted 15 lines · Johannes Berg
Quoted 10 lines · Ihar Hrachyshka
Quoted 5 lines · Holger Schurig
Quoted 2 lines
Fixing unaligned memory access on the blackfin architecture (maybe on the ARM also).
You can delete the "maybe", on ARM (more specificially, on a PXA255, which is ARMv5TE) I didn't had a problem.
Ok, just blackfin. Is it a joke or should I resend the patch with another description?..
I'm sure arm has that problem too and sparc and others, but it may not always show up because the frame might actually be aligned sometimes.
Quoted 7 lines
Quoted 3 lines
OTOH, why are you getting unaligned frames in the first place? This is the beacon interval, so it's at a fixed modulo-two position from the start of the frame.
Do you mean that we should add
__attribute__((aligned (2))) for our 'bss_descriptor' structure definition rather align particular fields at runtime?
Oh, no, sorry, I got confused. The firmware apparently lays out the BSS structure in that way, I was thinking you were getting the beacon/probe response frame itself. The patch is correct.
johannes
Quoted 5 lines
Quoted 2 lines
You can delete the "maybe", on ARM (more specificially, on a PXA255, which is ARMv5TE) I didn't had a problem.
Ok, just blackfin. Is it a joke or should I resend the patch with another description?..
It's neither a joke (I never had any problem with my embedded device) nor do I insist that you change the commit message. From my part you'd get an ACK (but I'm not the maintainer of this code).
Quoted 5 lines · Holger Schurig
Quoted 2 lines
Fixing unaligned memory access on the blackfin architecture (maybe on the ARM also).
You can delete the "maybe", on ARM (more specificially, on a PXA255, which is ARMv5TE) I didn't had a problem.
As I know, ARMs are too different to say about some "generic" ARM behavior, in memory alignment also I think.
Too be more correct, the patch fixes alignment problems on all machines where structures aren't aligned for even addresses by default, blackfin, arm, or anything else I don't know about.
Quoted 6 lines
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