byteorder: wire up arches to use new headers
PATCH 3/6 byteorder: wire up arches to use new headers
Signed-off-by Harvey Harrison <[email protected]>
---
Patch vs linux-next 20080710, needs the m86k changes to asm/byteorder.h first. (they have added one more optimized arch version in their devel tree)
include/asm-alpha/byteorder.h | 13 ++---- include/asm-arm/byteorder.h | 25 +++++------- include/asm-avr32/byteorder.h | 22 +++++++---- include/asm-blackfin/byteorder.h | 33 +++++++-------- include/asm-cris/arch-v10/byteorder.h | 6 ++- include/asm-cris/arch-v32/byteorder.h | 6 ++- include/asm-cris/byteorder.h | 18 +------- include/asm-frv/byteorder.h | 10 +--- include/asm-h8300/byteorder.h | 10 +--- include/asm-ia64/byteorder.h | 26 +++++------- include/asm-m32r/byteorder.h | 15 +++---- include/asm-m68k/byteorder.h | 16 ++----- include/asm-m68knommu/byteorder.h | 13 ++---- include/asm-mips/byteorder.h | 40 +++++++----------- include/asm-mn10300/byteorder.h | 23 +++------- include/asm-parisc/byteorder.h | 37 ++++++------------ include/asm-powerpc/byteorder.h | 49 ++++++++-------------- include/asm-s390/byteorder.h | 70 +++++++++----------------------- include/asm-sh/byteorder.h | 32 +++++++-------- include/asm-sparc/byteorder.h | 22 ++++------- include/asm-x86/byteorder.h | 69 +++++++++++++-------------------- include/asm-xtensa/byteorder.h | 32 +++++++-------- 22 files changed, 226 insertions(+), 361 deletions(-)
include/asm-alpha/byteorder.h +4 -9
@@ -5,9 +5,9 @@#include <linux/compiler.h> #include <asm/compiler.h> -#ifdef __GNUC__ +#define __LITTLE_ENDIAN -static inline __attribute_const__ __u32 __arch__swab32(__u32 x) +static inline __attribute_const__ __u32 __arch_swab32(__u32 x) {/* * Unfortunately, we can't use the 6 instruction sequence
@@ -35,13 +35,8 @@ static inline __attribute_const__ __u32 __arch__swab32(__u32 x) return t1; } +#define HAVE_ARCH_SWAB32 -#define __arch__swab32 __arch__swab32 - -#endif /* __GNUC__ */ - -#define __BYTEORDER_HAS_U64__ - -#include <linux/byteorder/little_endian.h> +#include <linux/byteorder.h> #endif /* _ALPHA_BYTEORDER_H */
include/asm-arm/byteorder.h +11 -14
@@ -18,7 +18,15 @@#include <linux/compiler.h> #include <asm/types.h> -static inline __attribute_const__ __u32 ___arch__swab32(__u32 x) +#ifdef __ARMEB__ +# define __BIG_ENDIAN +#else +# define __LITTLE_ENDIAN +#endif + +#define __SWAB_64_THRU_32__ + +static inline __attribute_const__ __u32 __arch_swab32(__u32 x) {__u32 t;
@@ -40,19 +48,8 @@ static inline __attribute_const__ __u32 ___arch__swab32(__u32 x) return x; } +#define HAVE_ARCH_SWAB32 -#define __arch__swab32 (x) ___arch__swab32(x) - -#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) -# define __BYTEORDER_HAS_U64__ -# define __SWAB_64_THRU_32__ -#endif - -#ifdef __ARMEB__ -#include <linux/byteorder/big_endian.h> -#else -#include <linux/byteorder/little_endian.h> -#endif +#include <linux/byteorder.h> #endif -
include/asm-avr32/byteorder.h +14 -8
@@ -7,6 +7,9 @@#include <asm/types.h> #include <linux/compiler.h> +#define __BIG_ENDIAN +#define __SWAB_64_THRU_32__ +#ifdef __CHECKER__extern unsigned long __builtin_bswap_32 (unsigned long x);extern unsigned short __builtin_bswap_16 (unsigned short x);
@@ -17,15 +20,18 @@ extern unsigned short __builtin_bswap_16(unsigned short x);* the result. */ #if !(__GNUC__ ==4 && __GNUC_MINOR__ <2 ) -#define __arch__swab32 (x) __builtin_bswap_32(x) -#define __arch__swab16 (x) __builtin_bswap_16(x) -#endif +static inline __attribute_const__ __u16 __arch_swab16(__u16 val) +{ +return __builtin_bswap_16 (val); +} +#define HAVE_ARCH_SWAB16 -#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) -# define __BYTEORDER_HAS_U64__ -# define __SWAB_64_THRU_32__ +static inline __attribute_const__ __u32 __arch_swab32(__u32 val) +{ +return __builtin_bswap_32 (val); +} +#define HAVE_ARCH_SWAB32 #endif -#include <linux/byteorder/big_endian.h> - +#include <linux/byteorder.h> #endif /* __ASM_AVR32_BYTEORDER_H */
include/asm-blackfin/byteorder.h +15 -18
@@ -4,9 +4,10 @@#include <asm/types.h> #include <linux/compiler.h> -#ifdef __GNUC__ +#define __LITTLE_ENDIAN +#define __SWAB_64_THRU_32__ -static __inline__ __attribute_const__ __u32 ___arch__swahb32(__u32 xx) +static inline __attribute_const__ __u32 __arch_swahb32(__u32 xx) {__u32 tmp; __asm__("%1 = %0 >> 8 (V);\n\t"
@@ -15,34 +16,30 @@ static __inline__ __attribute_const__ __u32 ___arch__swahb32(__u32 xx) : "+d"(xx), "=&d"(tmp));return xx; } +#define HAVE_ARCH_SWAHB32 -static __inline__ __attribute_const__ __u32 ___arch__swahw32(__u32 xx) +static inline __attribute_const__ __u32 __arch_swahw32(__u32 xx) {__u32 rv; __asm__("%0 = PACK(%1.L, %1.H);\n\t" :"=d" (rv):"d" (xx));return rv; } +#define HAVE_ARCH_SWAHW32 -#define __arch__swahb32 (x) ___arch__swahb32(x) -#define __arch__swahw32 (x) ___arch__swahw32(x) -#define __arch__swab32 (x) ___arch__swahb32(___arch__swahw32(x)) +static inline __attribute_const__ __u32 __arch_swab32(__u32 xx) +{ +return __arch_swahb32 (__arch_swahw32 (x)); +} +#define HAVE_ARCH_SWAB32 -static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 xx) +static inline __attribute_const__ __u16 __arch_swab16(__u16 xx) {__u32 xw = xx; __asm__("%0 <<= 8;\n %0.L = %0.L + %0.H (NS);\n" :"+d" (xw));return (__u16 )xw; } +#define HAVE_ARCH_SWAB16 -#define __arch__swab16 (x) ___arch__swab16(x) - -#endif - -#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__) -# define __BYTEORDER_HAS_U64__ -# define __SWAB_64_THRU_32__ -#endif - -#include <linux/byteorder/little_endian.h> +#include <linux/byteorder.h> -#endif /* _BLACKFIN_BYTEORDER_H */ +#endif /* _BLACKFIN_BYTEORDER_H */
include/asm-cris/arch-v10/byteorder.h +4 -2
@@ -9,18 +9,20 @@* them together into ntohl etc. */ -static inline __attribute_const__ __u32 ___arch__swab32(__u32 x) +static inline __attribute_const__ __u32 __arch_swab32(__u32 x) { __asm__ ("swapwb %0" :"=r" (x) :"0" (x));return (x); } +#define HAVE_ARCH_SWAB32 -static inline __attribute_const__ __u16 ___arch__swab16(__u16 x) +static inline __attribute_const__ __u16 __arch_swab16(__u16 x) { __asm__ ("swapb %0" :"=r" (x) :"0" (x));return (x); } +#define HAVE_ARCH_SWAB16 #endif
include/asm-cris/arch-v32/byteorder.h +4 -2
@@ -4,17 +4,19 @@#include <asm/types.h> static inline __const__ __u32 -___arch__swab32 (__u32 x) +__arch_swab32 (__u32 x) { __asm__ __volatile__ ("swapwb %0" :"=r" (x) :"0" (x));return (x); } +#define HAVE_ARCH_SWAB32 static inline __const__ __u16 -___arch__swab16 (__u16 x) +__arch_swab16 (__u16 x) { __asm__ __volatile__ ("swapb %0" :"=r" (x) :"0" (x));return (x); } +#define HAVE_ARCH_SWAB16 #endif /* _ASM_CRIS_ARCH_BYTEORDER_H */
include/asm-cris/byteorder.h +3 -15
@@ -1,26 +1,14 @@#ifndef _CRIS_BYTEORDER_H#define _CRIS_BYTEORDER_H -#ifdef __GNUC__ +#define __LITTLE_ENDIAN +#define __SWAB_64_THRU_32__#ifdef __KERNEL__#include <asm/arch/byteorder.h> - -/* defines are necessary because the other files detect the presence -* of a defined __arch_swab32, not an inline -*/ -#define __arch__swab32 (x) ___arch__swab32(x) -#define __arch__swab16 (x) ___arch__swab16(x) -#endif /* __KERNEL__ */ - -#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) -# define __BYTEORDER_HAS_U64__ -# define __SWAB_64_THRU_32__#endif -#endif /* __GNUC__ */ - -#include <linux/byteorder/little_endian.h> +#include <linux/byteorder.h> #endif
include/asm-frv/byteorder.h +3 -7
@@ -1,13 +1,9 @@#ifndef _ASM_BYTEORDER_H#define _ASM_BYTEORDER_H -#include <asm/types.h> +#define __BIG_ENDIAN +#define __SWAB_64_THRU_32__ -#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__) -# define __BYTEORDER_HAS_U64__ -# define __SWAB_64_THRU_32__ -#endif - -#include <linux/byteorder/big_endian.h> +#include <linux/byteorder.h> #endif /* _ASM_BYTEORDER_H */
include/asm-h8300/byteorder.h +3 -7
@@ -1,13 +1,9 @@#ifndef _H8300_BYTEORDER_H#define _H8300_BYTEORDER_H -#include <asm/types.h> +#define __BIG_ENDIAN +#define __SWAB_64_THRU_32__ -#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__) -# define __BYTEORDER_HAS_U64__ -# define __SWAB_64_THRU_32__ -#endif - -#include <linux/byteorder/big_endian.h> +#include <linux/byteorder.h> #endif /* _H8300_BYTEORDER_H */
include/asm-ia64/byteorder.h +11 -15
@@ -10,33 +10,29 @@#include <asm/intrinsics.h> #include <linux/compiler.h> -static __inline__ __attribute_const__ __u64 -__ia64_swab64 (__u64 x) +#define __LITTLE_ENDIAN + +static inline __attribute_const__ __u64 __arch_swab64(__u64 x) {__u64 result; result =ia64_mux1 (x, ia64_mux1_rev);return result; } +#define HAVE_ARCH_SWAB64 -static __inline__ __attribute_const__ __u32 -__ia64_swab32 (__u32 x) +static inline __attribute_const__ __u32 __arch_swab32(__u32 x) { -return __ia64_swab64 (x) >>32 ; +return __arch_swab64 (x) >>32 ; } +#define HAVE_ARCH_SWAB32 -static __inline__ __attribute_const__ __u16 -__ia64_swab16 (__u16 x) +static inline __attribute_const__ __u16 __arch_swab16(__u16 x) { -return __ia64_swab64 (x) >>48 ; +return __arch_swab64 (x) >>48 ; } +#define HAVE_ARCH_SWAB16 -#define __arch__swab64 (x) __ia64_swab64(x) -#define __arch__swab32 (x) __ia64_swab32(x) -#define __arch__swab16 (x) __ia64_swab16(x) - -#define __BYTEORDER_HAS_U64__ - -#include <linux/byteorder/little_endian.h> +#include <linux/byteorder.h> #endif /* _ASM_IA64_BYTEORDER_H */
include/asm-m32r/byteorder.h +6 -9
@@ -1,17 +1,14 @@#ifndef _ASM_M32R_BYTEORDER_H#define _ASM_M32R_BYTEORDER_H -#include <asm/types.h> - -#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) -# define __BYTEORDER_HAS_U64__ -# define __SWAB_64_THRU_32__ -#endif -#if defined(__LITTLE_ENDIAN__) -# include <linux/byteorder/little_endian.h> +# define __LITTLE_ENDIAN#else -# include <linux/byteorder/big_endian.h> +# define __BIG_ENDIAN#endif +#define __SWAB_64_THRU_32__ + +#include <linux/byteorder.h> +#endif /* _ASM_M32R_BYTEORDER_H */
include/asm-m68k/byteorder.h +5 -11
@@ -4,22 +4,16 @@#include <asm/types.h> #include <linux/compiler.h> -#ifdef __GNUC__ +#define __BIG_ENDIAN +#define __SWAB_64_THRU_32__ -static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 val) +static inline __attribute_const__ __u32 __arch_swab32(__u32 val) { __asm__("rolw #8,%0; swap %0; rolw #8,%0" :"=d" (val) :"0" (val));return val; } -#define __arch__swab32 (x) ___arch__swab32(x) +#define HAVE_ARCH_SWAB32 -#endif - -#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__) -# define __BYTEORDER_HAS_U64__ -# define __SWAB_64_THRU_32__ -#endif - -#include <linux/byteorder/big_endian.h> +#include <linux/byteorder.h> #endif /* _M68K_BYTEORDER_H */
include/asm-m68knommu/byteorder.h +5 -8
@@ -3,13 +3,11 @@#include <linux/types.h> -#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__) -# define __BYTEORDER_HAS_U64__ -# define __SWAB_64_THRU_32__ -#endif +#define __BIG_ENDIAN +#define __SWAB_64_THRU_32__#if defined (__mcfisaaplus__) || defined (__mcfisac__) -static inline __attribute_const__ __u32 ___arch__swab32(__u32 val) +static inline __attribute_const__ __u32 __arch_swab32(__u32 val) { asm( "byterev %0"
@@ -18,10 +16,9 @@ static inline __attribute_const__ __u32 ___arch__swab32(__u32 val) );return val; } - -#define __arch__swab32 (x) ___arch__swab32(x) +#define HAVE_ARCH_SWAB32 #endif -#include <linux/byteorder/big_endian.h> +#include <linux/byteorder.h> #endif /* _M68KNOMMU_BYTEORDER_H */
include/asm-mips/byteorder.h +16 -24
@@ -11,11 +11,19 @@#include <linux/compiler.h> #include <asm/types.h> -#ifdef __GNUC__ +#if defined(__MIPSEB__) +# define __BIG_ENDIAN +#elif defined(__MIPSEL__) +# define __LITTLE_ENDIAN +#else +# error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???" +#endif + +#define __SWAB_64_THRU_32__#ifdef CONFIG_CPU_MIPSR2 -static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x) +static inline __attribute_const__ __u16 __arch_swab16(__u16 x) { __asm__( " wsbh %0, %1 \n"
@@ -24,9 +32,9 @@ static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)return x; } -#define __arch__swab16 (x) ___arch__swab16(x) +#define HAVE_ARCH_SWAB16 -static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) +static inline __attribute_const__ __u32 __arch_swab32(__u32 x) { __asm__( " wsbh %0, %1 \n"
@@ -36,11 +44,10 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)return x; } -#define __arch__swab32 (x) ___arch__swab32(x) +#define HAVE_ARCH_SWAB32 #ifdef CONFIG_CPU_MIPS64_R2 - -static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x) +static inline __attribute_const__ __u64 __arch_swab64(__u64 x) { __asm__( " dsbh %0, %1 \n"
@@ -51,26 +58,11 @@ static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x)return x; } - -#define __arch__swab64 (x) ___arch__swab64(x) - +#define HAVE_ARCH_SWAB64 #endif /* CONFIG_CPU_MIPS64_R2 */ #endif /* CONFIG_CPU_MIPSR2 */ -#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) -# define __BYTEORDER_HAS_U64__ -# define __SWAB_64_THRU_32__ -#endif - -#endif /* __GNUC__ */ - -#if defined(__MIPSEB__) -# include <linux/byteorder/big_endian.h> -#elif defined(__MIPSEL__) -# include <linux/byteorder/little_endian.h> -#else -# error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???" -#endif +#include <linux/byteorder.h> #endif /* _ASM_BYTEORDER_H */
include/asm-mn10300/byteorder.h +7 -16
@@ -13,34 +13,25 @@#include <asm/types.h> -#ifdef __GNUC__ +#define __LITTLE_ENDIAN +#define __SWAB_64_THRU_32__ -static inline __attribute__((const)) -__u32 ___arch__swab32 (__u32 x) +static inline __attribute_const__ __u32 __arch_swab32(__u32 x) {__u32 ret; asm("swap %1,%0" :"=r" (ret) :"r" (x));return ret; } +#define HAVE_ARCH_SWAB32 -static inline __attribute__((const)) -__u16 ___arch__swab16 (__u16 x) +static inline __attribute_const__ __u16 __arch_swab16(__u16 x) {__u16 ret; asm("swaph %1,%0" :"=r" (ret) :"r" (x));return ret; } +#define HAVE_ARCH_SWAB16 -#define __arch__swab32 (x) ___arch__swab32(x) -#define __arch__swab16 (x) ___arch__swab16(x) - -#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) -# define __BYTEORDER_HAS_U64__ -# define __SWAB_64_THRU_32__ -#endif - -#endif /* __GNUC__ */ - -#include <linux/byteorder/little_endian.h> +#include <linux/byteorder.h> #endif /* _ASM_BYTEORDER_H */
include/asm-parisc/byteorder.h +12 -25
@@ -4,9 +4,10 @@#include <asm/types.h> #include <linux/compiler.h> -#ifdef __GNUC__ +#define __LITTLE_ENDIAN +#define __SWAB_64_THRU_32__ -static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x) +static inline __attribute_const__ __u16 __arch_swab16(__u16 x) { __asm__("dep %0, 15, 8, %0\n\t" /* deposit 00ab -> 0bab */ "shd %%r0, %0, 8, %0" /* shift 000000ab -> 00ba */
@@ -14,8 +15,9 @@ static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x) : "0" (x));return x; } +#define HAVE_ARCH_SWAB16 -static __inline__ __attribute_const__ __u32 ___arch__swab24(__u32 x) +static inline __attribute_const__ __u32 __arch_swab24(__u32 x) { __asm__("shd %0, %0, 8, %0\n\t" /* shift xabcxabc -> cxab */ "dep %0, 15, 8, %0\n\t" /* deposit cxab -> cbab */
@@ -25,7 +27,7 @@ static __inline__ __attribute_const__ __u32 ___arch__swab24(__u32 x)return x; } -static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) +static inline __attribute_const__ __u32 __arch_swab32(__u32 x) {unsigned int temp; __asm__("shd %0, %0, 16, %1\n\t" /* shift abcdabcd -> cdab */
@@ -35,7 +37,7 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) : "0" (x));return x; } - +#define HAVE_ARCH_SWAB32 #if BITS_PER_LONG >32 /*
@@ -48,7 +50,8 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)** HSHR 67452301 -> *6*4*2*0 into %0 ** OR %0 | %1 -> 76543210 into %0 (all done!) */ -static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x) { +static inline __attribute_const__ __u64 __arch_swab64(__u64 x) +{__u64 temp; __asm__("permh,3210 %0, %0\n\t" "hshl %0, 8, %1\n\t"
@@ -58,25 +61,9 @@ static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x) { : "0" (x));return x; } -#define __arch__swab64 (x) ___arch__swab64(x) -#define __BYTEORDER_HAS_U64__ -#elif !defined(__STRICT_ANSI__) -static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x) -{ -__u32 t1 =___arch__swab32 ((__u32 ) x); -__u32 t2 =___arch__swab32 ((__u32) (x >>32 )); -return (((__u64 ) t1 <<32 ) | t2); -} -#define __arch__swab64 (x) ___arch__swab64(x) -#define __BYTEORDER_HAS_U64__ -#endif - -#define __arch__swab16 (x) ___arch__swab16(x) -#define __arch__swab24 (x) ___arch__swab24(x) -#define __arch__swab32 (x) ___arch__swab32(x) - -#endif /* __GNUC__ */ +#define HAVE_ARCH_SWAB64 +#endif /* BITS_PER_LONG > 32 */ -#include <linux/byteorder/big_endian.h> +#include <linux/byteorder.h> #endif /* _PARISC_BYTEORDER_H */
include/asm-powerpc/byteorder.h +18 -31
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include/asm-s390/byteorder.h +20 -50
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include/asm-sh/byteorder.h +15 -17
@@ -8,7 +8,15 @@#include <linux/compiler.h> #include <linux/types.h> -static inline __attribute_const__ __u32 ___arch__swab32(__u32 x) +#ifdef __LITTLE_ENDIAN__ +# define __LITTLE_ENDIAN +#else +# define __BIG_ENDIAN +#endif + +#define __SWAB_64_THRU_32__ + +static inline __attribute_const__ __u32 __arch_swab32(__u32 x) { __asm__(#ifdef __SH5__
@@ -24,8 +32,9 @@ static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)return x; } +#define HAVE_ARCH_SWAB32 -static inline __attribute_const__ __u16 ___arch__swab16(__u16 x) +static inline __attribute_const__ __u16 __arch_swab16(__u16 x) { __asm__(#ifdef __SH5__
@@ -39,8 +48,9 @@ static inline __attribute_const__ __u16 ___arch__swab16(__u16 x)return x; } +#define HAVE_ARCH_SWAB16 -static inline __u64 ___arch__swab64 (__u64 val) +static inline __u64 __arch_swab64 (__u64 val) {union {struct {__u32 a,b; } s;
@@ -51,20 +61,8 @@ static inline __u64 ___arch__swab64(__u64 val) w.s.a =___arch__swab32 (v.s.b); return w.u; } +#define HAVE_ARCH_SWAB64 -#define __arch__swab64 (x) ___arch__swab64(x) -#define __arch__swab32 (x) ___arch__swab32(x) -#define __arch__swab16 (x) ___arch__swab16(x) - -#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) -# define __BYTEORDER_HAS_U64__ -# define __SWAB_64_THRU_32__ -#endif - -#ifdef __LITTLE_ENDIAN__ -#include <linux/byteorder/little_endian.h> -#else -#include <linux/byteorder/big_endian.h> -#endif +#include <linux/byteorder.h> #endif /* __ASM_SH_BYTEORDER_H */
include/asm-sparc/byteorder.h +8 -14
@@ -4,15 +4,14 @@#include <asm/types.h> #include <asm/asi.h> -#ifdef __GNUC__ +#define __BIG_ENDIAN#ifdef CONFIG_SPARC32 #define __SWAB_64_THRU_32__#endif #ifdef CONFIG_SPARC64 - -static inline __u16 ___arch__swab16p(const __u16 *addr) +static inline __u16 __arch_swab16p (const __u16 *addr) {__u16 ret;
@@ -21,8 +20,9 @@ static inline __u16 ___arch__swab16p(const __u16 *addr) : "r" (addr), "i" (ASI_PL));return ret; } +#define HAVE_ARCH_SWAB16P -static inline __u32 ___arch__swab32p (const __u32 *addr) +static inline __u32 __arch_swab32p (const __u32 *addr) {__u32 ret;
@@ -31,8 +31,9 @@ static inline __u32 ___arch__swab32p(const __u32 *addr) : "r" (addr), "i" (ASI_PL));return ret; } +#define HAVE_ARCH_SWAB32P -static inline __u64 ___arch__swab64p (const __u64 *addr) +static inline __u64 __arch_swab64p (const __u64 *addr) {__u64 ret;
@@ -41,17 +42,10 @@ static inline __u64 ___arch__swab64p(const __u64 *addr) : "r" (addr), "i" (ASI_PL));return ret; } - -#define __arch__swab16p (x) ___arch__swab16p(x) -#define __arch__swab32p (x) ___arch__swab32p(x) -#define __arch__swab64p (x) ___arch__swab64p(x) +#define HAVE_ARCH_SWAB64P #endif /* CONFIG_SPARC64 */ -#define __BYTEORDER_HAS_U64__ - -#endif - -#include <linux/byteorder/big_endian.h> +#include <linux/byteorder.h> #endif /* _SPARC_BYTEORDER_H */
include/asm-x86/byteorder.h +27 -42
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include/asm-xtensa/byteorder.h +15 -17
@@ -14,7 +14,17 @@#include <asm/types.h> #include <linux/compiler.h> -static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) +#ifdef __XTENSA_EL__ +# define __LITTLE_ENDIAN +#elif defined(__XTENSA_EB__) +# define __BIG_ENDIAN +#else +# error processor byte order undefined! +#endif + +#define __SWAB_64_THRU_32__ + +static inline __attribute_const__ __u32 __arch_swab32(__u32 x) {__u32 res;/* instruction sequence from Xtensa ISA release 2/2000 */
@@ -28,8 +38,9 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) );return res; } +#define HAVE_ARCH_SWAB32 -static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x) +static inline __attribute_const__ __u16 __arch_swab16(__u16 x) {/* Given that 'short' values are signed (i.e., can be negative), * we cannot assume that the upper 16-bits of the register are
@@ -62,21 +73,8 @@ static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x) return res; } +#define HAVE_ARCH_SWAB16 -#define __arch__swab32 (x) ___arch__swab32(x) -#define __arch__swab16 (x) ___arch__swab16(x) - -#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) -# define __BYTEORDER_HAS_U64__ -# define __SWAB_64_THRU_32__ -#endif - -#ifdef __XTENSA_EL__ -# include <linux/byteorder/little_endian.h> -#elif defined(__XTENSA_EB__) -# include <linux/byteorder/big_endian.h> -#else -# error processor byte order undefined! -#endif +#include <linux/byteorder.h> #endif /* _XTENSA_BYTEORDER_H */
Signature · 1 line
1.5.6.2.393.g45096