Add proper SPD definitions for DDR1/2/3

PATCH New Kumar Gala 2 participants 19 messages Aug 12, 2008

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Kumar Gala

author

2008-08-12 16:06 UTC #0 lore raw

PATCH 1/14 Add proper SPD definitions for DDR1/2/3

From: James Yang <[email protected]>

Also added a few helper functions for DDR1 & DDR2 to print SPD info and verify the checksum.

Signed-off-by Kumar Gala <[email protected]>

---
 common/Makefile   |    1 +
 common/ddr_spd.c  |  498 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 include/ddr_spd.h |  249 ++++++++++++++++++++++++++
 3 files changed, 748 insertions(+), 0 deletions(-)
 create mode 100644 common/ddr_spd.c
 create mode 100644 include/ddr_spd.h

common/Makefile +1 -0

index 4287108..3ea4abf 100644
@@ -144,6 +144,7 @@ COBJS-y += cmd_mac.o
 COBJS-$(CONFIG_CMD_MFSL) += cmd_mfsl.o
 COBJS-$(CONFIG_MP) += cmd_mp.o
 COBJS-$(CONFIG_CMD_SF) += cmd_sf.o
+COBJS-$(CONFIG_DDR_SPD) += ddr_spd.o
 
 COBJS	:= $(COBJS-y)
 SRCS	:= $(AOBJS:.o=.S) $(COBJS:.o=.c)

common/ddr_spd.c new file +498 -0

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include/ddr_spd.h new file +249 -0

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Signature · 1 line

1.5.5.1

Kumar Gala

author

2008-08-12 16:06 UTC #1 lore raw

PATCH 2/14 FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.

From: James Yang <[email protected]>

Signed-off-by James Yang <[email protected]>

Signed-off-by Jon Loeliger <[email protected]>

Signed-off-by Becky Bruce <[email protected]>

Signed-off-by Ed Swarthout <[email protected]>

Signed-off-by Kumar Gala <[email protected]>

---
 cpu/mpc85xx/Makefile               |    9 +
 cpu/mpc86xx/Makefile               |    4 +
 cpu/mpc8xxx/Makefile               |   30 +
 cpu/mpc8xxx/common_timing_params.h |   54 +
 cpu/mpc8xxx/ddr2_dimm_params.h     |   99 ++
 cpu/mpc8xxx/fsl_ddr1.c             |  383 ++++++
 cpu/mpc8xxx/fsl_ddr2.c             |  384 ++++++
 cpu/mpc8xxx/fsl_ddr_sdram.c        | 2537 ++++++++++++++++++++++++++++++++++++
 cpu/mpc8xxx/fsl_ddr_sdram.h        |   87 ++
 cpu/mpc8xxx/fsl_memctrl.h          |   48 +
 cpu/mpc8xxx/memctl_options.h       |   94 ++
 11 files changed, 3729 insertions(+), 0 deletions(-)
 create mode 100644 cpu/mpc8xxx/Makefile
 create mode 100644 cpu/mpc8xxx/common_timing_params.h
 create mode 100644 cpu/mpc8xxx/ddr2_dimm_params.h
 create mode 100644 cpu/mpc8xxx/fsl_ddr1.c
 create mode 100644 cpu/mpc8xxx/fsl_ddr2.c
 create mode 100644 cpu/mpc8xxx/fsl_ddr_sdram.c
 create mode 100644 cpu/mpc8xxx/fsl_ddr_sdram.h
 create mode 100644 cpu/mpc8xxx/fsl_memctrl.h
 create mode 100644 cpu/mpc8xxx/memctl_options.h

cpu/mpc85xx/Makefile +9 -0

index adbc585..c180dbd 100644
@@ -33,6 +33,15 @@ SOBJS-$(CONFIG_MP) += release.o
 SOBJS	= $(SOBJS-y)
 COBJS-$(CONFIG_MP) += mp.o
 COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
+
+ifneq ($(CONFIG_FSL_DDR3),y)
+ifneq ($(CONFIG_FSL_DDR2),y)
+ifneq ($(CONFIG_FSL_DDR1),y)
+COBJS-y	+= spd_sdram.o
+endif
+endif
+endif
+
 COBJS	= traps.o cpu.o cpu_init.o speed.o interrupts.o tlb.o \
 	  pci.o serial_scc.o commproc.o ether_fcc.o spd_sdram.o qe_io.o \
 	  $(COBJS-y)

cpu/mpc86xx/Makefile +4 -0

index 537f62a..4227053 100644
@@ -40,6 +40,10 @@ COBJS-y	+= spd_sdram.o
 
 COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
 
+ifneq ($(CONFIG_FSL_DDR2),y)
+COBJS-y	+= spd_sdram.o
+endif
+
 SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS-y))
 START	:= $(addprefix $(obj),$(START))

cpu/mpc8xxx/Makefile new file +30 -0

new file mode 100644
index 0000000..30f81ff
@@ -0,0 +1,30 @@
+#
+# Copyright 2008 Freescale Semiconductor, Inc.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# Version 2 as published by the Free Software Foundation.
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)libmpc8xxx.a
+
+COBJS-$(CONFIG_FSL_DDR1)	+= fsl_ddr_sdram.o
+COBJS-$(CONFIG_FSL_DDR1)	+= fsl_ddr1.o
+
+COBJS-$(CONFIG_FSL_DDR2)	+= fsl_ddr_sdram.o
+COBJS-$(CONFIG_FSL_DDR2)	+= fsl_ddr2.o
+
+
+SRCS	:= $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
+
+all:	$(obj).depend $(LIB)
+
+$(LIB):	$(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend

cpu/mpc8xxx/common_timing_params.h new file +54 -0

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cpu/mpc8xxx/ddr2_dimm_params.h new file +99 -0

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cpu/mpc8xxx/fsl_ddr1.c new file +383 -0

383 lines not on this page · raw message

cpu/mpc8xxx/fsl_ddr2.c new file +384 -0

384 lines not on this page · raw message

cpu/mpc8xxx/fsl_ddr_sdram.c new file +2537 -0

2,025 lines not on this page · raw message

cpu/mpc8xxx/fsl_ddr_sdram.h new file +87 -0

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cpu/mpc8xxx/fsl_memctrl.h new file +48 -0

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cpu/mpc8xxx/memctl_options.h new file +94 -0

94 lines not on this page · raw message

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1.5.5.1

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Kumar Gala

author

2008-08-12 16:06 UTC #2 lore raw

PATCH 3/14 FSL DDR: Add interactive DDR config support

Provide a mechanism to allow interactive configuration of DDR params. This is useful when trying to test various DDR settings to determine optimal configuration values for a given board.

Signed-off-by James Yang <[email protected]>

Signed-off-by Jon Loeliger <[email protected]>

Signed-off-by Kumar Gala <[email protected]>

---
 cpu/mpc8xxx/Makefile              |    1 +
 cpu/mpc8xxx/fsl_ddr_interactive.c | 1280 +++++++++++++++++++++++++++++++++++++
 cpu/mpc8xxx/fsl_ddr_sdram.c       |   10 +
 cpu/mpc8xxx/fsl_ddr_sdram.h       |    3 +
 4 files changed, 1294 insertions(+), 0 deletions(-)
 create mode 100644 cpu/mpc8xxx/fsl_ddr_interactive.c

cpu/mpc8xxx/Makefile +1 -0

index 30f81ff..0ceac5b 100644
@@ -10,6 +10,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)libmpc8xxx.a
 
+COBJS-$(CONFIG_FSL_DDR_INTERACTIVE)	+= fsl_ddr_interactive.o
 COBJS-$(CONFIG_FSL_DDR1)	+= fsl_ddr_sdram.o
 COBJS-$(CONFIG_FSL_DDR1)	+= fsl_ddr1.o

cpu/mpc8xxx/fsl_ddr_interactive.c new file +1280 -0

1,280 lines not on this page · raw message

cpu/mpc8xxx/fsl_ddr_sdram.c +10 -0

index 0c558a5..a6fca88 100644
@@ -2471,6 +2471,16 @@ phys_size_t fsl_ddr_sdram(void)
 	 */
 	total_memory = fsl_ddr_sdram_compute(&info, STEP_GET_SPD);
 
+#ifdef CONFIG_FSL_DDR_INTERACTIVE
+	/*
+	 * The presence of the environment variable "ddrsetup"
+	 * causes the interactive DDR setup prompt to appear.
+	 */
+	if (getenv("ddrsetup")) {
+		total_memory = fsl_ddr_interactive(&info);
+	}
+#endif
+
 	/*
 	 * Check for memory controller interleaving.
 	 */

cpu/mpc8xxx/fsl_ddr_sdram.h +3 -0

index 57398c6..c0c4d6b 100644
@@ -54,6 +54,9 @@ typedef struct {
 
 
 extern phys_size_t
+fsl_ddr_interactive(fsl_ddr_sdram_info_t *pinfo);
+
+extern phys_size_t
 fsl_ddr_sdram_compute(fsl_ddr_sdram_info_t *pinfo,
 				  unsigned int start_step);

Signature · 1 line

1.5.5.1

Kumar Gala

author

2008-08-12 16:06 UTC #3 lore raw

PATCH 4/14 FSL DDR: Provide a generic fsl_ddr_sdram_set_lawbar()

Make fsl_ddr_sdram_set_lawbar() a weak function to allow board code to override if desired.

Signed-off-by Kumar Gala <[email protected]>

---
 drivers/misc/fsl_law.c |   87 ++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 87 insertions(+), 0 deletions(-)

drivers/misc/fsl_law.c +87 -0

index 48ece4f..37af297 100644
@@ -121,6 +121,93 @@ void print_laws(void)
 	return;
 }
 
+#if defined(CONFIG_FSL_DDR1) || \
+    defined(CONFIG_FSL_DDR2) || \
+    defined(CONFIG_FSL_DDR3)
+#include <../cpu/mpc8xxx/fsl_ddr_sdram.h>
+
+/* use up to 2 LAWs for DDR, used the last available LAWs */
+int __set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
+{
+	u64 start_align, law_sz;
+	int law_sz_enc;
+
+	if (start == 0)
+		start_align = 1ull << (LAW_SIZE_32G + 1);
+	else
+		start_align = 1ull << (ffs64(start) - 1);
+	law_sz = min(start_align, sz);
+	law_sz_enc = __ilog2_u64(law_sz) - 1;
+
+	if (set_last_law(start, law_sz_enc, id) < 0)
+		return -1;
+
+	/* do we still have anything to map */
+	sz = sz - law_sz;
+	if (sz) {
+		start += law_sz;
+
+		start_align = 1ull << (ffs64(start) - 1);
+		law_sz = min(start_align, sz);
+		law_sz_enc = __ilog2_u64(law_sz) - 1;
+
+		if (set_last_law(start, law_sz_enc, id) < 0)
+			return -1;
+	} else {
+		return 0;
+	}
+
+	/* do we still have anything to map */
+	sz = sz - law_sz;
+	if (sz)
+		return 1;
+
+	return 0;
+}
+
+void
+__fsl_ddr_sdram_set_lawbar(const common_timing_params_t *memctl_common_params,
+			   unsigned int memctl_interleaved,
+			   unsigned int ctrl_num)
+{
+	/*
+	 * If no DIMMs on this controller, do not proceed any further.
+	 */
+	if (!memctl_common_params->ndimms_present) {
+		return;
+	}
+
+	if (ctrl_num == 0) {
+		/*
+		 * Set up LAW for DDR controller 1 space.
+		 */
+		unsigned int lawbar1_target_id = memctl_interleaved
+			? LAW_TRGT_IF_DDR_INTRLV : LAW_TRGT_IF_DDR_1;
+
+		if (__set_ddr_laws(memctl_common_params->base_address,
+				memctl_common_params->total_mem,
+				lawbar1_target_id) < 0) {
+			printf("ERROR\n");
+			return ;
+		}
+	} else if (ctrl_num == 1) {
+		if (__set_ddr_laws(memctl_common_params->base_address,
+				memctl_common_params->total_mem,
+				LAW_TRGT_IF_DDR_2) < 0) {
+			printf("ERROR\n");
+			return ;
+		}
+	} else {
+		printf("unexpected controller number %u in fsl_ddr_sdram_set_lawbar()\n", ctrl_num);
+	}
+}
+
+__attribute__((weak, alias("__fsl_ddr_sdram_set_lawbar"))) void
+fsl_ddr_sdram_set_lawbar(const common_timing_params_t *memctl_common_params,
+			 unsigned int memctl_interleaved,
+			 unsigned int ctrl_num);
+#endif
+
 void init_laws(void)
 {
 	int i;

Signature · 1 line

1.5.5.1

Kumar Gala

author

2008-08-12 16:06 UTC #4 lore raw

PATCH 5/14 FSL DDR: Add e500 TLB helper for DDR code

Provide a helper function that board code can call to map TLBs when setting up DDR.

Signed-off-by Kumar Gala <[email protected]>

---
 cpu/mpc85xx/tlb.c     |   63 +++++++++++++++++++++++++++++++++++++++++++++++++
 include/asm-ppc/mmu.h |    1 +
 2 files changed, 64 insertions(+), 0 deletions(-)

cpu/mpc85xx/tlb.c +63 -0

index 3d15d50..63f34e6 100644
@@ -90,3 +90,66 @@ void init_tlbs(void)
 
 	return ;
 }
+
+unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg)
+{
+	unsigned int tlb_size;
+	unsigned int ram_tlb_index;
+	unsigned int ram_tlb_address;
+
+	/*
+	 * Determine size of each TLB1 entry.
+	 */
+	switch (memsize_in_meg) {
+	case 16:
+	case 32:
+		tlb_size = BOOKE_PAGESZ_16M;
+		break;
+	case 64:
+	case 128:
+		tlb_size = BOOKE_PAGESZ_64M;
+		break;
+	case 256:
+	case 512:
+		tlb_size = BOOKE_PAGESZ_256M;
+		break;
+	case 1024:
+	case 2048:
+		if (PVR_VER(get_pvr()) > PVR_VER(PVR_85xx))
+			tlb_size = BOOKE_PAGESZ_1G;
+		else
+			tlb_size = BOOKE_PAGESZ_256M;
+		break;
+	default:
+		puts("DDR: only 16M,32M,64M,128M,256M,512M,1G and 2G are supported.\n");
+
+		/*
+		 * The memory was not able to be mapped.
+		 * Default to a small size.
+		 */
+		tlb_size = BOOKE_PAGESZ_64M;
+		memsize_in_meg = 64;
+		break;
+	}
+
+	/*
+	 * Configure DDR TLB1 entries.
+	 * Starting at TLB1 8, use no more than 8 TLB1 entries.
+	 */
+	ram_tlb_index = 8;
+	ram_tlb_address = (unsigned int)CFG_DDR_SDRAM_BASE;
+	while (ram_tlb_address < (memsize_in_meg * 1024 * 1024)
+	      && ram_tlb_index < 16) {
+		set_tlb(1, ram_tlb_address, ram_tlb_address,
+			MAS3_SX|MAS3_SW|MAS3_SR, 0,
+			0, ram_tlb_index, tlb_size, 1);
+
+		ram_tlb_address += (0x1000 << ((tlb_size - 1) * 2));
+		ram_tlb_index++;
+	}
+
+	/*
+	 * Confirm that the requested amount of memory was mapped.
+	 */
+	return memsize_in_meg;
+}

include/asm-ppc/mmu.h +1 -0

index 050a7b6..8975e6c 100644
@@ -431,6 +431,7 @@ extern void set_tlb(u8 tlb, u32 epn, u64 rpn,
 extern void disable_tlb(u8 esel);
 extern void invalidate_tlb(u8 tlb);
 extern void init_tlbs(void);
+extern unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg);
 
 #define SET_TLB_ENTRY(_tlb, _epn, _rpn, _perms, _wimge, _ts, _esel, _sz, _iprot) \
 	{ .tlb = _tlb, .epn = _epn, .rpn = _rpn, .perms = _perms, \

Signature · 1 line

1.5.5.1

Kumar Gala

author

2008-08-12 16:06 UTC #5 lore raw

PATCH 6/14 FSL DDR: Convert MPC8641HPCN to new DDR code.

From: Jon Loeliger <[email protected]>

Signed-off-by Jon Loeliger <[email protected]>

Signed-off-by Kumar Gala <[email protected]>

---
 Makefile                                  |    3 +
 board/freescale/mpc8641hpcn/Makefile      |    8 +-
 board/freescale/mpc8641hpcn/ddr.c         |  262 +++++++++++++++++++++++++++++
 board/freescale/mpc8641hpcn/mpc8641hpcn.c |    5 +-
 cpu/mpc86xx/Makefile                      |    1 -
 include/configs/MPC8641HPCN.h             |  117 +++++++------
 6 files changed, 335 insertions(+), 61 deletions(-)
 create mode 100644 board/freescale/mpc8641hpcn/ddr.c

Makefile +3 -0

index 082b08e..c0c359f 100644
@@ -237,6 +237,9 @@ endif
 ifeq ($(CPU),mpc85xx)
 LIBS += drivers/qe/qe.a
 endif
+ifeq ($(CPU),mpc86xx)
+LIBS += cpu/mpc8xxx/libmpc8xxx.a
+endif
 LIBS += drivers/rtc/librtc.a
 LIBS += drivers/serial/libserial.a
 LIBS += drivers/usb/libusb.a

board/freescale/mpc8641hpcn/Makefile +5 -3

index c096e15..27d20a0 100644
@@ -25,10 +25,12 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-COBJS	:= $(BOARD).o law.o
+COBJS-y	+= $(BOARD).o
+COBJS-y	+= law.o
+COBJS-y	+= ddr.o
 
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
+SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
 SOBJS	:= $(addprefix $(obj),$(SOBJS))
 
 $(LIB):	$(obj).depend $(OBJS) $(SOBJS)

board/freescale/mpc8641hpcn/ddr.c new file +262 -0

262 lines not on this page · raw message

board/freescale/mpc8641hpcn/mpc8641hpcn.c +2 -3

index db46953..96bb908 100644
@@ -25,18 +25,17 @@
 #include <asm/processor.h>
 #include <asm/immap_86xx.h>
 #include <asm/immap_fsl_pci.h>
-#include <spd_sdram.h>
 #include <asm/io.h>
 #include <libfdt.h>
 #include <fdt_support.h>
 
 #include "../common/pixis.h"
+#include "../cpu/mpc8xxx/fsl_ddr_sdram.h"
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 extern void ddr_enable_ecc(unsigned int dram_size);
 #endif
 
-void sdram_init(void);
 long int fixed_sdram(void);

@@ -61,7 +60,7 @@ initdram(int board_type)
 	long dram_size = 0;
 
 #if defined(CONFIG_SPD_EEPROM)
-	dram_size = spd_sdram();
+	dram_size = fsl_ddr_sdram();
 #else
 	dram_size = fixed_sdram();
 #endif

cpu/mpc86xx/Makefile +0 -1

index 4227053..454c728 100644
@@ -36,7 +36,6 @@ COBJS-y	+= cpu.o
 COBJS-y	+= cpu_init.o
 COBJS-y	+= speed.o
 COBJS-y	+= interrupts.o
-COBJS-y	+= spd_sdram.o
 
 COBJS-$(CONFIG_OF_LIBFDT) += fdt.o

include/configs/MPC8641HPCN.h +62 ~~-53~~

134 lines not on this page · raw message

Signature · 1 line

1.5.5.1

Kumar Gala

author

2008-08-12 16:06 UTC #6 lore raw

PATCH 7/14 FSL DDR: Convert MPC8610HPCD to new DDR code.

From: Jon Loeliger <[email protected]>

Signed-off-by Jon Loeliger <[email protected]>

Signed-off-by Kumar Gala <[email protected]>

---
 board/freescale/mpc8610hpcd/Makefile      |   10 +-
 board/freescale/mpc8610hpcd/ddr.c         |  254 +++++++++++++++++++++++++++++
 board/freescale/mpc8610hpcd/mpc8610hpcd.c |    3 +-
 include/configs/MPC8610HPCD.h             |   50 ++++--
 4 files changed, 295 insertions(+), 22 deletions(-)
 create mode 100644 board/freescale/mpc8610hpcd/ddr.c

board/freescale/mpc8610hpcd/Makefile +5 -5

index a457c32..dc97c33 100644
@@ -23,14 +23,14 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-COBJS	:= $(BOARD).o law.o
+COBJS-y	+= $(BOARD).o
+COBJS-y	+= ddr.o
+COBJS-y	+= law.o
 
 COBJS-${CONFIG_FSL_DIU_FB}	+= mpc8610hpcd_diu.o
 
-COBJS	+= ${COBJS-y}
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
+SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
 SOBJS	:= $(addprefix $(obj),$(SOBJS))
 
 $(LIB):	$(obj).depend $(OBJS) $(SOBJS)

board/freescale/mpc8610hpcd/ddr.c new file +254 -0

254 lines not on this page · raw message

board/freescale/mpc8610hpcd/mpc8610hpcd.c +2 -1

index ff1b892..34f845e 100644
@@ -33,6 +33,7 @@
 #include <spd_sdram.h>
 
 #include "../common/pixis.h"
+#include "../cpu/mpc8xxx/fsl_ddr_sdram.h"
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 extern void ddr_enable_ecc(unsigned int dram_size);

@@ -122,7 +123,7 @@ initdram(int board_type)
 	long dram_size = 0;
 
 #if defined(CONFIG_SPD_EEPROM)
-	dram_size = spd_sdram();
+	dram_size = fsl_ddr_sdram();
 #else
 	dram_size = fixed_sdram();
 #endif

include/configs/MPC8610HPCD.h +34 ~~-16~~

91 lines not on this page · raw message

Signature · 1 line

1.5.5.1

Kumar Gala

author

2008-08-12 16:06 UTC #7 lore raw

PATCH 8/14 FSL DDR: Convert MPC8544DS to new DDR code.

Signed-off-by Kumar Gala <[email protected]>

---
 Makefile                              |    1 +
 board/freescale/mpc8544ds/Makefile    |    9 +-
 board/freescale/mpc8544ds/ddr.c       |  268 +++++++++++++++++++++++++++++++++
 board/freescale/mpc8544ds/mpc8544ds.c |   11 +-
 cpu/mpc85xx/Makefile                  |    2 +-
 include/configs/MPC8544DS.h           |   52 +++++--
 6 files changed, 324 insertions(+), 19 deletions(-)
 create mode 100644 board/freescale/mpc8544ds/ddr.c

Makefile +1 -0

index c0c359f..138dffb 100644
@@ -236,6 +236,7 @@ LIBS += drivers/qe/qe.a
 endif
 ifeq ($(CPU),mpc85xx)
 LIBS += drivers/qe/qe.a
+LIBS += cpu/mpc8xxx/libmpc8xxx.a
 endif
 ifeq ($(CPU),mpc86xx)
 LIBS += cpu/mpc8xxx/libmpc8xxx.a

board/freescale/mpc8544ds/Makefile +6 -3

index 3a5ea00..3997994 100644
@@ -26,10 +26,13 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-COBJS	:= $(BOARD).o law.o tlb.o
+COBJS-y	+= $(BOARD).o
+COBJS-y	+= ddr.o
+COBJS-y	+= law.o
+COBJS-y	+= tlb.o
 
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
+SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
 SOBJS	:= $(addprefix $(obj),$(SOBJS))
 
 $(LIB):	$(obj).depend $(OBJS) $(SOBJS)

board/freescale/mpc8544ds/ddr.c new file +268 -0

268 lines not on this page · raw message

board/freescale/mpc8544ds/mpc8544ds.c +7 -4

index c39ce11..213539e 100644
@@ -24,22 +24,21 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/processor.h>
+#include <asm/mmu.h>
 #include <asm/immap_85xx.h>
 #include <asm/immap_fsl_pci.h>
 #include <asm/io.h>
-#include <spd_sdram.h>
 #include <miiphy.h>
 #include <libfdt.h>
 #include <fdt_support.h>
 
 #include "../common/pixis.h"
+#include "../cpu/mpc8xxx/fsl_ddr_sdram.h"
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 extern void ddr_enable_ecc(unsigned int dram_size);
 #endif
 
-void sdram_init(void);
-
 int checkboard (void)
 {
 	volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);

@@ -69,7 +68,11 @@ initdram(int board_type)
 
 	puts("Initializing\n");
 
-	dram_size = spd_sdram();
+	dram_size = fsl_ddr_sdram();
+
+	dram_size = setup_ddr_tlbs(dram_size / 0x100000);
+
+	dram_size *= 0x100000;
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 	/*

cpu/mpc85xx/Makefile +1 -1

index c180dbd..d51a6dd 100644
@@ -43,7 +43,7 @@ endif
 endif
 
 COBJS	= traps.o cpu.o cpu_init.o speed.o interrupts.o tlb.o \
-	  pci.o serial_scc.o commproc.o ether_fcc.o spd_sdram.o qe_io.o \
+	  pci.o serial_scc.o commproc.o ether_fcc.o qe_io.o \
 	  $(COBJS-y)
 
 SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)

include/configs/MPC8544DS.h +41 ~~-11~~

76 lines not on this page · raw message

Signature · 1 line

1.5.5.1

Kumar Gala

author

2008-08-12 16:06 UTC #8 lore raw

PATCH 9/14 FSL DDR: Convert MPC8540ADS to new DDR code.

Signed-off-by Kumar Gala <[email protected]>

---
 board/freescale/mpc8540ads/Makefile     |   13 +-
 board/freescale/mpc8540ads/ddr.c        |  296 +++++++++++++++++++++++++++++++
 board/freescale/mpc8540ads/mpc8540ads.c |   16 ++-
 include/configs/MPC8540ADS.h            |   70 +++++---
 4 files changed, 360 insertions(+), 35 deletions(-)
 create mode 100644 board/freescale/mpc8540ads/ddr.c

board/freescale/mpc8540ads/Makefile +8 -5

index 2d71cbc..4c6da4d 100644
@@ -25,11 +25,14 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-COBJS	:= $(BOARD).o law.o tlb.o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-SOBJS	:= $(addprefix $(obj),$(SOBJS))
+COBJS-y	+= $(BOARD).o
+COBJS-y	+= ddr.o
+COBJS-y	+= law.o
+COBJS-y	+= tlb.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
+SOBJS	:= $(addprefix $(obj),$(SOBJS-y))
 
 $(LIB):	$(obj).depend $(OBJS) $(SOBJS)
 	$(AR) $(ARFLAGS) $@ $(OBJS)

board/freescale/mpc8540ads/ddr.c new file +296 -0

296 lines not on this page · raw message

board/freescale/mpc8540ads/mpc8540ads.c +12 -4

index 4f068cc..926d9a6 100644
@@ -28,11 +28,13 @@
 #include <common.h>
 #include <pci.h>
 #include <asm/processor.h>
+#include <asm/mmu.h>
 #include <asm/immap_85xx.h>
-#include <spd_sdram.h>
 #include <libfdt.h>
 #include <fdt_support.h>
 
+#include "../cpu/mpc8xxx/fsl_ddr_sdram.h"
+
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 extern void ddr_enable_ecc(unsigned int dram_size);
 #endif

@@ -82,10 +84,16 @@ initdram(int board_type)
 	}
 #endif
 
-#if defined(CONFIG_SPD_EEPROM)
-	dram_size = spd_sdram ();
+#ifdef CONFIG_SPD_EEPROM
+	dram_size = fsl_ddr_sdram();
+	printf("dram_size = %u\n", dram_size);
+
+	dram_size = setup_ddr_tlbs(dram_size / 0x100000);
+	printf("dram_size = %u after setup_ddr_tlbs\n", dram_size);
+
+	dram_size *= 0x100000;
 #else
-	dram_size = fixed_sdram ();
+	dram_size = fixed_sdram();
 #endif
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)

include/configs/MPC8540ADS.h +43 ~~-25~~

84 lines not on this page · raw message

Signature · 1 line

1.5.5.1

Kumar Gala

author

2008-08-12 16:06 UTC #9 lore raw

PATCH 10/14 FSL DDR: Convert MPC8560ADS to new DDR code.

From: Jon Loeliger <[email protected]>

Signed-off-by Jon Loeliger <[email protected]>

Signed-off-by Kumar Gala <[email protected]>

---
 board/freescale/mpc8560ads/Makefile     |   13 +-
 board/freescale/mpc8560ads/ddr.c        |  296 +++++++++++++++++++++++++++++++
 board/freescale/mpc8560ads/mpc8560ads.c |   15 ++-
 include/configs/MPC8560ADS.h            |   71 +++++---
 4 files changed, 362 insertions(+), 33 deletions(-)
 create mode 100644 board/freescale/mpc8560ads/ddr.c

board/freescale/mpc8560ads/Makefile +8 -5

index 2d71cbc..67dbdeb 100644
@@ -25,11 +25,14 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-COBJS	:= $(BOARD).o law.o tlb.o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-SOBJS	:= $(addprefix $(obj),$(SOBJS))
+COBJS-y	+= $(BOARD).o
+COBJS-y	+= ddr.o
+COBJS-y	+= law.o
+COBJS-y	+= tlb.o
+
+SRCS	:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
+SOBJS	:= $(addprefix $(obj),$(SOBJS-y))
 
 $(LIB):	$(obj).depend $(OBJS) $(SOBJS)
 	$(AR) $(ARFLAGS) $@ $(OBJS)

board/freescale/mpc8560ads/ddr.c new file +296 -0

296 lines not on this page · raw message

board/freescale/mpc8560ads/mpc8560ads.c +12 -3

index 2c14a88..9b0c854 100644
@@ -28,6 +28,7 @@
 #include <common.h>
 #include <pci.h>
 #include <asm/processor.h>
+#include <asm/mmu.h>
 #include <asm/immap_85xx.h>
 #include <ioports.h>
 #include <spd_sdram.h>

@@ -35,6 +36,8 @@
 #include <libfdt.h>
 #include <fdt_support.h>
 
+#include "../cpu/mpc8xxx/fsl_ddr_sdram.h"
+
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 extern void ddr_enable_ecc(unsigned int dram_size);
 #endif

@@ -285,10 +288,16 @@ initdram(int board_type)
 	}
 #endif
 
-#if defined(CONFIG_SPD_EEPROM)
-	dram_size = spd_sdram ();
+#ifdef CONFIG_SPD_EEPROM
+	dram_size = fsl_ddr_sdram();
+	printf("dram_size = %u\n", dram_size);
+
+	dram_size = setup_ddr_tlbs(dram_size / 0x100000);
+	printf("dram_size = %u after setup_ddr_tlbs\n", dram_size);
+
+	dram_size *= 0x100000;
 #else
-	dram_size = fixed_sdram ();
+	dram_size = fixed_sdram();
 #endif
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)

include/configs/MPC8560ADS.h +46 ~~-25~~

93 lines not on this page · raw message

Signature · 1 line

1.5.5.1

Kumar Gala

author

2008-08-12 16:06 UTC #10 lore raw

PATCH 11/14 FSL DDR: Convert MPC8555ADS to new DDR code.

From: Jon Loeliger <[email protected]>

Signed-off-by Jon Loeliger <[email protected]>

Signed-off-by Kumar Gala <[email protected]>

---
 board/freescale/mpc8555cds/Makefile     |    1 +
 board/freescale/mpc8555cds/ddr.c        |  317 +++++++++++++++++++++++++++++++
 board/freescale/mpc8555cds/mpc8555cds.c |   12 +-
 include/configs/MPC8555CDS.h            |   46 ++++-
 4 files changed, 365 insertions(+), 11 deletions(-)
 create mode 100644 board/freescale/mpc8555cds/ddr.c

board/freescale/mpc8555cds/Makefile +1 -0

index 98f1530..c19a527 100644
@@ -27,6 +27,7 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).a
 
 COBJS-y	+= $(BOARD).o
+COBJS-y	+= ddr.o
 COBJS-y	+= law.o
 COBJS-y	+= tlb.o

board/freescale/mpc8555cds/ddr.c new file +317 -0

317 lines not on this page · raw message

board/freescale/mpc8555cds/mpc8555cds.c +11 -1

index 9a65101..25ac0aa 100644
@@ -23,6 +23,7 @@
 #include <common.h>
 #include <pci.h>
 #include <asm/processor.h>
+#include <asm/mmu.h>
 #include <asm/immap_85xx.h>
 #include <ioports.h>
 #include <spd_sdram.h>

@@ -32,6 +33,7 @@
 #include "../common/cadmus.h"
 #include "../common/eeprom.h"
 #include "../common/via.h"
+#include "../cpu/mpc8xxx/fsl_ddr_sdram.h"
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 extern void ddr_enable_ecc(unsigned int dram_size);

@@ -261,7 +263,14 @@ initdram(int board_type)
 		udelay(200);
 	}
 #endif
-	dram_size = spd_sdram();
+
+	dram_size = fsl_ddr_sdram();
+	printf("dram_size = %u\n", dram_size);
+
+	dram_size = setup_ddr_tlbs(dram_size / 0x100000);
+	printf("dram_size = %u after setup_ddr_tlbs\n", dram_size);
+
+	dram_size *= 0x100000;
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 	/*

@@ -269,6 +278,7 @@ initdram(int board_type)
 	 */
 	ddr_enable_ecc(dram_size);
 #endif
+
 	/*
 	 * SDRAM Initialization
 	 */

include/configs/MPC8555CDS.h +36 ~~-10~~

76 lines not on this page · raw message

Signature · 1 line

1.5.5.1

Kumar Gala

author

2008-08-12 16:06 UTC #11 lore raw

PATCH 12/14 FSL DDR: Convert MPC8541CDS to new DDR code.

From: Jon Loeliger <[email protected]>

Signed-off-by Jon Loeliger <[email protected]>

Signed-off-by Kumar Gala <[email protected]>

---
 board/freescale/mpc8541cds/Makefile     |    1 +
 board/freescale/mpc8541cds/ddr.c        |  317 +++++++++++++++++++++++++++++++
 board/freescale/mpc8541cds/mpc8541cds.c |   10 +-
 include/configs/MPC8541CDS.h            |   44 ++++-
 4 files changed, 362 insertions(+), 10 deletions(-)
 create mode 100644 board/freescale/mpc8541cds/ddr.c

board/freescale/mpc8541cds/Makefile +1 -0

index 98f1530..c19a527 100644
@@ -27,6 +27,7 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).a
 
 COBJS-y	+= $(BOARD).o
+COBJS-y	+= ddr.o
 COBJS-y	+= law.o
 COBJS-y	+= tlb.o

board/freescale/mpc8541cds/ddr.c new file +317 -0

317 lines not on this page · raw message

board/freescale/mpc8541cds/mpc8541cds.c +9 -1

index 3669ba9..313111e 100644
@@ -25,6 +25,7 @@
 #include <common.h>
 #include <pci.h>
 #include <asm/processor.h>
+#include <asm/mmu.h>
 #include <asm/immap_85xx.h>
 #include <ioports.h>
 #include <spd_sdram.h>

@@ -34,6 +35,7 @@
 #include "../common/cadmus.h"
 #include "../common/eeprom.h"
 #include "../common/via.h"
+#include "../cpu/mpc8xxx/fsl_ddr_sdram.h"
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 extern void ddr_enable_ecc(unsigned int dram_size);

@@ -263,7 +265,13 @@ initdram(int board_type)
 		udelay(200);
 	}
 #endif
-	dram_size = spd_sdram();
+	dram_size = fsl_ddr_sdram();
+	printf("dram_size = %u\n", dram_size);
+
+	dram_size = setup_ddr_tlbs(dram_size / 0x100000);
+	printf("dram_size = %u after setup_ddr_tlbs\n", dram_size);
+
+	dram_size *= 0x100000;
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 	/*

include/configs/MPC8541CDS.h +35 -9

71 lines not on this page · raw message

Signature · 1 line

1.5.5.1

Kumar Gala

author

2008-08-12 16:06 UTC #12 lore raw

PATCH 13/14 FSL DDR: Convert MPC8568MDS to new DDR code.

From: Jon Loeliger <[email protected]>

Signed-off-by Jon Loeliger <[email protected]>

Signed-off-by Kumar Gala <[email protected]>

---
 board/freescale/mpc8568mds/Makefile     |   14 +-
 board/freescale/mpc8568mds/ddr.c        |  268 +++++++++++++++++++++++++++++++
 board/freescale/mpc8568mds/mpc8568mds.c |   12 ++-
 include/configs/MPC8568MDS.h            |   49 +++++--
 4 files changed, 326 insertions(+), 17 deletions(-)
 create mode 100644 board/freescale/mpc8568mds/ddr.c

board/freescale/mpc8568mds/Makefile +9 -5

index ecdc4d3..d499fb3 100644
@@ -26,11 +26,15 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-COBJS	:= $(BOARD).o bcsr.o law.o tlb.o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-SOBJS	:= $(addprefix $(obj),$(SOBJS))
+COBJS-y	+= $(BOARD).o
+COBJS-y	+= bcsr.o
+COBJS-y	+= ddr.o
+COBJS-y	+= law.o
+COBJS-y	+= tlb.o
+
+SRCS	:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
+SOBJS	:= $(addprefix $(obj),$(SOBJS-y))
 
 $(LIB):	$(obj).depend $(OBJS) $(SOBJS)
 	$(AR) $(ARFLAGS) $@ $(OBJS)

board/freescale/mpc8568mds/ddr.c new file +268 -0

268 lines not on this page · raw message

board/freescale/mpc8568mds/mpc8568mds.c +11 -1

index 2ccff7d..9cc2b2d 100644
@@ -25,6 +25,7 @@
 #include <common.h>
 #include <pci.h>
 #include <asm/processor.h>
+#include <asm/mmu.h>
 #include <asm/immap_85xx.h>
 #include <asm/immap_fsl_pci.h>
 #include <spd_sdram.h>

@@ -34,6 +35,7 @@
 #include <fdt_support.h>
 
 #include "bcsr.h"
+#include "../cpu/mpc8xxx/fsl_ddr_sdram.h"
 
 const qe_iop_conf_t qe_iop_conf_tab[] = {
 	/* GETH1 */

@@ -163,7 +165,14 @@ initdram(int board_type)
 		udelay(200);
 	}
 #endif
-	dram_size = spd_sdram();
+
+	dram_size = fsl_ddr_sdram();
+	printf("dram_size = %u\n", dram_size);
+
+	dram_size = setup_ddr_tlbs(dram_size / 0x100000);
+	printf("dram_size = %u after setup_ddr_tlbs\n", dram_size);
+
+	dram_size *= 0x100000;
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 	/*

@@ -171,6 +180,7 @@ initdram(int board_type)
 	 */
 	ddr_enable_ecc(dram_size);
 #endif
+
 	/*
 	 * SDRAM Initialization
 	 */

include/configs/MPC8568MDS.h +38 ~~-11~~

76 lines not on this page · raw message

Signature · 1 line

1.5.5.1

Kumar Gala

author

2008-08-12 16:06 UTC #13 lore raw

PATCH 14/14 FSL DDR: Convert MPC8548CDS to new DDR code.

From: Jon Loeliger <[email protected]>

Signed-off-by Jon Loeliger <[email protected]>

Signed-off-by Kumar Gala <[email protected]>

---
 board/freescale/mpc8548cds/Makefile     |    1 +
 board/freescale/mpc8548cds/ddr.c        |  268 +++++++++++++++++++++++++++++++
 board/freescale/mpc8548cds/mpc8548cds.c |   12 ++-
 include/configs/MPC8548CDS.h            |   49 +++++--
 4 files changed, 318 insertions(+), 12 deletions(-)
 create mode 100644 board/freescale/mpc8548cds/ddr.c

board/freescale/mpc8548cds/Makefile +1 -0

index 98f1530..c19a527 100644
@@ -27,6 +27,7 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).a
 
 COBJS-y	+= $(BOARD).o
+COBJS-y	+= ddr.o
 COBJS-y	+= law.o
 COBJS-y	+= tlb.o

board/freescale/mpc8548cds/ddr.c new file +268 -0

268 lines not on this page · raw message

board/freescale/mpc8548cds/mpc8548cds.c +11 -1

index 0b037cc..98752b8 100644
@@ -25,6 +25,7 @@
 #include <common.h>
 #include <pci.h>
 #include <asm/processor.h>
+#include <asm/mmu.h>
 #include <asm/immap_85xx.h>
 #include <asm/immap_fsl_pci.h>
 #include <spd_sdram.h>

@@ -35,6 +36,7 @@
 #include "../common/cadmus.h"
 #include "../common/eeprom.h"
 #include "../common/via.h"
+#include "../cpu/mpc8xxx/fsl_ddr_sdram.h"
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 extern void ddr_enable_ecc(unsigned int dram_size);

@@ -111,7 +113,14 @@ initdram(int board_type)
 		udelay(200);
 	}
 #endif
-	dram_size = spd_sdram();
+
+	dram_size = fsl_ddr_sdram();
+	printf("dram_size = %u\n", dram_size);
+
+	dram_size = setup_ddr_tlbs(dram_size / 0x100000);
+	printf("dram_size = %u after setup_ddr_tlbs\n", dram_size);
+
+	dram_size *= 0x100000;
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 	/*

@@ -119,6 +128,7 @@ initdram(int board_type)
 	 */
 	ddr_enable_ecc(dram_size);
 #endif
+
 	/*
 	 * SDRAM Initialization
 	 */

include/configs/MPC8548CDS.h +38 ~~-11~~

77 lines not on this page · raw message

Signature · 1 line

1.5.5.1

Wolfgang Denk

2008-08-12 19:55 UTC #14 lore raw

PATCH 14/14 FSL DDR: Convert MPC8548CDS to new DDR code.

Dear Kumar Gala,

Quoted 11 lines · In message <[email protected]> you…

From: Jon Loeliger <[email protected]>

Signed-off-by Jon Loeliger <[email protected]>

Signed-off-by Kumar Gala <[email protected]>

---
 board/freescale/mpc8548cds/Makefile     |    1 +
 board/freescale/mpc8548cds/ddr.c        |  268 +++++++++++++++++++++++++++++++
 board/freescale/mpc8548cds/mpc8548cds.c |   12 ++-
 include/configs/MPC8548CDS.h            |   49 +++++--
 4 files changed, 318 insertions(+), 12 deletions(-)
 create mode 100644 board/freescale/mpc8548cds/ddr.c

What about converting all the other, non-FSL boards?

Does it make sense? Is there any recommendation to the board maintainers about conditions when such a conversion is recommended or should not be done?

Best regards,

Wolfgang Denk

Signature · 4 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
If at first you don't succeed, you are running about average.

Wolfgang Denk

2008-08-12 19:56 UTC #15 lore raw

PATCH 14/14 FSL DDR: Convert MPC8548CDS to new DDR code.

In reply to Kumar Gala

Dear Kumar Gala,

Quoted 11 lines · In message <[email protected]> you…

From: Jon Loeliger <[email protected]>

Signed-off-by Jon Loeliger <[email protected]>

Signed-off-by Kumar Gala <[email protected]>

---
 board/freescale/mpc8548cds/Makefile     |    1 +
 board/freescale/mpc8548cds/ddr.c        |  268 +++++++++++++++++++++++++++++++
 board/freescale/mpc8548cds/mpc8548cds.c |   12 ++-
 include/configs/MPC8548CDS.h            |   49 +++++--
 4 files changed, 318 insertions(+), 12 deletions(-)
 create mode 100644 board/freescale/mpc8548cds/ddr.c

Another question: maybe there should be a README that describes the features of this code?

Best regards,

Wolfgang Denk

Signature · 7 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Carelessly planned projects take three times longer to complete  than
expected.  Carefully  planned  projects  take  four  times  longer to
complete than expected, mostly  because  the  planners  expect  their
planning to reduce the time it takes.

Wolfgang Denk

2008-08-12 19:52 UTC #16 lore raw

PATCH 3/14 FSL DDR: Add interactive DDR config support

In reply to Kumar Gala

Dear Kumar Gala,

Quoted 7 lines · In message <[email protected]> you…

Provide a mechanism to allow interactive configuration of DDR params. This is useful when trying to test various DDR settings to determine optimal configuration values for a given board.
Signed-off-by James Yang <[email protected]>
Signed-off-by Jon Loeliger <[email protected]>
Signed-off-by Kumar Gala <[email protected]>

Quoted 7 lines

---
 cpu/mpc8xxx/Makefile              |    1 +
 cpu/mpc8xxx/fsl_ddr_interactive.c | 1280 +++++++++++++++++++++++++++++++++++++
 cpu/mpc8xxx/fsl_ddr_sdram.c       |   10 +
 cpu/mpc8xxx/fsl_ddr_sdram.h       |    3 +
 4 files changed, 1294 insertions(+), 0 deletions(-)
 create mode 100644 cpu/mpc8xxx/fsl_ddr_interactive.c

Maximum line length exceeded.

Please also check the remaining parts of this patch series.

Best regards,

Wolfgang Denk

Signature · 5 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
The one who says it cannot be done should never interrupt the one who
is doing it.

Wolfgang Denk

2008-08-12 19:05 UTC #17 lore raw

PATCH 2/14 FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.

In reply to Kumar Gala

Dear Kumar Gala,

Quoted 6 lines · In message <[email protected]> you…

Signed-off-by James Yang <[email protected]>
Signed-off-by Jon Loeliger <[email protected]>
Signed-off-by Becky Bruce <[email protected]>
Signed-off-by Ed Swarthout <[email protected]>
Signed-off-by Kumar Gala <[email protected]>

Quoted 9 lines

---
 cpu/mpc85xx/Makefile               |    9 +
 cpu/mpc86xx/Makefile               |    4 +
 cpu/mpc8xxx/Makefile               |   30 +
 cpu/mpc8xxx/common_timing_params.h |   54 +
 cpu/mpc8xxx/ddr2_dimm_params.h     |   99 ++
 cpu/mpc8xxx/fsl_ddr1.c             |  383 ++++++
 cpu/mpc8xxx/fsl_ddr2.c             |  384 ++++++
 cpu/mpc8xxx/fsl_ddr_sdram.c        | 2537 ++++++++++++++++++++++++++++++++++++

My comments will focus on this file - this is a monster of a file.

...

Quoted 16 lines

cpu/mpc8xxx/fsl_ddr_sdram.c new file +16 -0

+		/*
+		 * Find maximum tCKmin_X_ps to find slowest DIMM.
+		 */
+		tCKmin_X_ps = max(tCKmin_X_ps, dimm_params[i].tCKmin_X_ps);
+
+		/*
+		 * Find minimum tCKmax_ps to find fastest slow speed,
+		 * i.e., this is the slowest the whole system can go.
+		 */
+		tCKmax_ps = min(tCKmax_ps, dimm_params[i].tCKmax_ps);
+
+		/*
+		 * Find maximum tCKmax_ps to find slowest slow speed,
+		 * i.e., this is the slowest any dimm can go.
+		 */
+		tCKmax_max_ps = max(tCKmax_max_ps, dimm_params[i].tCKmax_ps);

cpu/mpc8xxx/fsl_ddr_sdram.c line 276

Quoted 10 lines

cpu/mpc8xxx/fsl_ddr_sdram.c new file +10 -0

+
+		/*
+		 * Find maximum tRCD_ps to find slowest ras-to-cas delay.
+		 */
+		tRCD_ps = max(tRCD_ps, dimm_params[i].tRCD_ps);
+
+		/*
+		 * Find maximum tRP_ps to find slowest row precharge time.
+		 */
+		tRP_ps = max(tRP_ps, dimm_params[i].tRP_ps);

This goes on for hundrets of lines.

Please change ALL such single-line comments into one-liners.

Also:

Quoted 67 lines

cpu/mpc8xxx/fsl_ddr_sdram.c new file +67 -0

+
+		/*
+		 * Find maximum tRAS_ps to find slowest active to
+		 * precharge time.
+		 */
+		tRAS_ps = max(tRAS_ps, dimm_params[i].tRAS_ps);
+
+		/*
+		 * Find maximum tWR_ps to find slowest write recovery time.
+		 */
+		tWR_ps = max(tWR_ps, dimm_params[i].tWR_ps);
+
+		/*
+		 * Find maximum tWTR_ps to find slowest write-to-read
+		 * command delay.
+		 */
+		tWTR_ps = max(tWTR_ps, dimm_params[i].tWTR_ps);
+
+		/*
+		 * Find maximum tRFC_ps to find slowest auto-refresh to
+		 * active/auto refresh command period.
+		 */
+		tRFC_ps = max(tRFC_ps, dimm_params[i].tRFC_ps);
+
+		/*
+		 * Find maximum tRRD_ps to find slowest row active to
+		 * row active delay.
+		 */
+		tRRD_ps = max(tRRD_ps, dimm_params[i].tRRD_ps);
+
+		/*
+		 * Find maximum tRC_ps to find slowest
+		 * active/auto-refresh time.
+		 */
+		tRC_ps = max(tRC_ps, dimm_params[i].tRC_ps);
+
+		/*
+		 * Find maximum refresh_rate_ps to find slowest refresh time.
+		 */
+		refresh_rate_ps = max(refresh_rate_ps,
+				      dimm_params[i].refresh_rate_ps);
+
+		/*
+		 * Find maximum tIS_ps to find slowest.
+		 */
+		tIS_ps = max(tIS_ps, dimm_params[i].tIS_ps);
+
+		/*
+		 * Find maximum tIH_ps to find slowest.
+		 */
+		tIH_ps = max(tIH_ps, dimm_params[i].tIH_ps);
+
+		/*
+		 * Find maximum tDS_ps to find slowest.
+		 */
+		tDS_ps = max(tDS_ps, dimm_params[i].tDS_ps);
+
+		/*
+		 * Find maximum tDH_ps to find slowest.
+		 */
+		tDH_ps = max(tDH_ps, dimm_params[i].tDH_ps);
+
+		/*
+		 * Find maximum tRTP_ps to find slowest.
+		 */
+		tRTP_ps = max(tRTP_ps, dimm_params[i].tRTP_ps);
+

cpu/mpc8xxx/fsl_ddr_sdram.c line 355

Quoted 10 lines

cpu/mpc8xxx/fsl_ddr_sdram.c new file +10 -0

+		 *
+		 * FIXME: is finding the slowest value the correct
+		 * strategy for this parameter?
+		 */
+		tDQSQ_max_ps = max(tDQSQ_max_ps, dimm_params[i].tDQSQ_max_ps);
+
+		/*
+		 * Find maximum tQHS_ps to find slowest.
+		 */
+		tQHS_ps = max(tQHS_ps, dimm_params[i].tQHS_ps);

Do we really need a "find maximum FOO to find slowest" (what?) comment for each and every of these similar lines? A single comment at the beginning of the block should do.

Quoted 5 lines

cpu/mpc8xxx/fsl_ddr_sdram.c new file +5 -0

+	/* CHECKME: */
+	if (!outpdimm->all_DIMMs_registered
+	    && !outpdimm->all_DIMMs_unbuffered) {
+		printf("ERROR:  Mix of registered buffered and unbuffered DIMMs detected!\n");
+	}

...

Quoted 5 lines

cpu/mpc8xxx/fsl_ddr_sdram.c new file +5 -0

+			if (dimm_params[i].caslat_X == temp2) {
+				if (mclk_ps >= dimm_params[i].tCKmin_X_ps) {
+					debug("CL = %u ok on DIMM %u at tCK=%u ps with its tCKmin_X_ps of %u\n",
+					       temp2, i, mclk_ps,
+					       dimm_params[i].tCKmin_X_ps);

cpu/mpc8xxx/fsl_ddr_sdram.c line 491

Quoted 10 lines

cpu/mpc8xxx/fsl_ddr_sdram.c new file +10 -0

+					continue;
+				} else {
+					not_ok++;
+				}
+			}
+
+			if (dimm_params[i].caslat_X_minus_1 == temp2) {
+				if (mclk_ps >= dimm_params[i].tCKmin_X_minus_1_ps) {
+					debug("CL = %u ok on DIMM %u at tCK=%u ps with its tCKmin_X_minus_1_ps of %u\n",
+					       temp2, i, mclk_ps, dimm_params[i].tCKmin_X_minus_1_ps);

etc. Mind the maximum line length. (LCS: "The limit on the length of lines is 80 columns and this is a strongly preferred limit.")

There are functions in this file that span for nearly 500 lines of code - LCS says: "Functions should be short and sweet, and do just one thing. They should fit on one or two screenfuls of text (the ISO/ANSI screen size is 80x24, as we all know), and do one thing and do that well."

I think this file needs a rework.

Best regards,

Wolfgang Denk

Signature · 6 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
I perceive a possibility of an immediate  chronological  sequence  of
events which includes a violence.
                        - Terry Pratchett, _The Dark Side of the Sun_

Wolfgang Denk

2008-08-12 19:49 UTC #18 lore raw

PATCH 1/14 Add proper SPD definitions for DDR1/2/3

In reply to Kumar Gala

Dear Kumar Gala,

Quoted 5 lines · In message <[email protected]> you…

From: James Yang <[email protected]>
Also added a few helper functions for DDR1 & DDR2 to print SPD info and verify the checksum.

Quoted 8 lines

Signed-off-by Kumar Gala <[email protected]>

---
 common/Makefile   |    1 +
 common/ddr_spd.c  |  498 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 include/ddr_spd.h |  249 ++++++++++++++++++++++++++
 3 files changed, 748 insertions(+), 0 deletions(-)
 create mode 100644 common/ddr_spd.c
 create mode 100644 include/ddr_spd.h

Maximum line length exceeded!

Best regards,

Wolfgang Denk

Signature · 5 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Unix is supported by IBM, like a hanging man is supported by rope.
		        - Don Libes & Sandy Ressler: _Life With Unix_