pci: change msi-x vector to 32bit
Subsystems (3)
PATCH 1/1 pci: change msi-x vector to 32bit
we are using 28bit pci (bus/dev/fn + 12 bits) as irq number, so the cache for irq number should be 32 bit too.
--- drivers/scsi/qla2xxx/qla_def.h | 2 +- include/linux/pci.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
drivers/scsi/qla2xxx/qla_def.h +1 -1
@@ -2109,7 +2109,7 @@ struct scsi_qla_host;struct qla_msix_entry {int have_irq; -uint16_t msix_vector; +uint32_t msix_vector;uint16_t msix_entry; };
include/linux/pci.h +1 -1
@@ -730,7 +730,7 @@ enum pci_dma_burst_strategy { };struct msix_entry { -u16 vector;/* kernel uses to write allocated vector */ +u32 vector;/* kernel uses to write allocated vector */ u16 entry;/* driver uses to specify entry, OS writes */ };
Quoted 29 lines · Yinghai Lu
we are using 28bit pci (bus/dev/fn + 12 bits) as irq number, so the cache for irq number should be 32 bit too.
Signed-off-by Yinghai Lu <[email protected]>Cc Andrew Vasquez <[email protected]>--- drivers/scsi/qla2xxx/qla_def.h | 2 +- include/linux/pci.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)Index:
linux-2.6/drivers/scsi/qla2xxx/qla_def.h
===================================================================drivers/scsi/qla2xxx/qla_def.h +1
-1@@ -2109,7 +2109,7 @@ struct scsi_qla_host;struct qla_msix_entry {int have_irq; -uint16_t msix_vector; +uint32_t msix_vector;uint16_t msix_entry; };Index:
linux-2.6/include/linux/pci.h
===================================================================
include/linux/pci.h enum pci_dma_burst_strategy { · line 735
Quoted 7 lines
include/linux/pci.h +1
-1@@ -730,7 +730,7 @@ enum pci_dma_burst_strategy { };struct msix_entry { -u16 vector;/* kernel uses to write allocated vector */ +u32 vector;/* kernel uses to write allocated vector */ u16 entry;/* driver uses to specify entry, OS writes */ };
I see a lot of smoke about this, but not a clear consensus. It sounds like no one objects to making the MSI vector field 32 bits, but there were a lot of concerns about IRQ vector naming/numbering in general? And I assume this particular patch isn't 2.6.27 material...
Thanks,
Signature · 1 line
Jesse Barnes, Intel Open Source Technology Center
Quoted 32 lines · Jesse Barnes
Quoted 31 lines · Yinghai Lu
we are using 28bit pci (bus/dev/fn + 12 bits) as irq number, so the cache for irq number should be 32 bit too.
Signed-off-by Yinghai Lu <[email protected]>Cc Andrew Vasquez <[email protected]>--- drivers/scsi/qla2xxx/qla_def.h | 2 +- include/linux/pci.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)Index:
linux-2.6/drivers/scsi/qla2xxx/qla_def.h
===================================================================drivers/scsi/qla2xxx/qla_def.h +1
-1@@ -2109,7 +2109,7 @@ struct scsi_qla_host;struct qla_msix_entry {int have_irq; -uint16_t msix_vector; +uint32_t msix_vector;uint16_t msix_entry; };Index:
linux-2.6/include/linux/pci.h
===================================================================include/linux/pci.h +0
-0@@ -730,7 +730,7 @@ enum pci_dma_burst_strategy { };
Quoted 10 lines
include/linux/pci.h enum pci_dma_burst_strategy { · line 735
Quoted 5 lines
include/linux/pci.h +1
-1struct msix_entry { -u16 vector;/* kernel uses to write allocated vector */ +u32 vector;/* kernel uses to write allocated vector */ u16 entry;/* driver uses to specify entry, OS writes */ };I see a lot of smoke about this, but not a clear consensus. It sounds like no one objects to making the MSI vector field 32 bits, but there were a lot of concerns about IRQ vector naming/numbering in general? And I assume this particular patch isn't 2.6.27 material...
There is no need for this particular patch in 2.6.27. It is a trivial bug fix so it can go in whenever.
Mostly this is a discussion about code that should land in the 2.6.28 timeframe assuming all is well.
Eric
Quoted 44 lines · Eric W. Biederman
Quoted 32 lines · Jesse Barnes
Quoted 31 lines · Yinghai Lu
we are using 28bit pci (bus/dev/fn + 12 bits) as irq number, so the cache for irq number should be 32 bit too.
Signed-off-by Yinghai Lu <[email protected]>Cc Andrew Vasquez <[email protected]>--- drivers/scsi/qla2xxx/qla_def.h | 2 +- include/linux/pci.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)Index:
linux-2.6/drivers/scsi/qla2xxx/qla_def.h
===================================================================drivers/scsi/qla2xxx/qla_def.h +1
-1@@ -2109,7 +2109,7 @@ struct scsi_qla_host;struct qla_msix_entry {int have_irq; -uint16_t msix_vector; +uint32_t msix_vector;uint16_t msix_entry; };Index:
linux-2.6/include/linux/pci.h
===================================================================include/linux/pci.h +0
-0@@ -730,7 +730,7 @@ enum pci_dma_burst_strategy { };Quoted 10 lines
include/linux/pci.h enum pci_dma_burst_strategy { · line 735
Quoted 5 lines
include/linux/pci.h +1
-1struct msix_entry { -u16 vector;/* kernel uses to write allocated vector */ +u32 vector;/* kernel uses to write allocated vector */ u16 entry;/* driver uses to specify entry, OS writes */ };I see a lot of smoke about this, but not a clear consensus. It sounds like no one objects to making the MSI vector field 32 bits, but there were a lot of concerns about IRQ vector naming/numbering in general? And I assume this particular patch isn't 2.6.27 material...
Quoted 5 lines
There is no need for this particular patch in 2.6.27. It is a trivial bug fix so it can go in whenever.
Mostly this is a discussion about code that should land in the 2.6.28 timeframe assuming all is well.
Ok, thanks Eric. I'll queue it up for linux-next after the next 2.6.27 pull.
Thanks,
Signature · 1 line
Jesse Barnes, Intel Open Source Technology Center
Quoted 45 lines · Jesse Barnes
Quoted 44 lines · Eric W. Biederman
Quoted 42 lines · Jesse Barnes
Quoted 29 lines · Yinghai Lu
we are using 28bit pci (bus/dev/fn + 12 bits) as irq number, so the cache for irq number should be 32 bit too.
Signed-off-by Yinghai Lu <[email protected]>Cc Andrew Vasquez <[email protected]>--- drivers/scsi/qla2xxx/qla_def.h | 2 +- include/linux/pci.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)Index:
linux-2.6/drivers/scsi/qla2xxx/qla_def.h
===================================================================drivers/scsi/qla2xxx/qla_def.h +1
-1@@ -2109,7 +2109,7 @@ struct scsi_qla_host;struct qla_msix_entry {int have_irq; -uint16_t msix_vector; +uint32_t msix_vector;uint16_t msix_entry; };Index:
linux-2.6/include/linux/pci.h
===================================================================include/linux/pci.h enum pci_dma_burst_strategy { · line 735
Quoted 7 lines
include/linux/pci.h +1
-1@@ -730,7 +730,7 @@ enum pci_dma_burst_strategy { };struct msix_entry { -u16 vector;/* kernel uses to write allocated vector */ +u32 vector;/* kernel uses to write allocated vector */ u16 entry;/* driver uses to specify entry, OS writes */ };I see a lot of smoke about this, but not a clear consensus. It sounds like no one objects to making the MSI vector field 32 bits, but there were a lot of concerns about IRQ vector naming/numbering in general? And I assume this particular patch isn't 2.6.27 material...
Quoted 7 lines
Quoted 5 lines
There is no need for this particular patch in 2.6.27. It is a trivial bug fix so it can go in whenever.
Mostly this is a discussion about code that should land in the 2.6.28 timeframe assuming all is well.
Ok, thanks Eric. I'll queue it up for linux-next after the next 2.6.27 pull.
Are you maintaining the pci tree now? I get lost who is doing what some days.
Eric
Quoted 49 lines · Eric W. Biederman
Quoted 48 lines · Jesse Barnes
Quoted 47 lines · Eric W. Biederman
Quoted 32 lines · Jesse Barnes
Quoted 31 lines · Yinghai Lu
we are using 28bit pci (bus/dev/fn + 12 bits) as irq number, so the cache for irq number should be 32 bit too.
Signed-off-by Yinghai Lu <[email protected]>Cc Andrew Vasquez <[email protected]>--- drivers/scsi/qla2xxx/qla_def.h | 2 +- include/linux/pci.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)Index:
linux-2.6/drivers/scsi/qla2xxx/qla_def.h
===================================================================drivers/scsi/qla2xxx/qla_def.h +1
-1@@ -2109,7 +2109,7 @@ struct scsi_qla_host;struct qla_msix_entry {int have_irq; -uint16_t msix_vector; +uint32_t msix_vector;uint16_t msix_entry; };Index:
linux-2.6/include/linux/pci.h
===================================================================include/linux/pci.h +0
-0@@ -730,7 +730,7 @@ enum pci_dma_burst_strategy { };Quoted 10 lines
include/linux/pci.h enum pci_dma_burst_strategy { · line 735
Quoted 5 lines
include/linux/pci.h +1
-1struct msix_entry { -u16 vector;/* kernel uses to write allocated vector */ +u32 vector;/* kernel uses to write allocated vector */ u16 entry;/* driver uses to specify entry, OS writes */ };I see a lot of smoke about this, but not a clear consensus. It sounds like no one objects to making the MSI vector field 32 bits, but there were a lot of concerns about IRQ vector naming/numbering in general? And I assume this particular patch isn't 2.6.27 material...
There is no need for this particular patch in 2.6.27. It is a trivial bug fix so it can go in whenever.
Quoted 8 lines
Quoted 5 lines
Quoted 2 lines
Mostly this is a discussion about code that should land in the 2.6.28 timeframe assuming all is well.
Ok, thanks Eric. I'll queue it up for linux-next after the next 2.6.27 pull.
Are you maintaining the pci tree now? I get lost who is doing what some days.
Yep, since af40b485ea2d957ae2f237ab0e33539ae8f29562.
Signature · 1 line
Jesse Barnes, Intel Open Source Technology Center
Jesse Barnes
AppliedQuoted 5 lines · Yinghai Lu
we are using 28bit pci (bus/dev/fn + 12 bits) as irq number, so the cache for irq number should be 32 bit too.
Signed-off-by Yinghai Lu <[email protected]>Cc Andrew Vasquez <[email protected]>
Applied to linux-next, thanks.
Jesse