V2 remove omap3 compiler warning wrt v7_flush_dcache_all

U-Boot Superseded Tom Rix 4 participants 10 messages Jul 6, 2009 – Aug 8, 2009

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Tom Rix

author

2009-07-06 16:47 UTC #0 lore raw

This is against the arm/next branch.

This fixes a problem with compile warnings for all OMAP3 targets.

As per feedback, v7_flush_dcache_all was renamed to the generic flush_dcache and moved to the omap3 level in the new file cache_flush.S.

The original fix of using sys_proto.h is still used to fix the warning for for get_device_type.

compile tested on MAKEALL arm.
run tested on zoom1.

Tom Rix

author

2009-07-06 16:47 UTC #1 lore raw

PATCH 1/2 ARM Cortex8 Rename and move v7_flush_dcache_all to flush_dcache

Since there is only one version of flushing the dcache for arm_cortex8, rename v7_flush_dcache_all to the the generic name flush_dcache. Because the function is intended for only omap3 boards, move the function to the new file cache_flush.S.

This change fixes the compiler warning all OMAP3 targets have

cpu.c: In function 'cleanup_before_linux':
cpu.c:64: warning: implicit declaration of function 'v7_flush_dcache_all'

Signed-off-by Tom Rix <[email protected]>

---
 cpu/arm_cortexa8/cpu.c                 |    2 +-
 cpu/arm_cortexa8/omap3/Makefile        |    1 +
 cpu/arm_cortexa8/omap3/board.c         |    2 +-
 cpu/arm_cortexa8/omap3/cache_flush.S   |  118 ++++++++++++++++++++++++++++++++
 cpu/arm_cortexa8/start.S               |   87 -----------------------
 include/asm-arm/arch-omap3/sys_proto.h |    1 -
 include/asm-arm/cache.h                |    1 +
 7 files changed, 122 insertions(+), 90 deletions(-)
 create mode 100644 cpu/arm_cortexa8/omap3/cache_flush.S

cpu/arm_cortexa8/cpu.c +1 -1

index fcb5775..7f57ee9 100644
@@ -61,7 +61,7 @@ int cleanup_before_linux(void)
 	/* turn off L2 cache */
 	l2_cache_disable();
 	/* invalidate L2 cache also */
-	v7_flush_dcache_all(get_device_type());
+	flush_dcache(get_device_type());
 #endif
 	i = 0;
 	/* mem barrier to sync up things */

cpu/arm_cortexa8/omap3/Makefile +1 -0

index 1fbd0dc..ea7a1cf 100644
@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
 LIB	=  $(obj)lib$(SOC).a
 
 SOBJS	:= lowlevel_init.o
+SOBJS	+= cache_flush.o
 
 COBJS	+= board.o
 COBJS	+= cache.o

cpu/arm_cortexa8/omap3/board.c +1 -1

index 439ea6a..c082d8f 100644
@@ -201,7 +201,7 @@ void s_init(void)
 	 * Right now flushing at low MPU speed.
 	 * Need to move after clock init
 	 */
-	v7_flush_dcache_all(get_device_type());
+	flush_dcache(get_device_type());
 #ifndef CONFIG_ICACHE_OFF
 	icache_enable();
 #endif

cpu/arm_cortexa8/omap3/cache_flush.S new file +118 -0

118 lines not on this page · raw message

cpu/arm_cortexa8/start.S +0 ~~-87~~

93 lines not on this page · raw message

include/asm-arm/arch-omap3/sys_proto.h +0 -1

index 7361d08..2881287 100644
@@ -55,7 +55,6 @@ void secureworld_exit(void);
 void setup_auxcr(void);
 void try_unlock_memory(void);
 u32 get_boot_type(void);
-void v7_flush_dcache_all(u32);
 void sr32(void *, u32, u32, u32);
 u32 wait_on_value(u32, u32, void *, u32);
 void sdelay(unsigned long);

include/asm-arm/cache.h +1 -0

index d0518be..853e2d1 100644
@@ -41,5 +41,6 @@ static inline void invalidate_l2_cache(void)
 
 void l2_cache_enable(void);
 void l2_cache_disable(void);
+void flush_dcache(u32 device_type);
 
 #endif /* _ASM_CACHE_H */

Signature · 1 line

1.6.0.5

Tom Rix

author

2009-07-06 16:47 UTC #2 lore raw

PATCH 2/2 OMAP3 Fix compiler warning for get_device_type

When MAKEALL arm is run, the omap3 board *.ERR files contains this warning

cpu.c: In function 'cleanup_before_linux':
cpu.c:64: warning: implicit declaration of function 'get_device_type'

To fix this warning, use the declaration of get_device_type in sys_proto.h

Signed-off-by Tom Rix <[email protected]>

---
 cpu/arm_cortexa8/cpu.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

cpu/arm_cortexa8/cpu.c +3 -0

index 7f57ee9..ab59ab0 100644
@@ -35,6 +35,9 @@
 #include <command.h>
 #include <asm/system.h>
 #include <asm/cache.h>
+#ifndef CONFIG_L2_OFF
+#include <asm/arch/sys_proto.h>
+#endif
 
 static void cache_flush(void);

Signature · 1 line

1.6.0.5

Woodruff

2009-07-06 17:34 UTC #3 lore raw

PATCH 1/2 ARM Cortex8 Rename and move v7_flush_dcache_all to flush_dcache

In reply to Tom Rix

Quoted 9 lines

From: u-boot-bounces at lists.denx.de [mailto:u-boot-bounces at lists.denx.de] On Behalf Of Tom Rix
Sent: Monday, July 06, 2009 11:48 AM
Since there is only one version of flushing the dcache for arm_cortex8, rename v7_flush_dcache_all to the the generic name flush_dcache. Because the function is intended for only omap3 boards, move the function to the new file cache_flush.S.

Minor point is file name or function name might change to be more reflective of what it does (cache_ops.S, and invalidate_dcache()). As there is not really any 'flush' (cleaning out dirty entries to main memory).

Today the dcache is not even enabled in ARM ports. To do so requires MMU to be enabled to properly map IO regions as non-cached.

As such all we ever need to do is possibly invalidate icache at run time (say you use Kermit to download something and try to execute it).

The dcache invalidate today is only there to setup cache in clean state before calling the kernel.

Later on a dcache-flush/icache-invalidate might need to be added if Dcache is actually enabled.

Regards,
Richard W.

Tom

author

2009-07-07 02:57 UTC #4 lore raw

PATCH 1/2 ARM Cortex8 Rename and move v7_flush_dcache_all to flush_dcache

Quoted 6 lines · Richard

Quoted 4 lines
From: u-boot-bounces at lists.denx.de [mailto:u-boot-bounces at lists.denx.de] On Behalf Of Tom Rix
Sent: Monday, July 06, 2009 11:48 AM

Quoted 10 lines

Quoted 6 lines
Since there is only one version of flushing the dcache for arm_cortex8, rename v7_flush_dcache_all to the the generic name flush_dcache. Because the function is intended for only omap3 boards, move the function to the new file cache_flush.S.
Minor point is file name or function name might change to be more reflective of what it does (cache_ops.S, and invalidate_dcache()). As there is not really any 'flush' (cleaning out dirty entries to main memory).

I will change the name to cache_ops.S
flush_dcache was chosen to match other boards/cpu's and one of the main reasons for this change. If Jean is ok changing flush_dcache to invalidate_dcache, I will make that change too.
Tom

Quoted 12 lines

Today the dcache is not even enabled in ARM ports. To do so requires MMU to be enabled to properly map IO regions as non-cached.
As such all we ever need to do is possibly invalidate icache at run time (say you use Kermit to download something and try to execute it).
The dcache invalidate today is only there to setup cache in clean state before calling the kernel.
Later on a dcache-flush/icache-invalidate might need to be added if Dcache is actually enabled.
Regards,
Richard W.

Jean-Christophe PLAGNIOL-VILLARD

2009-07-07 20:31 UTC #5 lore raw

PATCH 1/2 ARM Cortex8 Rename and move v7_flush_dcache_all to flush_dcache

Quoted 11 lines · Tom

Quoted 10 lines · Richard
Quoted 9 lines
From: u-boot-bounces at lists.denx.de [mailto:u-boot-bounces at lists.denx.de] On Behalf Of Tom Rix
Sent: Monday, July 06, 2009 11:48 AM
Since there is only one version of flushing the dcache for arm_cortex8, rename v7_flush_dcache_all to the the generic name flush_dcache. Because the function is intended for only omap3 boards, move the function to the new file cache_flush.S.

Quoted 3 lines

Quoted 2 lines
Minor point is file name or function name might change to be more reflective of what it does (cache_ops.S, and invalidate_dcache()). As there is not really any 'flush' (cleaning out dirty entries to main memory).
I will change the name to cache_ops.S

I prefer cache.S

Quoted 3 lines

flush_dcache was chosen to match other boards/cpu's and one of the main reasons for this change. If Jean is ok changing flush_dcache to invalidate_dcache, I will make that change too.

invalidate_dcache is fine for me

Best Regards,
J.

Tom

author

2009-07-07 20:44 UTC #6 lore raw

PATCH 1/2 ARM Cortex8 Rename and move v7_flush_dcache_all to flush_dcache

Quoted 5 lines · Jean-Christophe PLAGNIOL-VILLARD

Quoted 3 lines
I will change the name to cache_ops.S
I prefer cache.S

cache.c is already taken.
Tom

Jean-Christophe PLAGNIOL-VILLARD

2009-07-07 21:20 UTC #7 lore raw

PATCH 1/2 ARM Cortex8 Rename and move v7_flush_dcache_all to flush_dcache

Quoted 5 lines · Tom

Quoted 3 lines · Jean-Christophe PLAGNIOL-VILLARD
Quoted 2 lines
I will change the name to cache_ops.S
I prefer cache.S
cache.c is already taken.

and contain nearly only assembly
so join everythink in cache.S will make more sense

Best Regards,
J.

Wolfgang Denk

2009-08-08 09:47 UTC #8 lore raw

PATCH 1/2 ARM Cortex8 Rename and move v7_flush_dcache_all to flush_dcache

In reply to Tom Rix

Dear Tom Rix,

Quoted 14 lines · In message <[email protected]> you wrote:

--===============0808050101==
Since there is only one version of flushing the dcache for arm_cortex8, rename v7_flush_dcache_all to the the generic name flush_dcache. Because the function is intended for only omap3 boards, move the function to the new file cache_flush.S.
This change fixes the compiler warning all OMAP3 targets have
cpu.c: In function 'cleanup_before_linux':
cpu.c:64: warning: implicit declaration of function 'v7_flush_dcache_all'
Signed-off-by Tom Rix <[email protected]>

Quoted 10 lines

---
 cpu/arm_cortexa8/cpu.c                 |    2 +-
 cpu/arm_cortexa8/omap3/Makefile        |    1 +
 cpu/arm_cortexa8/omap3/board.c         |    2 +-
 cpu/arm_cortexa8/omap3/cache_flush.S   |  118 ++++++++++++++++++++++++++++++++
 cpu/arm_cortexa8/start.S               |   87 -----------------------
 include/asm-arm/arch-omap3/sys_proto.h |    1 -
 include/asm-arm/cache.h                |    1 +
 7 files changed, 122 insertions(+), 90 deletions(-)
 create mode 100644 cpu/arm_cortexa8/omap3/cache_flush.S

Sorry, this patch does not apply any more:

Applying: ARM Cortex8 Rename and move v7_flush_dcache_all to flush_dcache
error: patch failed: cpu/arm_cortexa8/omap3/Makefile:26
error: cpu/arm_cortexa8/omap3/Makefile: patch does not apply
error: patch failed: cpu/arm_cortexa8/start.S:415
error: cpu/arm_cortexa8/start.S: patch does not apply
fatal: sha1 information is lacking or useless (cpu/arm_cortexa8/omap3/board.c). Repository lacks necessary blobs to fall back on 3-way merge. Cannot fall back to three-way merge.
Patch failed at 0001.

Please rebase and resubmit (also patch 2/2).

Best regards,

Wolfgang Denk

Signature · 4 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Another megabytes the dust.

Tom

author

2009-08-08 13:40 UTC #9 lore raw

PATCH 1/2 ARM Cortex8 Rename and move v7_flush_dcache_all to flush_dcache

Yes.
Sorry about that.
I will get something to you this week.
Tom

Quoted 49 lines · Wolfgang Denk

Dear Tom Rix,
Quoted 14 lines · In message <[email protected]> you wrote:
--===============0808050101==
Since there is only one version of flushing the dcache for arm_cortex8, rename v7_flush_dcache_all to the the generic name flush_dcache. Because the function is intended for only omap3 boards, move the function to the new file cache_flush.S.
This change fixes the compiler warning all OMAP3 targets have
cpu.c: In function 'cleanup_before_linux':
cpu.c:64: warning: implicit declaration of function 'v7_flush_dcache_all'
Signed-off-by Tom Rix <[email protected]>
Quoted 11 lines
---
 cpu/arm_cortexa8/cpu.c                 |    2 +-
 cpu/arm_cortexa8/omap3/Makefile        |    1 +
 cpu/arm_cortexa8/omap3/board.c         |    2 +-
 cpu/arm_cortexa8/omap3/cache_flush.S   |  118 ++++++++++++++++++++++++++++++++
 cpu/arm_cortexa8/start.S               |   87 -----------------------
 include/asm-arm/arch-omap3/sys_proto.h |    1 -
 include/asm-arm/cache.h                |    1 +
 7 files changed, 122 insertions(+), 90 deletions(-)
 create mode 100644 cpu/arm_cortexa8/omap3/cache_flush.S
Sorry, this patch does not apply any more:
Applying: ARM Cortex8 Rename and move v7_flush_dcache_all to flush_dcache
error: patch failed: cpu/arm_cortexa8/omap3/Makefile:26
error: cpu/arm_cortexa8/omap3/Makefile: patch does not apply
error: patch failed: cpu/arm_cortexa8/start.S:415
error: cpu/arm_cortexa8/start.S: patch does not apply
fatal: sha1 information is lacking or useless (cpu/arm_cortexa8/omap3/board.c). Repository lacks necessary blobs to fall back on 3-way merge. Cannot fall back to three-way merge.
Patch failed at 0001.
Please rebase and resubmit (also patch 2/2).
Best regards,
Wolfgang Denk