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sfc: Work around XMAC bug causing packet loss with some peers

PATCH Applied Ben Hutchings 2 participants 2 messages Aug 26, 2009 – Aug 27, 2009

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PATCH 5/7 sfc: Work around XMAC bug causing packet loss with some peers

Received frames must be re-clocked by the local XGXS to the 156.25 MHz (DDR) clock of the XGMII. If the remote clock is slightly faster this can reduce a minimum IPG of 64 bit-times (1 cycle) to 32 bit-times (half a cycle). If the XMAC detects that a frame has reached the maximum RX frame length in the same cycle that it receives one of these reduced IPGs, it may miss the IPG, causing two valid frames to be treated as a single invalid frame (over-length with bad CRC).

We work around this by increasing the maximum RX frame length so that peers with matched MTU will not provoke this bug.

---
 drivers/net/sfc/net_driver.h |    7 ++++++-
 1 files changed, 6 insertions(+), 1 deletions(-)
drivers/net/sfc/net_driver.h +6 -1
index 5eabede..298566d 100644
@@ -984,9 +984,14 @@ static inline void clear_bit_le(unsigned nr, unsigned char *addr)
  *
  * The 10G MAC used in Falcon requires 8-byte alignment on the frame
  * length, so we round up to the nearest 8.
+ *
+ * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an
+ * XGMII cycle).  If the frame length reaches the maximum value in the
+ * same cycle, the XMAC can miss the IPG altogether.  We work around
+ * this by adding a further 16 bytes.
  */
 #define EFX_MAX_FRAME_LEN(mtu) \
-	((((mtu) + ETH_HLEN + VLAN_HLEN + 4/* FCS */) + 7) & ~7)
+	((((mtu) + ETH_HLEN + VLAN_HLEN + 4/* FCS */ + 7) & ~7) + 16)
 
 
 #endif /* EFX_NET_DRIVER_H */
Signature · 3 lines
Ben Hutchings, Senior Software Engineer, Solarflare Communications
Not speaking for my employer; that's the marketing department's job.
They asked us to note that Solarflare product names are trademarked.
maintainer Applied
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From: Ben Hutchings <[email protected]>
Date: Wed, 26 Aug 2009 19:17:59 +0100

Quoted 8 lines

Received frames must be re-clocked by the local XGXS to the 156.25 MHz (DDR) clock of the XGMII. If the remote clock is slightly faster this can reduce a minimum IPG of 64 bit-times (1 cycle) to 32 bit-times (half a cycle). If the XMAC detects that a frame has reached the maximum RX frame length in the same cycle that it receives one of these reduced IPGs, it may miss the IPG, causing two valid frames to be treated as a single invalid frame (over-length with bad CRC).

Quoted 4 lines

We work around this by increasing the maximum RX frame length so that peers with matched MTU will not provoke this bug.

Applied.