Test framwork ported to qemu -kernel

55 lines not on this page · raw message

index 272a4ef..5eadff8 100644
@@ -1,6 +1,7 @@
 
 #include "libcflat.h"
-#include "smp.h"
+
+#define smp_id() 0
 
 #define true 1
 #define false 0

@@ -598,7 +599,6 @@ int main()
     int r;
 
     printf("starting test\n\n");
-    smp_init((void(*)(void))ac_test_run);
     r = ac_test_run();
     return r ? 0 : 1;
 }

index 0db09b8..f9e303f 100644
@@ -26,7 +26,7 @@ static void print_serial(const char *buf)
 {
 	unsigned long len = strlen(buf);
 
-	asm volatile ("addr32/rep/outsb" : "+S"(buf), "+c"(len) : "d"(0xf1));
+	asm volatile ("cld; addr32/rep/outsb" : "+S"(buf), "+c"(len) : "d"(0xf1));
 }
 
 static void exit(int code)

index f9e303f..9bf6cb0 100644
@@ -549,7 +549,7 @@ void test_null(void)
 		print_serial("null test: FAIL\n");
 }
 
-void start(void)
+void realmode_start(void)
 {
 	test_null();
 

@@ -570,23 +570,55 @@ void start(void)
 	exit(0);
 }
 
+unsigned long long r_gdt[] = { 0, 0x9b000000ffff, 0x93000000ffff };
+
+struct __attribute__((packed)) {
+	unsigned short limit;
+	void *base;
+} r_gdt_descr = { sizeof(r_gdt) - 1, &r_gdt };
+
 asm(
+	".section .init \n\t"
+
+	".code32 \n\t"
+
+	"mb_magic = 0x1BADB002 \n\t"
+	"mb_flags = 0x0 \n\t"
+
+	"# multiboot header \n\t"
+	".long mb_magic, mb_flags, 0 - (mb_magic + mb_flags) \n\t"
+
+	".globl start \n\t"
 	".data \n\t"
 	". = . + 4096 \n\t"
 	"stacktop: \n\t"
+
 	".text \n\t"
-	"init: \n\t"
+	"start: \n\t"
+	"lgdt r_gdt_descr \n\t"
+	"ljmp $8, $1f; 1: \n\t"
+	".code16gcc \n\t"
+	"mov $16, %eax \n\t"
+	"mov %ax, %ds \n\t"
+	"mov %ax, %es \n\t"
+	"mov %ax, %fs \n\t"
+	"mov %ax, %gs \n\t"
+	"mov %ax, %ss \n\t"
+	"mov %cr0, %eax \n\t"
+	"btc $0, %eax \n\t"
+	"mov %eax, %cr0 \n\t"
+	"ljmp $0, $realmode_entry \n\t"
+
+	"realmode_entry: \n\t"
+
 	"xor %ax, %ax \n\t"
 	"mov %ax, %ds \n\t"
 	"mov %ax, %es \n\t"
 	"mov %ax, %ss \n\t"
-	"mov $0x4000, %cx \n\t"
-	"xor %esi, %esi \n\t"
-	"mov %esi, %edi \n\t"
-	"rep/addr32/cs/movsl \n\t"
+	"mov %ax, %fs \n\t"
+	"mov %ax, %gs \n\t"
 	"mov $stacktop, %sp\n\t"
-	"ljmp $0, $start \n\t"
-	".pushsection .boot, \"ax\" \n\t"
-	"ljmp $0xf000, $init \n\t"
-	".popsection"
+	"ljmp $0, $realmode_start \n\t"
+
+	".code16gcc \n\t"
 	);

index 981d6c1..364837f 100644
@@ -24,16 +24,40 @@ static inline unsigned long long rdtsc()
 #  define R "e"
 #endif
 
-int main()
+static void cpuid(void)
+{
+	asm volatile ("push %%"R "bx; cpuid; pop %%"R "bx"
+		      : : : "eax", "ecx", "edx");
+}
+
+static struct test {
+	void (*func)(void);
+	const char *name;
+} tests[] = {
+	{ cpuid, "cpuid", },
+};
+
+static void do_test(struct test *test)
 {
 	int i;
 	unsigned long long t1, t2;
+        void (*func)(void) = test->func;
 
 	t1 = rdtsc();
 	for (i = 0; i < N; ++i)
-		asm volatile ("push %%"R "bx; cpuid; pop %%"R "bx"
-			      : : : "eax", "ecx", "edx");
+            func();
 	t2 = rdtsc();
-	printf("vmexit latency: %d\n", (int)((t2 - t1) / N));
+	printf("%s %d\n", test->name, (int)((t2 - t1) / N));
+}
+
+#define ARRAY_SIZE(_x) (sizeof(_x) / sizeof((_x)[0]))
+
+int main(void)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(tests); ++i)
+		do_test(&tests[i]);
+
 	return 0;
 }

index 364837f..bd1895f 100644
@@ -30,11 +30,19 @@ static void cpuid(void)
 		      : : : "eax", "ecx", "edx");
 }
 
+static void vmcall(void)
+{
+	unsigned long a = 0, b, c, d;
+
+	asm volatile ("vmcall" : "+a"(a), "=b"(b), "=c"(c), "=d"(d));
+}
+
 static struct test {
 	void (*func)(void);
 	const char *name;
 } tests[] = {
 	{ cpuid, "cpuid", },
+	{ vmcall, "vmcall", },
 };
 
 static void do_test(struct test *test)

index bd1895f..cce26d9 100644
@@ -37,12 +37,28 @@ static void vmcall(void)
 	asm volatile ("vmcall" : "+a"(a), "=b"(b), "=c"(c), "=d"(d));
 }
 
+static void mov_from_cr8(void)
+{
+	unsigned long cr8;
+
+	asm volatile ("mov %%cr8, %0" : "=r"(cr8));
+}
+
+static void mov_to_cr8(void)
+{
+	unsigned long cr8 = 0;
+
+	asm volatile ("mov %0, %%cr8" : : "r"(cr8));
+}
+
 static struct test {
 	void (*func)(void);
 	const char *name;
 } tests[] = {
 	{ cpuid, "cpuid", },
 	{ vmcall, "vmcall", },
+	{ mov_from_cr8, "mov_from_cr8" },
+	{ mov_to_cr8, "mov_to_cr8" },
 };
 
 static void do_test(struct test *test)

index 7794615..b712ef8 100644
@@ -102,6 +102,11 @@ static idt_entry_t idt[256];
 static int g_fail;
 static int g_tests;
 
+static void outb(unsigned char data, unsigned short port)
+{
+    asm volatile ("out %0, %1" : : "a"(data), "d"(port));
+}
+
 static void report(const char *msg, int pass)
 {
     ++g_tests;

@@ -325,9 +330,16 @@ static void test_ioapic_simultaneous(void)
 
 static void enable_apic(void)
 {
+    printf("enabling apic\n");
     apic_write(0xf0, 0x1ff); /* spurious vector register */
 }
 
+static void mask_pic_interrupts(void)
+{
+    outb(0xff, 0x21);
+    outb(0xff, 0xa1);
+}
+
 int main()
 {
     setup_vm();

@@ -337,6 +349,7 @@ int main()
 
     test_lapic_existence();
 
+    mask_pic_interrupts();
     enable_apic();
     init_idt();
 

index db426f6..5f892c7 100644
@@ -68,6 +68,8 @@ static RTCState *rtc_state;
 static PITState *pit;
 static PCII440FXState *i440fx_state;
 
+qemu_irq *ioapic_irq_hack;
+
 typedef struct rom_reset_data {
     uint8_t *data;
     target_phys_addr_t addr;

@@ -1340,6 +1342,7 @@ static void pc_init1(ram_addr_t ram_size,
 
     if (pci_enabled) {
         isa_irq_state->ioapic = ioapic_init();
+        ioapic_irq_hack = isa_irq;
     }
 #ifdef USE_KVM_PIT
     if (kvm_enabled() && qemu_kvm_pit_in_kernel())

index 199731e..ac5b9cd 100644
@@ -27,6 +27,13 @@ static uint32_t test_device_memsize_read(void *opaque, uint32_t addr)
     return ram_size;
 }
 
+static void test_device_irq_line(void *opaque, uint32_t addr, uint32_t data)
+{
+    extern qemu_irq *ioapic_irq_hack;
+
+    qemu_set_irq(ioapic_irq_hack[addr - 0x2000], !!data);
+}
+
 static int init_test_device(ISADevice *isa)
 {
     struct testdev *dev = DO_UPCAST(struct testdev, dev, isa);

@@ -34,6 +41,7 @@ static int init_test_device(ISADevice *isa)
     register_ioport_write(0xf1, 1, 1, test_device_serial_write, dev);
     register_ioport_write(0xf4, 1, 4, test_device_exit, dev);
     register_ioport_read(0xd1, 1, 4, test_device_memsize_read, dev);
+    register_ioport_write(0x2000, 24, 1, test_device_irq_line, NULL);
     return 0;
 }
 

index b712ef8..72dd963 100644
@@ -102,6 +102,12 @@ static idt_entry_t idt[256];
 static int g_fail;
 static int g_tests;
 
+struct apic_ops {
+    u32 (*reg_read)(unsigned reg);
+    void (*reg_write)(unsigned reg, u32 val);
+    void (*icr_write)(u32 val, u32 dest);
+};
+
 static void outb(unsigned char data, unsigned short port)
 {
     asm volatile ("out %0, %1" : : "a"(data), "d"(port));

@@ -115,16 +121,47 @@ static void report(const char *msg, int pass)
         ++g_fail;
 }
 
-static u32 apic_read(unsigned reg)
+static u32 xapic_read(unsigned reg)
 {
     return *(volatile u32 *)(g_apic + reg);
 }
 
-static void apic_write(unsigned reg, u32 val)
+static void xapic_write(unsigned reg, u32 val)
 {
     *(volatile u32 *)(g_apic + reg) = val;
 }
 
+static void xapic_icr_write(u32 val, u32 dest)
+{
+    while (xapic_read(APIC_ICR) & APIC_ICR_BUSY)
+        ;
+    xapic_write(APIC_ICR2, dest << 24);
+    xapic_write(APIC_ICR, val);
+}
+
+static const struct apic_ops xapic_ops = {
+    .reg_read = xapic_read,
+    .reg_write = xapic_write,
+    .icr_write = xapic_icr_write,
+};
+
+static const struct apic_ops *apic_ops = &xapic_ops;
+
+static u32 apic_read(unsigned reg)
+{
+    return apic_ops->reg_read(reg);
+}
+
+static void apic_write(unsigned reg, u32 val)
+{
+    apic_ops->reg_write(reg, val);
+}
+
+static void apic_icr_write(u32 val, u32 dest)
+{
+    apic_ops->icr_write(val, dest);
+}
+
 static void test_lapic_existence(void)
 {
     u32 lvr;

index 72dd963..fdeec4c 100644
@@ -260,8 +260,8 @@ static void test_self_ipi(void)
 
     set_idt_entry(vec, self_ipi_isr);
     irq_enable();
-    apic_write(APIC_ICR,
-               APIC_DEST_SELF | APIC_DEST_PHYSICAL | APIC_DM_FIXED | vec);
+    apic_icr_write(APIC_DEST_SELF | APIC_DEST_PHYSICAL | APIC_DM_FIXED | vec,
+                   0);
     asm volatile ("nop");
     report("self ipi", ipi_count == 1);
 }

index fdeec4c..504def2 100644
@@ -9,6 +9,7 @@ typedef unsigned char u8;
 typedef unsigned short u16;
 typedef unsigned u32;
 typedef unsigned long ulong;
+typedef unsigned long long u64;
 
 typedef struct {
     unsigned short offset0;

@@ -147,6 +148,31 @@ static const struct apic_ops xapic_ops = {
 
 static const struct apic_ops *apic_ops = &xapic_ops;
 
+static u32 x2apic_read(unsigned reg)
+{
+    unsigned a, d;
+
+    asm volatile ("rdmsr" : "=a"(a), "=d"(d) : "c"(APIC_BASE_MSR + reg/16));
+    return a | (u64)d << 32;
+}
+
+static void x2apic_write(unsigned reg, u32 val)
+{
+    asm volatile ("wrmsr" : : "a"(val), "d"(0), "c"(APIC_BASE_MSR + reg/16));
+}
+
+static void x2apic_icr_write(u32 val, u32 dest)
+{
+    asm volatile ("wrmsr" : : "a"(val), "d"(dest),
+                  "c"(APIC_BASE_MSR + APIC_ICR/16));
+}
+
+static const struct apic_ops x2apic_ops = {
+    .reg_read = x2apic_read,
+    .reg_write = x2apic_write,
+    .icr_write = x2apic_icr_write,
+};
+
 static u32 apic_read(unsigned reg)
 {
     return apic_ops->reg_read(reg);

@@ -171,6 +197,25 @@ static void test_lapic_existence(void)
     report("apic existence", (u16)lvr == 0x14);
 }
 
+#define MSR_APIC_BASE 0x0000001b
+
+static void enable_x2apic(void)
+{
+    unsigned a, b, c, d;
+
+    asm ("cpuid" : "=a"(a), "=b"(b), "=c"(c), "=d"(d) : "0"(1));
+
+    if (c & (1 << 21)) {
+        asm ("rdmsr" : "=a"(a), "=d"(d) : "c"(MSR_APIC_BASE));
+        a |= 1 << 10;
+        asm ("wrmsr" : : "a"(a), "d"(d), "c"(MSR_APIC_BASE));
+        apic_ops = &x2apic_ops;
+        printf("x2apic enabled\n");
+    } else {
+        printf("x2apic not detected\n");
+    }
+}
+
 static u16 read_cs(void)
 {
     u16 v;

@@ -388,6 +433,7 @@ int main()
 
     mask_pic_interrupts();
     enable_apic();
+    enable_x2apic();
     init_idt();
 
     test_self_ipi();

new file mode 100644
index 0000000..a9a2ce2
@@ -0,0 +1,35 @@
+#include "fwcfg.h"
+
+uint64_t fwcfg_get_u(uint16_t index, int bytes)
+{
+    uint64_t r = 0;
+    uint8_t b;
+    int i;
+
+    asm volatile ("out %0, %1" : : "a"(index), "d"((uint16_t)BIOS_CFG_IOPORT));
+    for (i = 0; i < bytes; ++i) {
+        asm volatile ("in %1, %0" : "=a"(b) : "d"((uint16_t)(BIOS_CFG_IOPORT + 1)));
+        r |= (uint64_t)b << (i * 8);
+    }
+    return r;
+}
+
+uint8_t fwcfg_get_u8(unsigned index)
+{
+    return fwcfg_get_u(index, 1);
+}
+
+uint16_t fwcfg_get_u16(unsigned index)
+{
+    return fwcfg_get_u(index, 2);
+}
+
+uint32_t fwcfg_get_u32(unsigned index)
+{
+    return fwcfg_get_u(index, 4);
+}
+
+uint64_t fwcfg_get_u64(unsigned index)
+{
+    return fwcfg_get_u(index, 8);
+}

42 lines not on this page · raw message

index a9a2ce2..2cf7cec 100644
@@ -33,3 +33,8 @@ uint64_t fwcfg_get_u64(unsigned index)
 {
     return fwcfg_get_u(index, 8);
 }
+
+unsigned fwcfg_get_nb_cpus(void)
+{
+    return fwcfg_get_u16(FW_CFG_NB_CPUS);
+}

index c7245e2..e0836ca 100644
@@ -38,5 +38,7 @@ uint16_t fwcfg_get_u16(unsigned index);
 uint32_t fwcfg_get_u32(unsigned index);
 uint64_t fwcfg_get_u64(unsigned index);
 
+unsigned fwcfg_get_nb_cpus(void);
+
 #endif
 

index 03c7354..ec9c145 100644
@@ -189,6 +189,9 @@ static void setup_mmu(unsigned long len)
     unsigned long *cr3 = alloc_page();
     unsigned long phys = 0;
 
+    if (len < (1ul << 32))
+        len = 1ul << 32;  /* map mmio 1:1 */
+
     memset(cr3, 0, PAGE_SIZE);
     while (phys + LARGE_PAGE_SIZE <= len) {
 	install_large_page(cr3, phys, (void *)phys);

index 504def2..63d326d 100644
@@ -426,8 +426,8 @@ int main()
 {
     setup_vm();
 
-    g_apic = vmap(0xfee00000, 0x1000);
-    g_ioapic = vmap(0xfec00000, 0x1000);
+    g_apic = (void *)0xfee00000;
+    g_ioapic = (void *)0xfec00000;
 
     test_lapic_existence();
 

similarity index 100%
rename from kvm/user/test/x86/apic.h
rename to kvm/user/test/lib/x86/apic-defs.h

131 lines not on this page · raw message

new file mode 100644
index 0000000..0115ba4
@@ -0,0 +1,33 @@
+#ifndef CFLAT_APIC_H
+#define CFLAT_APIC_H
+
+#include <stdint.h>
+#include "apic-defs.h"
+
+typedef struct {
+    uint8_t vector;
+    uint8_t delivery_mode:3;
+    uint8_t dest_mode:1;
+    uint8_t delivery_status:1;
+    uint8_t polarity:1;
+    uint8_t remote_irr:1;
+    uint8_t trig_mode:1;
+    uint8_t mask:1;
+    uint8_t reserve:7;
+    uint8_t reserved[4];
+    uint8_t dest_id;
+} ioapic_redir_entry_t;
+
+void mask_pic_interrupts(void);
+
+void ioapic_write_redir(unsigned line, ioapic_redir_entry_t e);
+void ioapic_write_reg(unsigned reg, uint32_t value);
+
+void enable_apic(void);
+uint32_t apic_read(unsigned reg);
+void apic_write(unsigned reg, uint32_t val);
+void apic_icr_write(uint32_t val, uint32_t dest);
+
+int enable_x2apic(void);
+
+#endif

175 lines not on this page · raw message

index 25517ef..16e51bc 100644
@@ -14,6 +14,7 @@ struct apic_ops {
     u32 (*reg_read)(unsigned reg);
     void (*reg_write)(unsigned reg, u32 val);
     void (*icr_write)(u32 val, u32 dest);
+    u32 (*id)(void);
 };
 
 static void outb(unsigned char data, unsigned short port)

@@ -39,10 +40,16 @@ static void xapic_icr_write(u32 val, u32 dest)
     xapic_write(APIC_ICR, val);
 }
 
+static uint32_t xapic_id(void)
+{
+    return xapic_read(APIC_ID) >> 24;
+}
+
 static const struct apic_ops xapic_ops = {
     .reg_read = xapic_read,
     .reg_write = xapic_write,
     .icr_write = xapic_icr_write,
+    .id = xapic_id,
 };
 
 static const struct apic_ops *apic_ops = &xapic_ops;

@@ -66,10 +73,16 @@ static void x2apic_icr_write(u32 val, u32 dest)
                   "c"(APIC_BASE_MSR + APIC_ICR/16));
 }
 
+static uint32_t x2apic_id(void)
+{
+    return xapic_read(APIC_ID);
+}
+
 static const struct apic_ops x2apic_ops = {
     .reg_read = x2apic_read,
     .reg_write = x2apic_write,
     .icr_write = x2apic_icr_write,
+    .id = x2apic_id,
 };
 
 u32 apic_read(unsigned reg)

@@ -87,6 +100,11 @@ void apic_icr_write(u32 val, u32 dest)
     apic_ops->icr_write(val, dest);
 }
 
+uint32_t apic_id(void)
+{
+    return apic_ops->id();
+}
+
 #define MSR_APIC_BASE 0x0000001b
 
 int enable_x2apic(void)

index 0115ba4..e325e9a 100644
@@ -27,6 +27,7 @@ void enable_apic(void);
 uint32_t apic_read(unsigned reg);
 void apic_write(unsigned reg, uint32_t val);
 void apic_icr_write(uint32_t val, uint32_t dest);
+uint32_t apic_id(void);
 
 int enable_x2apic(void);
 

index 16e51bc..1fc3888 100644
@@ -139,7 +139,7 @@ void ioapic_write_redir(unsigned line, ioapic_redir_entry_t e)
 void enable_apic(void)
 {
     printf("enabling apic\n");
-    apic_write(0xf0, 0x1ff); /* spurious vector register */
+    xapic_write(0xf0, 0x1ff); /* spurious vector register */
 }
 
 void mask_pic_interrupts(void)

index 92ebada..a3a5472 100644
@@ -1,46 +1,11 @@
 
 #include <libcflat.h>
 #include "smp.h"
-#include "fake-apic.h"
+#include "apic.h"
+#include "fwcfg.h"
 
 #define IPI_VECTOR 0x20
 
-static int apic_read(int reg)
-{
-    unsigned short port = APIC_BASE + reg;
-    unsigned v;
-
-    asm volatile ("in %1, %0" : "=a"(v) : "d"(port));
-    return v;
-}
-
-static void apic_write(int reg, unsigned v)
-{
-    unsigned short port = APIC_BASE + reg;
-
-    asm volatile ("out %0, %1" : : "a"(v), "d"(port));
-}
-
-static int apic_get_cpu_count()
-{
-    return apic_read(APIC_REG_NCPU);
-}
-
-static int apic_get_id()
-{
-    return apic_read(APIC_REG_ID);
-}
-
-static void apic_set_ipi_vector(int vector)
-{
-    apic_write(APIC_REG_IPI_VECTOR, vector);
-}
-
-static void apic_send_ipi(int cpu)
-{
-    apic_write(APIC_REG_SEND_IPI, cpu);
-}
-
 static struct spinlock ipi_lock;
 static void (*ipi_function)(void *data);
 static void *ipi_data;

@@ -100,23 +65,25 @@ void spin_unlock(struct spinlock *lock)
 
 int cpu_count(void)
 {
-    return apic_get_cpu_count();
+    return fwcfg_get_nb_cpus();
 }
 
 int smp_id(void)
 {
-    return apic_get_id();
+    return apic_read(APIC_ID);
 }
 
 void on_cpu(int cpu, void (*function)(void *data), void *data)
 {
     spin_lock(&ipi_lock);
-    if (cpu == apic_get_id())
+    if (cpu == apic_id())
 	function(data);
     else {
 	ipi_function = function;
 	ipi_data = data;
-	apic_send_ipi(cpu);
+	apic_icr_write(APIC_INT_ASSERT | APIC_DEST_PHYSICAL | APIC_DM_FIXED
+                       | IPI_VECTOR,
+                       cpu);
 	while (!ipi_done)
 	    ;
 	ipi_done = 0;

@@ -124,27 +91,10 @@ void on_cpu(int cpu, void (*function)(void *data), void *data)
     spin_unlock(&ipi_lock);
 }
 
-static void (*smp_main_func)(void);
-static volatile int smp_main_running;
-
-asm ("smp_init_entry: \n"
-     "incl smp_main_running \n"
-     "sti \n"
-     "call *smp_main_func");
-
-void smp_init(void (*smp_main)(void))
+void smp_init(void)
 {
     int i;
-    void smp_init_entry(void);
     void ipi_entry(void);
 
-    apic_set_ipi_vector(IPI_VECTOR);
-    set_ipi_descriptor(smp_init_entry);
-    smp_main_func = smp_main;
-    for (i = 1; i < cpu_count(); ++i) {
-	apic_send_ipi(i);
-	while (smp_main_running < i)
-	    ;
-    }
     set_ipi_descriptor(ipi_entry);
 }

index bcf76a3..bac7e14 100644
@@ -5,7 +5,7 @@ struct spinlock {
     int v;
 };
 
-void smp_init(void (*smp_main)(void));
+void smp_init(void);
 
 int cpu_count(void);
 int smp_id(void);

index 7b1ba49..3780599 100644
@@ -10,19 +10,13 @@ static void ipi_test(void *data)
 	printf("but wrong cpu %d\n", smp_id());
 }
 
-static void smp_main(void)
-{
-    printf("smp main %d\n", smp_id());
-    while (1)
-	asm volatile ("hlt" : : : "memory");
-}
-
 int main()
 {
     int ncpus;
     int i;
 
-    smp_init(smp_main);
+    smp_init();
+
     ncpus = cpu_count();
     printf("found %d cpus\n", ncpus);
     for (i = 0; i < ncpus; ++i)