drm/radeon/kms: detect sideport enabled on rs690/740/780/880.

PATCH In review Dave Airlie 3 participants 5 messages Jan 5, 2010 – Jan 6, 2010

Subsystems (2)

DRM drivers Radeon and amdgpu DRM drivers

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Dave Airlie

author maintainer

2010-01-05 04:55 UTC #0 lore raw

PATCH 1/1 drm/radeon/kms: detect sideport enabled on rs690/740/780/880.

From: Dave Airlie <[email protected]>

This detects if the sideport memory is enabled on these IGPs, and if it is VRAM is evicted on suspend/resume.

This should fix s/r issues on some IGPs.

TODO:
check rs880 is same as rs780
add rs480 support if possible.

Signed-off-by Dave Airlie <[email protected]>

---
 drivers/gpu/drm/radeon/r600.c          |    7 +++++++
 drivers/gpu/drm/radeon/r600d.h         |    3 +++
 drivers/gpu/drm/radeon/radeon.h        |    1 +
 drivers/gpu/drm/radeon/radeon_object.c |    6 ++++--
 drivers/gpu/drm/radeon/rs690.c         |    5 +++++
 drivers/gpu/drm/radeon/rs690d.h        |    2 ++
 6 files changed, 22 insertions(+), 2 deletions(-)

drivers/gpu/drm/radeon/r600.c +7 -0

index 5c6058c..35ff64b 100644
@@ -726,6 +726,13 @@ int r600_mc_init(struct radeon_device *rdev)
 	a.full = rfixed_const(100);
 	rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk);
 	rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a);
+
+	if ((rdev->family == CHIP_RS780) ||
+	    (rdev->family == CHIP_RS880)) {
+		tmp = RREG32_MC(R_000012_MC_MISC_UMA_CNTL);
+		if (G_000012_MC_SIDE_PORT_PRESENT(tmp))
+			rdev->mc.igp_sideport_enabled = true;
+	}
 	return 0;
 }

drivers/gpu/drm/radeon/r600d.h +3 -0

index 05894ed..8020a98 100644
@@ -882,4 +882,7 @@
 #define		S_000E60_SOFT_RESET_VMC(x)		(((x) & 1) << 17)
 
 #define R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL		0x5480
+
+#define R_000012_MC_MISC_UMA_CNTL                       0x12
+#define   G_000012_MC_SIDE_PORT_PRESENT(x)              (((x) >> 31) & 0x1)
 #endif

drivers/gpu/drm/radeon/radeon.h +1 -0

index 53b5560..0b00b41 100644
@@ -319,6 +319,7 @@ struct radeon_mc {
 	u64			real_vram_size;
 	int			vram_mtrr;
 	bool			vram_is_ddr;
+	bool			igp_sideport_enabled;
 };
 
 int radeon_mc_setup(struct radeon_device *rdev);

drivers/gpu/drm/radeon/radeon_object.c +4 -2

index d9ffe1f..1c70d95 100644
@@ -221,8 +221,10 @@ int radeon_bo_unpin(struct radeon_bo *bo)
 int radeon_bo_evict_vram(struct radeon_device *rdev)
 {
 	if (rdev->flags & RADEON_IS_IGP) {
-		/* Useless to evict on IGP chips */
-		return 0;
+		if (rdev->mc.igp_sideport_enabled == false)
+			/* Useless to evict on IGP chips
+			   unless sideport is in use */
+			return 0;
 	}
 	return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM);
 }

drivers/gpu/drm/radeon/rs690.c +5 -0

index 1e22f52..74cc57c 100644
@@ -132,6 +132,7 @@ void rs690_pm_info(struct radeon_device *rdev)
 void rs690_vram_info(struct radeon_device *rdev)
 {
 	fixed20_12 a;
+	u32 tmp;
 
 	rs400_gart_adjust_size(rdev);

@@ -160,6 +161,10 @@ void rs690_vram_info(struct radeon_device *rdev)
 	a.full = rfixed_const(16);
 	/* core_bandwidth = sclk(Mhz) * 16 */
 	rdev->pm.core_bandwidth.full = rfixed_div(rdev->pm.sclk, a);
+
+	tmp = RREG32_MC(R_00005F_MC_MISC_UMA_CNTL);
+	if (G_00005F_MC_SIDE_PORT_PRESENT(tmp))
+		rdev->mc.igp_sideport_enabled = true;
 }
 
 static int rs690_mc_init(struct radeon_device *rdev)

drivers/gpu/drm/radeon/rs690d.h +2 -0

index 62d31e7..e74071e 100644
@@ -233,6 +233,8 @@
 #define   G_006D58_LB_D2_MAX_REQ_OUTSTANDING(x)        (((x) >> 16) & 0xF)
 #define   C_006D58_LB_D2_MAX_REQ_OUTSTANDING           0xFFF0FFFF
 
+#define R_00005F_MC_MISC_UMA_CNTL                    0x00005F
+#define   G_00005F_MC_SIDE_PORT_PRESENT(x)             (((x) >> 31) & 0x1)
 
 #define R_000090_MC_SYSTEM_STATUS                    0x000090
 #define   S_000090_MC_SYSTEM_IDLE(x)                   (((x) & 0x1) << 0)

Signature · 10 lines

1.6.5.2


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Alex Deucher

2010-01-05 16:00 UTC #1 lore raw

Quoted 6 lines · Dave Airlie

From: Dave Airlie <[email protected]>
This detects if the sideport memory is enabled on these IGPs, and if it is VRAM is evicted on suspend/resume.
This should fix s/r issues on some IGPs.

NACK. that register is not reliable. You need to get the info from the Integrated System Information table in the bios. On pre-atom systems the memory reference clock frequency (offset 0x4-0x5) field in that table will be zero if no sideport memory is present. On atom systems, ATOM_INTEGRATED_SYSTEM_INFO.ucMemoryType will be 0 if no sideport is present for v1 tables (rs6xx), for v2, ATOM_INTEGRATED_SYSTEM_INFO_V2.ulBootUpSidePortClock will be zero if no sideport is present (rs780/rs880).

Alex

Quoted 114 lines

TODO:
check rs880 is same as rs780
add rs480 support if possible.

Signed-off-by Dave Airlie <[email protected]>

 6 files changed, 22 insertions(+), 2 deletions(-)

drivers/gpu/drm/radeon/r600.c +7 -0

index 5c6058c..35ff64b 100644
@@ -726,6 +726,13 @@ int r600_mc_init(struct radeon_device *rdev)
        a.full = rfixed_const(100);
        rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk);
        rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a);
+
+       if ((rdev->family == CHIP_RS780) ||
+           (rdev->family == CHIP_RS880)) {
+               tmp = RREG32_MC(R_000012_MC_MISC_UMA_CNTL);
+               if (G_000012_MC_SIDE_PORT_PRESENT(tmp))
+                       rdev->mc.igp_sideport_enabled = true;
+       }
        return 0;
  }

drivers/gpu/drm/radeon/r600d.h +3 -0

index 05894ed..8020a98 100644
@@ -882,4 +882,7 @@
  #define                S_000E60_SOFT_RESET_VMC(x)              (((x) & 1) << 17)
 
  #define R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL          0x5480
+
+#define R_000012_MC_MISC_UMA_CNTL                       0x12
+#define   G_000012_MC_SIDE_PORT_PRESENT(x)              (((x) >> 31) & 0x1)
  #endif

drivers/gpu/drm/radeon/radeon.h +1 -0

index 53b5560..0b00b41 100644
@@ -319,6 +319,7 @@ struct radeon_mc {
        u64                     real_vram_size;
        int                     vram_mtrr;
        bool                    vram_is_ddr;
+       bool                    igp_sideport_enabled;
  };
 
  int radeon_mc_setup(struct radeon_device *rdev);

drivers/gpu/drm/radeon/radeon_object.c +4 -2

index d9ffe1f..1c70d95 100644
@@ -221,8 +221,10 @@ int radeon_bo_unpin(struct radeon_bo *bo)
  int radeon_bo_evict_vram(struct radeon_device *rdev)
  {
        if (rdev->flags & RADEON_IS_IGP) {
-               /* Useless to evict on IGP chips */
-               return 0;
+               if (rdev->mc.igp_sideport_enabled == false)
+                       /* Useless to evict on IGP chips
+                          unless sideport is in use */
+                       return 0;
        }
        return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM);
  }

drivers/gpu/drm/radeon/rs690.c +5 -0

index 1e22f52..74cc57c 100644
@@ -132,6 +132,7 @@ void rs690_pm_info(struct radeon_device *rdev)
  void rs690_vram_info(struct radeon_device *rdev)
  {
        fixed20_12 a;
+       u32 tmp;
 
        rs400_gart_adjust_size(rdev);

@@ -160,6 +161,10 @@ void rs690_vram_info(struct radeon_device *rdev)
        a.full = rfixed_const(16);
        /* core_bandwidth = sclk(Mhz) * 16 */
        rdev->pm.core_bandwidth.full = rfixed_div(rdev->pm.sclk, a);
+
+       tmp = RREG32_MC(R_00005F_MC_MISC_UMA_CNTL);
+       if (G_00005F_MC_SIDE_PORT_PRESENT(tmp))
+               rdev->mc.igp_sideport_enabled = true;
  }
 
  static int rs690_mc_init(struct radeon_device *rdev)

drivers/gpu/drm/radeon/rs690d.h +2 -1

index 62d31e7..e74071e 100644
@@ -233,6 +233,8 @@
  #define   G_006D58_LB_D2_MAX_REQ_OUTSTANDING(x)        (((x) >> 16) & 0xF)
  #define   C_006D58_LB_D2_MAX_REQ_OUTSTANDING           0xFFF0FFFF
 
+#define R_00005F_MC_MISC_UMA_CNTL                    0x00005F
+#define   G_00005F_MC_SIDE_PORT_PRESENT(x)             (((x) >> 31) & 0x1)
 
  #define R_000090_MC_SYSTEM_STATUS                    0x000090
  #define   S_000090_MC_SYSTEM_IDLE(x)                   (((x) & 0x1) << 0)
--

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Quoted 12 lines

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Alex Deucher

2010-01-05 16:32 UTC #2 lore raw

In reply to Dave Airlie

Updated patch to use bios tables attached.

Alex

Quoted 120 lines · Dave Airlie

From: Dave Airlie <[email protected]>

This detects if the sideport memory is enabled on these IGPs, and if it is VRAM is evicted on suspend/resume.

This should fix s/r issues on some IGPs.

TODO:
check rs880 is same as rs780
add rs480 support if possible.

Signed-off-by Dave Airlie <[email protected]>

 6 files changed, 22 insertions(+), 2 deletions(-)

drivers/gpu/drm/radeon/r600.c +7 -0

index 5c6058c..35ff64b 100644
@@ -726,6 +726,13 @@ int r600_mc_init(struct radeon_device *rdev)
        a.full = rfixed_const(100);
        rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk);
        rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a);
+
+       if ((rdev->family == CHIP_RS780) ||
+           (rdev->family == CHIP_RS880)) {
+               tmp = RREG32_MC(R_000012_MC_MISC_UMA_CNTL);
+               if (G_000012_MC_SIDE_PORT_PRESENT(tmp))
+                       rdev->mc.igp_sideport_enabled = true;
+       }
        return 0;
  }

drivers/gpu/drm/radeon/r600d.h +3 -0

index 05894ed..8020a98 100644
@@ -882,4 +882,7 @@
  #define                S_000E60_SOFT_RESET_VMC(x)              (((x) & 1) << 17)
 
  #define R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL          0x5480
+
+#define R_000012_MC_MISC_UMA_CNTL                       0x12
+#define   G_000012_MC_SIDE_PORT_PRESENT(x)              (((x) >> 31) & 0x1)
  #endif

drivers/gpu/drm/radeon/radeon.h +1 -0

index 53b5560..0b00b41 100644
@@ -319,6 +319,7 @@ struct radeon_mc {
        u64                     real_vram_size;
        int                     vram_mtrr;
        bool                    vram_is_ddr;
+       bool                    igp_sideport_enabled;
  };
 
  int radeon_mc_setup(struct radeon_device *rdev);

drivers/gpu/drm/radeon/radeon_object.c +4 -2

index d9ffe1f..1c70d95 100644
@@ -221,8 +221,10 @@ int radeon_bo_unpin(struct radeon_bo *bo)
  int radeon_bo_evict_vram(struct radeon_device *rdev)
  {
        if (rdev->flags & RADEON_IS_IGP) {
-               /* Useless to evict on IGP chips */
-               return 0;
+               if (rdev->mc.igp_sideport_enabled == false)
+                       /* Useless to evict on IGP chips
+                          unless sideport is in use */
+                       return 0;
        }
        return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM);
  }

drivers/gpu/drm/radeon/rs690.c +5 -0

index 1e22f52..74cc57c 100644
@@ -132,6 +132,7 @@ void rs690_pm_info(struct radeon_device *rdev)
  void rs690_vram_info(struct radeon_device *rdev)
  {
        fixed20_12 a;
+       u32 tmp;
 
        rs400_gart_adjust_size(rdev);

@@ -160,6 +161,10 @@ void rs690_vram_info(struct radeon_device *rdev)
        a.full = rfixed_const(16);
        /* core_bandwidth = sclk(Mhz) * 16 */
        rdev->pm.core_bandwidth.full = rfixed_div(rdev->pm.sclk, a);
+
+       tmp = RREG32_MC(R_00005F_MC_MISC_UMA_CNTL);
+       if (G_00005F_MC_SIDE_PORT_PRESENT(tmp))
+               rdev->mc.igp_sideport_enabled = true;
  }
 
  static int rs690_mc_init(struct radeon_device *rdev)

drivers/gpu/drm/radeon/rs690d.h +2 -1

index 62d31e7..e74071e 100644
@@ -233,6 +233,8 @@
  #define   G_006D58_LB_D2_MAX_REQ_OUTSTANDING(x)        (((x) >> 16) & 0xF)
  #define   C_006D58_LB_D2_MAX_REQ_OUTSTANDING           0xFFF0FFFF
 
+#define R_00005F_MC_MISC_UMA_CNTL                    0x00005F
+#define   G_00005F_MC_SIDE_PORT_PRESENT(x)             (((x) >> 31) & 0x1)
 
  #define R_000090_MC_SYSTEM_STATUS                    0x000090
  #define   S_000090_MC_SYSTEM_IDLE(x)                   (((x) & 0x1) << 0)
--

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From 6dda9228a6fa53cbc0ebcba90b111570fecac1cf Mon Sep 17 00:00:00 2001
From: Alex Deucher <[email protected]>
Date: Tue, 5 Jan 2010 11:27:29 -0500
Subject: [PATCH] drm/radeon/kms: detect sideport memory on IGP chips

This detects if the sideport memory is enabled and if it is VRAM is evicted on suspend/resume.

This should fix s/r issues on some IGPs.

Signed-off-by Alex Deucher <[email protected]>

---
 drivers/gpu/drm/radeon/r600.c            |    4 +++
 drivers/gpu/drm/radeon/radeon.h          |    4 ++-
 drivers/gpu/drm/radeon/radeon_atombios.c |   37 ++++++++++++++++++++++++++++++
 drivers/gpu/drm/radeon/radeon_combios.c  |   14 +++++++++++
 drivers/gpu/drm/radeon/radeon_object.c   |    5 ++-
 drivers/gpu/drm/radeon/rs400.c           |    1 +
 drivers/gpu/drm/radeon/rs600.c           |    1 +
 drivers/gpu/drm/radeon/rs690.c           |    1 +
 8 files changed, 64 insertions(+), 3 deletions(-)

drivers/gpu/drm/radeon/r600.c +4 -0

index 5c429c5..baae5ea 100644
@@ -726,6 +726,10 @@ int r600_mc_init(struct radeon_device *rdev)
 	a.full = rfixed_const(100);
 	rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk);
 	rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a);
+
+	if (rdev->flags & RADEON_IS_IGP)
+		rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
+
 	return 0;
 }

drivers/gpu/drm/radeon/radeon.h +3 -1

index d34db3f..296bd6f 100644
@@ -323,10 +323,12 @@ struct radeon_mc {
 	u64			real_vram_size;
 	int			vram_mtrr;
 	bool			vram_is_ddr;
+	bool                    igp_sideport_enabled;
 };
 
 int radeon_mc_setup(struct radeon_device *rdev);
-
+bool radeon_combios_sideport_present(struct radeon_device *rdev);
+bool radeon_atombios_sideport_present(struct radeon_device *rdev);
 
 /*
  * GPU scratch registers structures, functions & helpers

drivers/gpu/drm/radeon/radeon_atombios.c +37 -0

index 2b903a9..69fdfda 100644
@@ -936,6 +936,43 @@ bool radeon_atom_get_clock_info(struct drm_device *dev)
 	return false;
 }
 
+union igp_info {
+	struct _ATOM_INTEGRATED_SYSTEM_INFO info;
+	struct _ATOM_INTEGRATED_SYSTEM_INFO_V2 info_2;
+};
+
+bool radeon_atombios_sideport_present(struct radeon_device *rdev)
+{
+	struct radeon_mode_info *mode_info = &rdev->mode_info;
+	int index = GetIndexIntoMasterTable(DATA, IntegratedSystemInfo);
+	union igp_info *igp_info;
+	u8 frev, crev;
+	u16 data_offset;
+
+	atom_parse_data_header(mode_info->atom_context, index, NULL, &frev,
+			       &crev, &data_offset);
+
+	igp_info = (union igp_info *)(mode_info->atom_context->bios +
+				      data_offset);
+
+	if (igp_info) {
+		switch (crev) {
+		case 1:
+			if (igp_info->info.ucMemoryType & 0xf0)
+				return true;
+			break;
+		case 2:
+			if (igp_info->info_2.ucMemoryType & 0x0f)
+				return true;
+			break;
+		default:
+			DRM_ERROR("Unsupported IGP table: %d %d\n", frev, crev);
+			break;
+		}
+	}
+	return false;
+}
+
 bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
 				   struct radeon_encoder_int_tmds *tmds)
 {

drivers/gpu/drm/radeon/radeon_combios.c +14 -0

index 7018f32..611eeb6 100644
@@ -595,6 +595,20 @@ bool radeon_combios_get_clock_info(struct drm_device *dev)
 	return false;
 }
 
+bool radeon_combios_sideport_present(struct radeon_device *rdev)
+{
+	struct drm_device *dev = rdev->ddev;
+	u16 igp_info;
+
+	igp_info = combios_get_table_offset(dev, COMBIOS_INTEGRATED_SYSTEM_INFO_TABLE);
+
+	if (igp_info) {
+		if (RBIOS16(igp_info + 0x4))
+			return true;
+	}
+	return false;
+}
+
 static const uint32_t default_primarydac_adj[CHIP_LAST] = {
 	0x00000808,		/* r100  */
 	0x00000808,		/* rv100 */

drivers/gpu/drm/radeon/radeon_object.c +3 -2

index d9ffe1f..4e636de 100644
@@ -221,8 +221,9 @@ int radeon_bo_unpin(struct radeon_bo *bo)
 int radeon_bo_evict_vram(struct radeon_device *rdev)
 {
 	if (rdev->flags & RADEON_IS_IGP) {
-		/* Useless to evict on IGP chips */
-		return 0;
+		if (rdev->mc.igp_sideport_enabled == false)
+			/* Useless to evict on IGP chips */
+			return 0;
 	}
 	return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM);
 }

drivers/gpu/drm/radeon/rs400.c +1 -0

index 368415d..bf7b3cf 100644
@@ -356,6 +356,7 @@ static int rs400_mc_init(struct radeon_device *rdev)
 	rdev->mc.vram_location = G_00015C_MC_FB_START(tmp) << 16;
 	rdev->mc.gtt_location = 0xFFFFFFFFUL;
 	r = radeon_mc_setup(rdev);
+	rdev->mc.igp_sideport_enabled = radeon_combios_sideport_present(rdev);
 	if (r)
 		return r;
 	return 0;

drivers/gpu/drm/radeon/rs600.c +1 -0

index 56383db..c1ceee5 100644
@@ -56,6 +56,7 @@ int rs600_mc_init(struct radeon_device *rdev)
 	rdev->mc.vram_location = G_000004_MC_FB_START(tmp) << 16;
 	rdev->mc.gtt_location = 0xffffffffUL;
 	r = radeon_mc_setup(rdev);
+	rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
 	if (r)
 		return r;
 	return 0;

drivers/gpu/drm/radeon/rs690.c +1 -0

index 1e22f52..42f2720 100644
@@ -172,6 +172,7 @@ static int rs690_mc_init(struct radeon_device *rdev)
 	rdev->mc.vram_location = G_000100_MC_FB_START(tmp) << 16;
 	rdev->mc.gtt_location = 0xFFFFFFFFUL;
 	r = radeon_mc_setup(rdev);
+	rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
 	if (r)
 		return r;
 	return 0;

Signature · 1 line

1.5.6.3

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Rafał Miłecki

2010-01-06 23:31 UTC #3 lore raw

2010/1/5 Alex Deucher <[email protected]>:

Quoted 1 line

Updated patch to use bios tables attached.

What about reading clock of sideport memory? Standard way? Could we do following?

(quoted diff) +0 -0

b/drivers/gpu/drm/radeon/radeon_device.c
index c49cda9..b996a5e 100644

drivers/gpu/drm/radeon/radeon_device.c +1 -1

@@ -392,7 +392,7 @@ int radeon_asic_init(struct radeon_device *rdev)
                return -EINVAL;
        }
 
-       if (rdev->flags & RADEON_IS_IGP) {
+       if (rdev->flags & RADEON_IS_IGP && !rdev->mc.igp_sideport_enabled) {
                rdev->asic->get_memory_clock = NULL;
                rdev->asic->set_memory_clock = NULL;
        }

Signature · 13 lines

Rafał

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Alex Deucher

2010-01-06 23:56 UTC #4 lore raw

2010/1/6 Rafał Miłecki <[email protected]>:

Quoted 5 lines

2010/1/5 Alex Deucher <[email protected]>:
Quoted 1 line
Updated patch to use bios tables attached.
What about reading clock of sideport memory? Standard way? Could we do following?

Nope. Sideport mclk is different than the mclk on discrete chips. If you look at the atom tables you'll notice that GetMemoryClock and SetMemoryClock are empty on IGP chips. AFAIK, the sideport clock is not usually changed.

Alex

Quoted 19 lines

drivers/gpu/drm/radeon/radeon_device.c +1 -2

index c49cda9..b996a5e 100644
@@ -392,7 +392,7 @@ int radeon_asic_init(struct radeon_device *rdev)
                return -EINVAL;
        }
 
-       if (rdev->flags & RADEON_IS_IGP) {
+       if (rdev->flags & RADEON_IS_IGP && !rdev->mc.igp_sideport_enabled) {
                rdev->asic->get_memory_clock = NULL;
                rdev->asic->set_memory_clock = NULL;
        }
 
 
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Quoted 2 lines

Rafał