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arm pxafb: add Pixel Clock Divisor (LCCR4_PCDDIV) bit support.

PATCH In review Rodolfo Giometti 3 participants 3 messages Apr 1, 2010 – Jul 12, 2010

Subsystems (4)
Arm (32-bit) Arm sub-architectures Framebuffer layer PXA2xx/PXA3xx support
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Rodolfo Giometti

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#0 lore raw

PATCH 2/19 arm pxafb: add Pixel Clock Divisor (LCCR4_PCDDIV) bit support.

Signed-off-by Rodolfo Giometti <[email protected]>
Acked-by Raffaele Recalcati <[email protected]>
Acked-by Enrico Valtolina <[email protected]>
---
 arch/arm/mach-pxa/include/mach/pxafb.h    |    1 +
 arch/arm/mach-pxa/include/mach/regs-lcd.h |    1 +
 drivers/video/pxafb.c                     |    4 +++-
 3 files changed, 5 insertions(+), 1 deletions(-)
arch/arm/mach-pxa/include/mach/pxafb.h +1 -0
index 160ec83..b2530c5 100644
@@ -61,6 +61,7 @@
 #define LCD_PCLK_EDGE_RISE	(0 << 19)
 #define LCD_PCLK_EDGE_FALL	(1 << 19)
 #define LCD_ALTERNATE_MAPPING	(1 << 20)
+#define LCD_PCDDIV_1		(1 << 21)
 
 /*
  * This structure describes the machine which we are running on.
arch/arm/mach-pxa/include/mach/regs-lcd.h +1 -0
index f82dcea..65b711a 100644
@@ -46,6 +46,7 @@
 #define LCCR4_PAL_FOR_2	(2 << 15)
 #define LCCR4_PAL_FOR_3	(3 << 15)
 #define LCCR4_PAL_FOR_MASK	(3 << 15)
+#define LCCR4_PCDDIV	(1 << 31)
 
 #define FDADR0		(0x200)	/* DMA Channel 0 Frame Descriptor Address Register */
 #define FDADR1		(0x210)	/* DMA Channel 1 Frame Descriptor Address Register */
drivers/video/pxafb.c +3 -1
index 825b665..8cba420 100644
@@ -1355,7 +1355,7 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var,
 	fbi->reg_lccr3 |= pxafb_var_to_lccr3(var);
 
 	fbi->reg_lccr4 = lcd_readl(fbi, LCCR4) & ~LCCR4_PAL_FOR_MASK;
-	fbi->reg_lccr4 |= (fbi->lccr4 & LCCR4_PAL_FOR_MASK);
+	fbi->reg_lccr4 |= (fbi->lccr4 & (LCCR4_PAL_FOR_MASK | LCCR4_PCDDIV));
 	local_irq_restore(flags);
 
 	/*

@@ -1738,6 +1738,8 @@ static void pxafb_decode_mach_info(struct pxafb_info *fbi,
 	fbi->lccr3 |= (lcd_conn & LCD_BIAS_ACTIVE_LOW) ? LCCR3_OEP : 0;
 	fbi->lccr3 |= (lcd_conn & LCD_PCLK_EDGE_FALL)  ? LCCR3_PCP : 0;
 
+	fbi->lccr4 |= (lcd_conn & LCD_PCDDIV_1) ? LCCR4_PCDDIV : 0;
+
 decode_mode:
 	pxafb_setmode(&fbi->fb.var, &inf->modes[0]);
Signature · 1 line
1.6.3.3
#1 lore raw

PATCH 2/19 arm pxafb: add Pixel Clock Divisor (LCCR4_PCDDIV) bit support.

Dne ?t 1. dubna 2010 13:38:11 Rodolfo Giometti napsal(a):

Quoted 3 lines
Signed-off-by Rodolfo Giometti <[email protected]>
Acked-by Raffaele Recalcati <[email protected]>
Acked-by Enrico Valtolina <[email protected]>

Any updates?

Quoted 23 lines
---
 arch/arm/mach-pxa/include/mach/pxafb.h    |    1 +
 arch/arm/mach-pxa/include/mach/regs-lcd.h |    1 +
 drivers/video/pxafb.c                     |    4 +++-
 3 files changed, 5 insertions(+), 1 deletions(-)
(quoted diff) +0 -0

b/arch/arm/mach-pxa/include/mach/pxafb.h index 160ec83..b2530c5 100644

arch/arm/mach-pxa/include/mach/pxafb.h +1 -0
@@ -61,6 +61,7 @@
 #define LCD_PCLK_EDGE_RISE	(0 << 19)
 #define LCD_PCLK_EDGE_FALL	(1 << 19)
 #define LCD_ALTERNATE_MAPPING	(1 << 20)
+#define LCD_PCDDIV_1		(1 << 21)
 
 /*
  * This structure describes the machine which we are running on.
(quoted diff) +0 -0

b/arch/arm/mach-pxa/include/mach/regs-lcd.h index f82dcea..65b711a 100644

arch/arm/mach-pxa/include/mach/regs-lcd.h line 51

Quoted 6 lines
arch/arm/mach-pxa/include/mach/regs-lcd.h +1 -0
@@ -46,6 +46,7 @@
 #define LCCR4_PAL_FOR_2	(2 << 15)
 #define LCCR4_PAL_FOR_3	(3 << 15)
 #define LCCR4_PAL_FOR_MASK	(3 << 15)
+#define LCCR4_PCDDIV	(1 << 31)
 
 #define FDADR0		(0x200)	/* DMA Channel 0 Frame Descriptor

Address Register

arch/arm/mach-pxa/include/mach/regs-lcd.h line 52

Quoted 1 line
arch/arm/mach-pxa/include/mach/regs-lcd.h +0 -0
 */ #define FDADR1		(0x210)	/* DMA Channel 1 Frame Descriptor

Address

Quoted 21 lines

Register */ diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c index 825b665..8cba420 100644

drivers/video/pxafb.c +3 -1
@@ -1355,7 +1355,7 @@ static int pxafb_activate_var(struct
 fb_var_screeninfo *var, fbi->reg_lccr3 |= pxafb_var_to_lccr3(var);
 
 	fbi->reg_lccr4 = lcd_readl(fbi, LCCR4) & ~LCCR4_PAL_FOR_MASK;
-	fbi->reg_lccr4 |= (fbi->lccr4 & LCCR4_PAL_FOR_MASK);
+	fbi->reg_lccr4 |= (fbi->lccr4 & (LCCR4_PAL_FOR_MASK | LCCR4_PCDDIV));
 	local_irq_restore(flags);
 
 	/*

@@ -1738,6 +1738,8 @@ static void pxafb_decode_mach_info(struct pxafb_info
 *fbi, fbi->lccr3 |= (lcd_conn & LCD_BIAS_ACTIVE_LOW) ? LCCR3_OEP : 0;
 	fbi->lccr3 |= (lcd_conn & LCD_PCLK_EDGE_FALL)  ? LCCR3_PCP : 0;
 
+	fbi->lccr4 |= (lcd_conn & LCD_PCDDIV_1) ? LCCR4_PCDDIV : 0;
+
 decode_mode:
 	pxafb_setmode(&fbi->fb.var, &inf->modes[0]);
#2 lore raw

PATCH 2/19 arm pxafb: add Pixel Clock Divisor (LCCR4_PCDDIV) bit support.

Quoted 6 lines · Marek Vasut

Dne ??t 1. dubna 2010 13:38:11 Rodolfo Giometti napsal(a):

Quoted 3 lines
Signed-off-by Rodolfo Giometti <[email protected]>
Acked-by Raffaele Recalcati <[email protected]>
Acked-by Enrico Valtolina <[email protected]>

Any updates?

Currently not. I didn't tested the patch on latest kernel releases.

Ciao,

Rodolfo

Signature · 5 lines
GNU/Linux Solutions                  e-mail: giometti at enneenne.com
Linux Device Driver                          giometti at linux.it
Embedded Systems                     phone:  +39 349 2432127
UNIX programming                     skype:  rodolfo.giometti
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