ppc/85xx: Use CONFIG_NS16550_MIN_FUNCTIONS to reduce NAND_SPL size
PATCH 1/1 ppc/85xx: Use CONFIG_NS16550_MIN_FUNCTIONS to reduce NAND_SPL size
The MPC8536DS_NAND SPL build was failing due to code size increase introduced by commit:
commit 33f57bd553edf29dffef5a6c7d76e169c79a6049
Author: Kumar Gala <[email protected]> Date: Fri Mar 26 15:14:43 2010 -0500
85xx: Fix enabling of L1 cache parity on secondary cores
We built in some NS16550 functions that we dont need and can get rid of them via CONFIG_NS16550_MIN_FUNCTIONS.
--- include/configs/MPC8536DS.h | 3 +++ include/configs/MPC8569MDS.h | 3 +++ include/configs/P1_P2_RDB.h | 3 +++ 3 files changed, 9 insertions(+), 0 deletions(-)
include/configs/MPC8536DS.h +3 -0
@@ -413,6 +413,9 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);#define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) +#ifdef CONFIG_NAND_SPL +#define CONFIG_NS16550_MIN_FUNCTIONS +#endif #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
include/configs/MPC8569MDS.h +3 -0
@@ -284,6 +284,9 @@ extern unsigned long get_clock_freq(void);#define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) +#ifdef CONFIG_NAND_SPL +#define CONFIG_NS16550_MIN_FUNCTIONS +#endif #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
include/configs/P1_P2_RDB.h +3 -0
@@ -286,6 +286,9 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);#define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) +#ifdef CONFIG_NAND_SPL +#define CONFIG_NS16550_MIN_FUNCTIONS +#endif #define CONFIG_SERIAL_MULTI 1/* Enable both serial ports */ #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* determine from environment */
Signature · 1 line
1.6.0.6
PATCH 1/1 ppc/85xx: Use CONFIG_NS16550_MIN_FUNCTIONS to reduce NAND_SPL size
Quoted 12 lines · Kumar Gala
The
MPC8536DS_NANDSPL build was failing due to code size increase introduced by commit:commit
33f57bd553edf29dffef5a6c7d76e169c79a6049Author: Kumar Gala <[email protected]> Date: Fri Mar 26 15:14:43 2010 -050085xx: Fix enabling of L1 cache parity on secondary cores
We built in some NS16550 functions that we dont need and can get rid of them via
CONFIG_NS16550_MIN_FUNCTIONS.
Quoted 6 lines
Signed-off-by Kumar Gala <[email protected]>---
include/configs/MPC8536DS.h | 3 +++ include/configs/MPC8569MDS.h | 3 +++ include/configs/P1_P2_RDB.h | 3 +++ 3 files changed, 9 insertions(+), 0 deletions(-)
If there are any plans for a v2010.03.1 please pick this patch up.
- k
Kumar Gala
AppliedPATCH 1/1 ppc/85xx: Use CONFIG_NS16550_MIN_FUNCTIONS to reduce NAND_SPL size
In reply to Kumar GalaQuoted 12 lines · Kumar Gala
The
MPC8536DS_NANDSPL build was failing due to code size increase introduced by commit:commit
33f57bd553edf29dffef5a6c7d76e169c79a6049Author: Kumar Gala <[email protected]> Date: Fri Mar 26 15:14:43 2010 -050085xx: Fix enabling of L1 cache parity on secondary cores
We built in some NS16550 functions that we dont need and can get rid of them via
CONFIG_NS16550_MIN_FUNCTIONS.
Quoted 6 lines
Signed-off-by Kumar Gala <[email protected]>---
include/configs/MPC8536DS.h | 3 +++ include/configs/MPC8569MDS.h | 3 +++ include/configs/P1_P2_RDB.h | 3 +++ 3 files changed, 9 insertions(+), 0 deletions(-)
applied to 85xx
- k