ppc: Split MPC83xx SERDES code from MPC85xx/MPC86xx/QorIQ

PATCH New Kumar Gala 3 participants 8 messages Apr 20, 2010 – Apr 28, 2010 Block layer

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Kumar Gala

author

2010-04-20 15:39 UTC #0 lore raw

PATCH 1/4 ppc: Split MPC83xx SERDES code from MPC85xx/MPC86xx/QorIQ

The MPC83xx SERDES control is different from the other FSL PPC chips. For now lets split it out so we can standardize on interfaces for determining of a device on SERDES is configured.

Signed-off-by Kumar Gala <[email protected]>

---
 arch/ppc/cpu/mpc83xx/serdes.c             |    2 +-
 arch/ppc/include/asm/fsl_mpc83xx_serdes.h |   36 +++++++++++++++++++++++++++++
 board/freescale/mpc837xemds/mpc837xemds.c |    2 +-
 board/freescale/mpc837xemds/pci.c         |    2 +-
 board/freescale/mpc837xerdb/mpc837xerdb.c |    2 +-
 5 files changed, 40 insertions(+), 4 deletions(-)
 create mode 100644 arch/ppc/include/asm/fsl_mpc83xx_serdes.h

arch/ppc/cpu/mpc83xx/serdes.c +1 -1

index 64033fe..fecfc80 100644
@@ -15,7 +15,7 @@
 #include <config.h>
 #include <common.h>
 #include <asm/io.h>
-#include <asm/fsl_serdes.h>
+#include <asm/fsl_mpc83xx_serdes.h>
 
 /* SerDes registers */
 #define FSL_SRDSCR0_OFFS		0x0

arch/ppc/include/asm/fsl_mpc83xx_serdes.h new file +36 -0

new file mode 100644
index 0000000..2d813f4
@@ -0,0 +1,36 @@
+/*
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __FSL_MPC83XX_SERDES_H
+#define __FSL_MPC83XX_SERDES_H
+
+#include <config.h>
+
+#define FSL_SERDES_CLK_100		(0 << 28)
+#define FSL_SERDES_CLK_125		(1 << 28)
+#define FSL_SERDES_CLK_150		(3 << 28)
+#define FSL_SERDES_PROTO_SATA		0
+#define FSL_SERDES_PROTO_PEX		1
+#define FSL_SERDES_PROTO_PEX_X2		2
+#define FSL_SERDES_PROTO_SGMII		3
+#define FSL_SERDES_VDD_1V		1
+
+extern void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd);
+
+#endif /* __FSL_MPC83XX_SERDES_H */

board/freescale/mpc837xemds/mpc837xemds.c +1 -1

index 9d8b18d..32a87ad 100644
@@ -14,7 +14,7 @@
 #include <hwconfig.h>
 #include <i2c.h>
 #include <asm/io.h>
-#include <asm/fsl_serdes.h>
+#include <asm/fsl_mpc83xx_serdes.h>
 #include <spd_sdram.h>
 #include <tsec.h>
 #include <libfdt.h>

board/freescale/mpc837xemds/pci.c +1 -1

index 6b7b8b2..82f34f8 100644
@@ -18,7 +18,7 @@
 #include <i2c.h>
 #include <fdt_support.h>
 #include <asm/fsl_i2c.h>
-#include <asm/fsl_serdes.h>
+#include <asm/fsl_mpc83xx_serdes.h>
 
 static struct pci_region pci_regions[] = {
 	{

board/freescale/mpc837xerdb/mpc837xerdb.c +1 -1

index c5c2e40..d636796 100644
@@ -16,7 +16,7 @@
 #include <hwconfig.h>
 #include <i2c.h>
 #include <asm/io.h>
-#include <asm/fsl_serdes.h>
+#include <asm/fsl_mpc83xx_serdes.h>
 #include <fdt_support.h>
 #include <spd_sdram.h>
 #include <vsc7385.h>

Signature · 1 line

1.6.0.6

Kumar Gala

author

2010-04-20 15:39 UTC #1 lore raw

PATCH 2/4 85xx: Add is_serdes_configured() support to MPC8536 SERDES

Add the ability to determine if a given IP block connected on SERDES is configured. This is useful for things like PCIe and SRIO since they are only ever connected on SERDES.

Signed-off-by Kumar Gala <[email protected]>

---
 arch/ppc/cpu/mpc85xx/mpc8536_serdes.c |   79 ++++++++++++++++++++++++++++++--
 arch/ppc/include/asm/fsl_serdes.h     |   53 +++++++++++++++++-----
 2 files changed, 114 insertions(+), 18 deletions(-)

arch/ppc/cpu/mpc85xx/mpc8536_serdes.c +74 -5

index cb6a6f0..7e72f5f 100644
@@ -1,17 +1,31 @@
 /*
- * Copyright (C) 2008 Freescale Semicondutor, Inc.
+ * Copyright 2008,2010 Freescale Semiconductor, Inc.
  *	Dave Liu <[email protected]>
  *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
  */
 
 #include <config.h>
 #include <common.h>
 #include <asm/io.h>
 #include <asm/immap_85xx.h>
+#include <asm/fsl_serdes.h>
 
 /* PORDEVSR register */
 #define GUTS_PORDEVSR_OFFS		0xc

@@ -52,6 +66,61 @@
 #define FSL_SRDSCR3_LANEE_SGMII	0x00000000
 #define FSL_SRDSCR3_LANEE_SATA	0x00150005
 
+
+#define SRDS1_MAX_LANES		8
+#define SRDS2_MAX_LANES		2
+
+static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
+	[0x2] = {PCIE1, PCIE1, PCIE1, PCIE1, NONE, NONE, NONE, NONE},
+	[0x3] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1},
+	[0x5] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2},
+	[0x7] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE3, PCIE3},
+};
+
+static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
+	[0x1] = {SATA1, SATA2},
+	[0x3] = {SATA1, NONE},
+	[0x4] = {SGMII_TSEC1, SGMII_TSEC3},
+	[0x6] = {SGMII_TSEC1, NONE},
+};
+
+int is_serdes_configured(enum srds_prtcl device)
+{
+	int i;
+	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	u32 pordevsr = in_be32(&gur->pordevsr);
+	u32 srds1_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
+				MPC85xx_PORDEVSR_IO_SEL_SHIFT;
+
+	u32 srds2_cfg = (pordevsr & MPC85xx_PORDEVSR_SRDS2_IO_SEL) >>
+				GUTS_PORDEVSR_SERDES2_IO_SEL_SHIFT;
+
+	debug("%s: dev = %d\n", __FUNCTION__, device);
+	debug("PORDEVSR[IO_SEL] = %x\n", srds1_cfg);
+	debug("PORDEVSR[SRDS2_IO_SEL] = %x\n", srds2_cfg);
+
+	if (srds1_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) {
+		printf("Invalid PORDEVSR[IO_SEL] = %d\n", srds1_cfg);
+		return 0;
+	}
+
+	if (srds2_cfg > ARRAY_SIZE(serdes2_cfg_tbl)) {
+		printf("Invalid PORDEVSR[SRDS2_IO_SEL] = %d\n", srds2_cfg);
+		return 0;
+	}
+
+	for (i = 0; i < SRDS1_MAX_LANES; i++) {
+		if (serdes1_cfg_tbl[srds1_cfg][i] == device)
+			return 1;
+	}
+	for (i = 0; i < SRDS2_MAX_LANES; i++) {
+		if (serdes2_cfg_tbl[srds2_cfg][i] == device)
+			return 1;
+	}
+
+	return 0;
+}
+
 void fsl_serdes_init(void)
 {
 	void *guts = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);

arch/ppc/include/asm/fsl_serdes.h +40 ~~-13~~

61 lines not on this page · raw message

Signature · 1 line

1.6.0.6

Kumar Gala

author Applied

2010-04-28 07:55 UTC #2 lore raw

PATCH 2/4 85xx: Add is_serdes_configured() support to MPC8536 SERDES

Quoted 9 lines · Kumar Gala

Add the ability to determine if a given IP block connected on SERDES is configured. This is useful for things like PCIe and SRIO since they are only ever connected on SERDES.
Signed-off-by Kumar Gala <[email protected]>
---
arch/ppc/cpu/mpc85xx/mpc8536_serdes.c |   79 ++++++++++++++++++++++++++++++--
arch/ppc/include/asm/fsl_serdes.h     |   53 +++++++++++++++++-----
2 files changed, 114 insertions(+), 18 deletions(-)

applied to 85xx

- k

Li Yang-R58472

2010-04-22 04:16 UTC #3 lore raw

PATCH 2/4 85xx: Add is_serdes_configured() support toMPC8536 SERDES

In reply to Kumar Gala

Quoted 9 lines

Subject: [U-Boot] [PATCH 2/4] 85xx: Add is_serdes_configured() support toMPC8536 SERDES
Add the ability to determine if a given IP block connected on SERDES is configured. This is useful for things like PCIe and SRIO since they are
only ever connected on SERDES.

Quoted 5 lines

Signed-off-by Kumar Gala <[email protected]>
---
arch/ppc/cpu/mpc85xx/mpc8536_serdes.c | 79
++++++++++++++++++++++++++++++--
arch/ppc/include/asm/fsl_serdes.h | 53 +++++++++++++++++-----

The header change is already in the P2020 serdes patch series. Would you help to merge that patch series and deal with the conflict also?

Thanks,
Leo

Kumar Gala

author

2010-04-20 15:39 UTC #4 lore raw

PATCH 3/4 85xx/mpc8536ds: Use is_serdes_configured() to determine of PCIe enabled

In reply to Kumar Gala

The new is_serdes_configured covers a broader range of devices than the PCI specific code. Use it instead as we convert away from the is_fsl_pci_cfg() code.

Signed-off-by Kumar Gala <[email protected]>

---
 arch/ppc/cpu/mpc8xxx/pci_cfg.c        |   12 ------------
 board/freescale/mpc8536ds/mpc8536ds.c |    7 ++++---
 2 files changed, 4 insertions(+), 15 deletions(-)

arch/ppc/cpu/mpc8xxx/pci_cfg.c +0 ~~-12~~

index 85995ca..186936f 100644
@@ -56,18 +56,6 @@ static struct pci_info pci_config_info[] =
 #elif defined(CONFIG_MPC8536)
 static struct pci_info pci_config_info[] =
 {
-	[LAW_TRGT_IF_PCI] = {
-		.cfg =   0,
-	},
-	[LAW_TRGT_IF_PCIE_1] = {
-		.cfg =   (1 << 2) | (1 << 3) | (1 << 5) | (1 << 7),
-	},
-	[LAW_TRGT_IF_PCIE_2] = {
-		.cfg =   (1 << 5) | (1 << 7),
-	},
-	[LAW_TRGT_IF_PCIE_3] = {
-		.cfg =   (1 << 7),
-	},
 };
 #elif defined(CONFIG_MPC8544)
 static struct pci_info pci_config_info[] =

board/freescale/mpc8536ds/mpc8536ds.c +4 -3

index 253ed18..c181f94 100644
@@ -30,6 +30,7 @@
 #include <asm/fsl_pci.h>
 #include <asm/fsl_ddr_sdram.h>
 #include <asm/io.h>
+#include <asm/fsl_serdes.h>
 #include <spd.h>
 #include <miiphy.h>
 #include <libfdt.h>

@@ -219,7 +220,7 @@ void pci_init_board(void)
 
 	puts("\n");
 #ifdef CONFIG_PCIE3
-	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_3, io_sel);
+	pcie_configured = is_serdes_configured(PCIE3);
 
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)){
 		SET_STD_PCIE_INFO(pci_info[num], 3);

@@ -239,7 +240,7 @@ void pci_init_board(void)
 #endif
 
 #ifdef CONFIG_PCIE1
-	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
+	pcie_configured = is_serdes_configured(PCIE1);
 
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
 		SET_STD_PCIE_INFO(pci_info[num], 1);

@@ -259,7 +260,7 @@ void pci_init_board(void)
 #endif
 
 #ifdef CONFIG_PCIE2
-	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel);
+	pcie_configured = is_serdes_configured(PCIE2);
 
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)){
 		SET_STD_PCIE_INFO(pci_info[num], 2);

Signature · 1 line

1.6.0.6

Kumar Gala

author

2010-04-20 15:39 UTC #5 lore raw

PATCH 4/4 85xx/fsl-sata: Use is_serdes_configured() to determine if SATA is enabled

On the MPC85xx platform if we have SATA its connected on SERDES. Determing if SATA is enabled via sata_initialize should not be board specific and thus we move it out of the MPC8536DS board code.

Additionally, now that we have is_serdes_configured() we can determine if the given SATA port is enabled and error out if its not in the driver.

Signed-off-by Kumar Gala <[email protected]>

---
 arch/ppc/cpu/mpc85xx/cpu_init.c       |   12 ++++++++++++
 board/freescale/mpc8536ds/mpc8536ds.c |   11 -----------
 drivers/block/fsl_sata.c              |   12 ++++++++++++
 3 files changed, 24 insertions(+), 11 deletions(-)

arch/ppc/cpu/mpc85xx/cpu_init.c +12 -0

index b517e06..d06caa9 100644
@@ -30,9 +30,11 @@
 #include <watchdog.h>
 #include <asm/processor.h>
 #include <ioports.h>
+#include <sata.h>
 #include <asm/io.h>
 #include <asm/mmu.h>
 #include <asm/fsl_law.h>
+#include <asm/fsl_serdes.h>
 #include "mp.h"
 
 DECLARE_GLOBAL_DATA_PTR;

@@ -403,3 +405,13 @@ void arch_preboot_os(void)
 
 	setup_ivors();
 }
+
+#if defined(CONFIG_CMD_SATA) && defined(CONFIG_FSL_SATA)
+int sata_initialize(void)
+{
+	if (is_serdes_configured(SATA1) || is_serdes_configured(SATA2))
+		return __sata_initialize();
+
+	return 1;
+}
+#endif

board/freescale/mpc8536ds/mpc8536ds.c +0 ~~-11~~

index c181f94..e4c1855 100644
@@ -482,17 +482,6 @@ get_board_ddr_clk(ulong dummy)
 }
 #endif
 
-int sata_initialize(void)
-{
-	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-	uint sdrs2_io_sel =
-		(gur->pordevsr & MPC85xx_PORDEVSR_SRDS2_IO_SEL) >> 27;
-	if (sdrs2_io_sel & 0x04)
-		return 1;
-
-	return __sata_initialize();
-}
-
 int board_eth_init(bd_t *bis)
 {
 #ifdef CONFIG_TSEC_ENET

drivers/block/fsl_sata.c +12 -0

index 8878560..5875aa8 100644
@@ -22,6 +22,7 @@
 #include <command.h>
 #include <asm/io.h>
 #include <asm/processor.h>
+#include <asm/fsl_serdes.h>
 #include <malloc.h>
 #include <libata.h>
 #include <fis.h>

@@ -129,6 +130,17 @@ int init_sata(int dev)
 		return -1;
 	}
 
+#ifdef CONFIG_MPC85xx
+	if ((dev == 0) && (!is_serdes_configured(SATA1))) {
+		printf("SATA%d [dev = %d] is not enabled\n", dev+1, dev);
+		return -1;
+	}
+	if ((dev == 1) && (!is_serdes_configured(SATA2))) {
+		printf("SATA%d [dev = %d] is not enabled\n", dev+1, dev);
+		return -1;
+	}
+#endif
+
 	/* Allocate SATA device driver struct */
 	sata = (fsl_sata_t *)malloc(sizeof(fsl_sata_t));
 	if (!sata) {

Signature · 1 line

1.6.0.6

Kim Phillips

2010-04-21 15:55 UTC #6 lore raw

PATCH 1/4 ppc: Split MPC83xx SERDES code from MPC85xx/MPC86xx/QorIQ

In reply to Kumar Gala

Quoted 5 lines · On Tue, 20 Apr 2010 10:39:26 -0500 Kumar Gala <[email protected]> wrote:

The MPC83xx SERDES control is different from the other FSL PPC chips. For now lets split it out so we can standardize on interfaces for determining of a device on SERDES is configured.
Signed-off-by Kumar Gala <[email protected]>

Quoted 8 lines

---
 arch/ppc/cpu/mpc83xx/serdes.c             |    2 +-
 arch/ppc/include/asm/fsl_mpc83xx_serdes.h |   36 +++++++++++++++++++++++++++++
 board/freescale/mpc837xemds/mpc837xemds.c |    2 +-
 board/freescale/mpc837xemds/pci.c         |    2 +-
 board/freescale/mpc837xerdb/mpc837xerdb.c |    2 +-
 5 files changed, 40 insertions(+), 4 deletions(-)
 create mode 100644 arch/ppc/include/asm/fsl_mpc83xx_serdes.h

Acked-by Kim Phillips <[email protected]>

(to go through 85xx tree)

Kim

Kumar Gala

author Applied

2010-04-27 03:39 UTC #7 lore raw

PATCH 1/4 ppc: Split MPC83xx SERDES code from MPC85xx/MPC86xx/QorIQ

Quoted 17 lines · Kim Phillips

Quoted 5 lines · On Tue, 20 Apr 2010 10:39:26 -0500 Kumar Gala <[email protected]> wrote:
The MPC83xx SERDES control is different from the other FSL PPC chips. For now lets split it out so we can standardize on interfaces for determining of a device on SERDES is configured.
Signed-off-by Kumar Gala <[email protected]>
Quoted 8 lines
---
arch/ppc/cpu/mpc83xx/serdes.c             |    2 +-
arch/ppc/include/asm/fsl_mpc83xx_serdes.h |   36 +++++++++++++++++++++++++++++
board/freescale/mpc837xemds/mpc837xemds.c |    2 +-
board/freescale/mpc837xemds/pci.c         |    2 +-
board/freescale/mpc837xerdb/mpc837xerdb.c |    2 +-
5 files changed, 40 insertions(+), 4 deletions(-)
create mode 100644 arch/ppc/include/asm/fsl_mpc83xx_serdes.h

Quoted 5 lines

Acked-by Kim Phillips <[email protected]>
(to go through 85xx tree)
Kim

applied to 85xx

- k