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target-sparc: Fix -singlestep.

PATCH Applied Richard Henderson 2 participants 8 messages Apr 25, 2010 – Apr 26, 2010

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#0 lore raw

PATCH 1/2 target-sparc: Fix -singlestep.

Single-stepping was not properly updating npc, resulting in some instructions being executed twice. In addition, we were emitting dead code at the end of the TB.

Fix both by teaching gen_goto_tb to avoid goto_tb for single-step and removing the special-case code in gen_intermediate_code_internal.

---
 target-sparc/translate.c |    7 ++++---
 1 files changed, 4 insertions(+), 3 deletions(-)
target-sparc/translate.c +4 -3
index b54c520..5162b87 100644
@@ -81,6 +81,7 @@ typedef struct DisasContext {
     int address_mask_32bit;
     uint32_t cc_op;  /* current CC operation */
     struct TranslationBlock *tb;
+    CPUState *env;
     sparc_def_t *def;
 } DisasContext;
 
@@ -234,7 +235,8 @@ static inline void gen_goto_tb(DisasContext *s, int tb_num,
 
     tb = s->tb;
     if ((pc & TARGET_PAGE_MASK) == (tb->pc & TARGET_PAGE_MASK) &&
-        (npc & TARGET_PAGE_MASK) == (tb->pc & TARGET_PAGE_MASK))  {
+        (npc & TARGET_PAGE_MASK) == (tb->pc & TARGET_PAGE_MASK) &&
+        !(s->env->singlestep_enabled || singlestep))  {
         /* jump to same page: we can use a direct jump */
         tcg_gen_goto_tb(tb_num);
         tcg_gen_movi_tl(cpu_pc, pc);
@@ -4680,6 +4682,7 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb,
 
     memset(dc, 0, sizeof(DisasContext));
     dc->tb = tb;
+    dc->env = env;
     pc_start = tb->pc;
     dc->pc = pc_start;
     last_pc = dc->pc;
@@ -4755,8 +4758,6 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb,
         /* if single step mode, we generate only one instruction and
            generate an exception */
         if (env->singlestep_enabled || singlestep) {
-            tcg_gen_movi_tl(cpu_pc, dc->pc);
-            tcg_gen_exit_tb(0);
             break;
         }
     } while ((gen_opc_ptr < gen_opc_end) &&
Signature · 1 line
1.6.6.1
#1 lore raw

PATCH 2/2 linux-user: Fix Sparc64 syscall returns.

---
 linux-user/main.c |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)
linux-user/main.c +3 -2
index b394c00..71a1b67 100644
@@ -940,7 +940,8 @@ static void flush_windows(CPUSPARCState *env)
 
 void cpu_loop (CPUSPARCState *env)
 {
-    int trapnr, ret;
+    int trapnr;
+    abi_long ret;
     target_siginfo_t info;
 
     while (1) {
@@ -958,7 +959,7 @@ void cpu_loop (CPUSPARCState *env)
                               env->regwptr[0], env->regwptr[1],
                               env->regwptr[2], env->regwptr[3],
                               env->regwptr[4], env->regwptr[5]);
-            if ((unsigned int)ret >= (unsigned int)(-515)) {
+            if ((abi_ulong)ret >= (abi_ulong)(-515)) {
 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
                 env->xcc |= PSR_CARRY;
 #else
Signature · 1 line
1.6.6.1
Applied
#2 lore raw

[Qemu-devel] Re: [PATCH 2/2] linux-user: Fix Sparc64 syscall returns.

Thanks, applied.

Quoted 33 lines · Richard Henderson

---

  linux-user/main.c |    5 +++--
  1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/linux-user/main.c b/linux-user/main.c index b394c00..71a1b67 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -940,7 +940,8 @@ static void flush_windows(CPUSPARCState *env)

void cpu_loop (CPUSPARCState *env)
{

 -    int trapnr, ret;
 +    int trapnr;
 +    abi_long ret;
     target_siginfo_t info;

     while (1) {
 @@ -958,7 +959,7 @@ void cpu_loop (CPUSPARCState *env)
                               env->regwptr[0], env->regwptr[1],
                               env->regwptr[2], env->regwptr[3],
                               env->regwptr[4], env->regwptr[5]);
 -            if ((unsigned int)ret >= (unsigned int)(-515)) {
 +            if ((abi_ulong)ret >= (abi_ulong)(-515)) {
  #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
                 env->xcc |= PSR_CARRY;

#else

--
1.6.6.1

#3 lore raw
In reply to Richard Henderson
Quoted 6 lines · Richard Henderson

Single-stepping was not properly updating npc, resulting in some
instructions being executed twice. In addition, we were emitting dead code at the end of the TB.

Fix both by teaching gen_goto_tb to avoid goto_tb for single-step and removing the special-case code in gen_intermediate_code_internal.

Nice work!

Quoted 9 lines

---

  target-sparc/translate.c |    7 ++++---
  1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/target-sparc/translate.c b/target-sparc/translate.c index b54c520..5162b87 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c

Quoted 5 lines
 @@ -81,6 +81,7 @@ typedef struct DisasContext {
     int address_mask_32bit;
     uint32_t cc_op;  /* current CC operation */
     struct TranslationBlock *tb;

+ CPUState *env;

Instead of CPUState pointer, please create a flag which combines env->singlestep_enabled || singlestep.

Quoted 35 lines
     sparc_def_t *def;

} DisasContext;

@@ -234,7 +235,8 @@ static inline void gen_goto_tb(DisasContext *s, int tb_num,

     tb = s->tb;
     if ((pc & TARGET_PAGE_MASK) == (tb->pc & TARGET_PAGE_MASK) &&
 -        (npc & TARGET_PAGE_MASK) == (tb->pc & TARGET_PAGE_MASK))  {
 +        (npc & TARGET_PAGE_MASK) == (tb->pc & TARGET_PAGE_MASK) &&
 +        !(s->env->singlestep_enabled || singlestep))  {
         /* jump to same page: we can use a direct jump */
         tcg_gen_goto_tb(tb_num);
         tcg_gen_movi_tl(cpu_pc, pc);

@@ -4680,6 +4682,7 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb,

     memset(dc, 0, sizeof(DisasContext));
     dc->tb = tb;
 +    dc->env = env;
     pc_start = tb->pc;
     dc->pc = pc_start;
     last_pc = dc->pc;
 @@ -4755,8 +4758,6 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb,
         /* if single step mode, we generate only one instruction and
            generate an exception */
         if (env->singlestep_enabled || singlestep) {
 -            tcg_gen_movi_tl(cpu_pc, dc->pc);
 -            tcg_gen_exit_tb(0);
             break;
         }
     } while ((gen_opc_ptr < gen_opc_end) &&

--
1.6.6.1

#4 lore raw

PATCH 1/1 target-sparc: Fix -singlestep.

Single-stepping was not properly updating npc, resulting in some instructions being executed twice. In addition, we were emitting dead code at the end of the TB.

Fix both by teaching gen_goto_tb to avoid goto_tb for single-step and removing the special-case code in gen_intermediate_code_internal.

---
 target-sparc/translate.c |    9 +++++----
 1 files changed, 5 insertions(+), 4 deletions(-)
target-sparc/translate.c +5 -4
index b54c520..be2a116 100644
@@ -79,6 +79,7 @@ typedef struct DisasContext {
     int mem_idx;
     int fpu_enabled;
     int address_mask_32bit;
+    int singlestep;
     uint32_t cc_op;  /* current CC operation */
     struct TranslationBlock *tb;
     sparc_def_t *def;
@@ -234,7 +235,8 @@ static inline void gen_goto_tb(DisasContext *s, int tb_num,
 
     tb = s->tb;
     if ((pc & TARGET_PAGE_MASK) == (tb->pc & TARGET_PAGE_MASK) &&
-        (npc & TARGET_PAGE_MASK) == (tb->pc & TARGET_PAGE_MASK))  {
+        (npc & TARGET_PAGE_MASK) == (tb->pc & TARGET_PAGE_MASK) &&
+        !s->singlestep)  {
         /* jump to same page: we can use a direct jump */
         tcg_gen_goto_tb(tb_num);
         tcg_gen_movi_tl(cpu_pc, pc);
@@ -4694,6 +4696,7 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb,
 #ifdef TARGET_SPARC64
     dc->address_mask_32bit = env->pstate & PS_AM;
 #endif
+    dc->singlestep = (env->singlestep_enabled || singlestep);
     gen_opc_end = gen_opc_buf + OPC_MAX_SIZE;
 
     cpu_tmp0 = tcg_temp_new();
@@ -4754,9 +4757,7 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb,
             break;
         /* if single step mode, we generate only one instruction and
            generate an exception */
-        if (env->singlestep_enabled || singlestep) {
-            tcg_gen_movi_tl(cpu_pc, dc->pc);
-            tcg_gen_exit_tb(0);
+        if (dc->singlestep) {
             break;
         }
     } while ((gen_opc_ptr < gen_opc_end) &&
Signature · 1 line
1.6.6.1
Applied
#5 lore raw

Thanks, applied.

Quoted 72 lines · Richard Henderson

Single-stepping was not properly updating npc, resulting in some
instructions being executed twice. In addition, we were emitting dead code at the end of the TB.

Fix both by teaching gen_goto_tb to avoid goto_tb for single-step and removing the special-case code in gen_intermediate_code_internal.

---

 target-sparc/translate.c |    9 +++++----
 1 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/target-sparc/translate.c b/target-sparc/translate.c

index b54c520..be2a116 100644

--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c

target-sparc/translate.c +1 -0
@@ -79,6 +79,7 @@ typedef struct DisasContext {
     int mem_idx;
     int fpu_enabled;
     int address_mask_32bit;
 +    int singlestep;
 
     uint32_t cc_op;  /* current CC operation */
     struct TranslationBlock *tb;
 
     sparc_def_t *def;
@@ -234,7 +235,8 @@ static inline void gen_goto_tb(DisasContext *s, int tb_num,
 
     tb = s->tb;
     if ((pc & TARGET_PAGE_MASK) == (tb->pc & TARGET_PAGE_MASK) &&
 -        (npc & TARGET_PAGE_MASK) == (tb->pc & TARGET_PAGE_MASK))  {
 +        (npc & TARGET_PAGE_MASK) == (tb->pc & TARGET_PAGE_MASK) &&
 
+        !s->singlestep)  {
 
         /* jump to same page: we can use a direct jump */
         tcg_gen_goto_tb(tb_num);
         tcg_gen_movi_tl(cpu_pc, pc);
(quoted diff) +1 -0
@@ -4694,6 +4696,7 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb,
  #ifdef TARGET_SPARC64
     dc->address_mask_32bit = env->pstate & PS_AM;
  #endif
 +    dc->singlestep = (env->singlestep_enabled || singlestep);
     gen_opc_end = gen_opc_buf + OPC_MAX_SIZE;
 
     cpu_tmp0 = tcg_temp_new();
 @@ -4754,9 +4757,7 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb,
             break;
 
         /* if single step mode, we generate only one instruction and
            generate an exception */
 -        if (env->singlestep_enabled || singlestep) {
 -            tcg_gen_movi_tl(cpu_pc, dc->pc);
 -            tcg_gen_exit_tb(0);
 
+        if (dc->singlestep) {
 
             break;
         }
     } while ((gen_opc_ptr < gen_opc_end) &&
 --
 1.6.6.1
#6 lore raw

PATCH 1/1 linux-user: Fix sparc32plus stat64 syscalls.

In reply to Blue Swirl

Check TARGET_ABI_BITS, not TARGET_LONG_BITS, when deciding whether or not the guest needs special 64-bit stat translation.

---
 linux-user/syscall.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
linux-user/syscall.c +1 -1
index 26c0fb4..eb77ade 100644
@@ -4021,7 +4021,7 @@ static inline abi_long host_to_target_stat64(void *cpu_env,
     } else
 #endif
     {
-#if (TARGET_LONG_BITS == 64) && (!defined(TARGET_ALPHA))
+#if TARGET_ABI_BITS == 64 && !defined(TARGET_ALPHA)
         struct target_stat *target_st;
 #else
         struct target_stat64 *target_st;
Signature · 1 line
1.6.6.1
Applied
#7 lore raw

[Qemu-devel] Re: [PATCH] linux-user: Fix sparc32plus stat64 syscalls.

Thanks, applied.

Quoted 26 lines · Richard Henderson

Check TARGET_ABI_BITS, not TARGET_LONG_BITS, when deciding
whether or not the guest needs special 64-bit stat translation.

---

  linux-user/syscall.c |    2 +-
  1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 26c0fb4..eb77ade 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -4021,7 +4021,7 @@ static inline abi_long host_to_target_stat64(void *cpu_env,

     } else
  #endif
     {
 -#if (TARGET_LONG_BITS == 64) && (!defined(TARGET_ALPHA))
 +#if TARGET_ABI_BITS == 64 && !defined(TARGET_ALPHA)
         struct target_stat *target_st;
  #else
         struct target_stat64 *target_st;

--
1.6.6.1