qemu: kvm: Extend kvm_arch_get_supported_cpuid() to support index
PATCH 1/2 qemu: kvm: Extend kvm_arch_get_supported_cpuid() to support index
Would use it later for XSAVE related CPUID.
Signed-off-by Sheng Yang <[email protected]>
--- kvm.h | 2 +- qemu-kvm-x86.c | 8 ++++---- target-i386/kvm.c | 19 +++++++++++-------- 3 files changed, 16 insertions(+), 13 deletions(-)
kvm.h +1 -1
@@ -152,7 +152,7 @@ bool kvm_arch_stop_on_emulation_error(CPUState *env);int kvm_check_extension (KVMState *s,unsigned int extension);uint32_t kvm_arch_get_supported_cpuid (CPUState *env,uint32_t function, -int reg); +uint32_t index,int reg);void kvm_cpu_synchronize_state (CPUState *env);void kvm_cpu_synchronize_post_reset (CPUState *env);void kvm_cpu_synchronize_post_init (CPUState *env);
qemu-kvm-x86.c +4 -4
@@ -1188,18 +1188,18 @@ int kvm_arch_init_vcpu(CPUState *cenv)#endif kvm_trim_features (&cenv->cpuid_features, -kvm_arch_get_supported_cpuid (cenv,1 ,R_EDX )); +kvm_arch_get_supported_cpuid (cenv,1 ,0 ,R_EDX ));/* prevent the hypervisor bit from being cleared by the kernel */ i = cenv->cpuid_ext_features &CPUID_EXT_HYPERVISOR ;kvm_trim_features (&cenv->cpuid_ext_features, -kvm_arch_get_supported_cpuid (cenv,1 ,R_ECX )); +kvm_arch_get_supported_cpuid (cenv,1 ,0 ,R_ECX )); cenv->cpuid_ext_features |= i;kvm_trim_features (&cenv->cpuid_ext2_features, -kvm_arch_get_supported_cpuid (cenv,0x80000001 ,R_EDX )); +kvm_arch_get_supported_cpuid (cenv,0x80000001 ,0 ,R_EDX ));kvm_trim_features (&cenv->cpuid_ext3_features, -kvm_arch_get_supported_cpuid (cenv,0x80000001 ,R_ECX )); +kvm_arch_get_supported_cpuid (cenv,0x80000001 ,0 ,R_ECX )); copy = *cenv;
target-i386/kvm.c +11 -8
@@ -71,7 +71,8 @@ static struct kvm_cpuid2 *try_get_cpuid(KVMState *s, int max)return cpuid; } -uint32_t kvm_arch_get_supported_cpuid (CPUState *env,uint32_t function,int reg) +uint32_t kvm_arch_get_supported_cpuid (CPUState *env,uint32_t function, +uint32_t index,int reg) {struct kvm_cpuid2 *cpuid;int i, max;
@@ -88,7 +89,8 @@ uint32_t kvm_arch_get_supported_cpuid(CPUState *env, uint32_t function, int reg) }for (i =0 ; i < cpuid->nent; ++i) { -if (cpuid->entries[i].function == function) { +if (cpuid->entries[i].function == function && + cpuid->entries[i].index == index) {switch (reg) {case R_EAX : ret = cpuid->entries[i].eax;
@@ -110,7 +112,7 @@ uint32_t kvm_arch_get_supported_cpuid(CPUState *env, uint32_t function, int reg)/* On Intel, kvm returns cpuid according to the Intel spec, * so add missing bits according to the AMD spec: */ - cpuid_1_edx =kvm_arch_get_supported_cpuid (env,1 ,R_EDX ); + cpuid_1_edx =kvm_arch_get_supported_cpuid (env,1 ,0 ,R_EDX ); ret |= cpuid_1_edx &0x183f7ff ;break ; }
@@ -126,7 +128,8 @@ uint32_t kvm_arch_get_supported_cpuid(CPUState *env, uint32_t function, int reg)#else -uint32_t kvm_arch_get_supported_cpuid (CPUState *env,uint32_t function,int reg) +uint32_t kvm_arch_get_supported_cpuid (CPUState *env,uint32_t function, +uint32_t index,int reg) {return -1U ; }
@@ -180,16 +183,16 @@ int kvm_arch_init_vcpu(CPUState *env) env->mp_state =KVM_MP_STATE_RUNNABLE ; - env->cpuid_features &=kvm_arch_get_supported_cpuid (env,1 ,R_EDX ); + env->cpuid_features &=kvm_arch_get_supported_cpuid (env,1 ,0 ,R_EDX ); i = env->cpuid_ext_features &CPUID_EXT_HYPERVISOR ; - env->cpuid_ext_features &=kvm_arch_get_supported_cpuid (env,1 ,R_ECX ); + env->cpuid_ext_features &=kvm_arch_get_supported_cpuid (env,1 ,0 ,R_ECX ); env->cpuid_ext_features |= i; env->cpuid_ext2_features &=kvm_arch_get_supported_cpuid (env,0x80000001 , -R_EDX ); +0 ,R_EDX ); env->cpuid_ext3_features &=kvm_arch_get_supported_cpuid (env,0x80000001 , -R_ECX ); +0 ,R_ECX ); cpuid_i =0 ;
Signature · 1 line
1.7.0.1
PATCH 2/2 qemu: Enable XSAVE related CPUID
We can support it in KVM now. The 0xd leaf is queried from KVM.
Signed-off-by Sheng Yang <[email protected]>
--- target-i386/cpuid.c | 21 +++++++++++++++++++++ 1 files changed, 21 insertions(+), 0 deletions(-)
target-i386/cpuid.c +21 -0
@@ -1067,6 +1067,27 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, *ecx =0 ; *edx =0 ;break ; +case 0xD : +/* Processor Extended State */ +if (!(env->cpuid_ext_features &CPUID_EXT_XSAVE )) { + *eax =0 ; + *ebx =0 ; + *ecx =0 ; + *edx =0 ; +break ; + } +if (kvm_enabled ()) { + *eax =kvm_arch_get_supported_cpuid (env,0xd , count,R_EAX ); + *ebx =kvm_arch_get_supported_cpuid (env,0xd , count,R_EBX ); + *ecx =kvm_arch_get_supported_cpuid (env,0xd , count,R_ECX ); + *edx =kvm_arch_get_supported_cpuid (env,0xd , count,R_EDX ); + }else { + *eax =0 ; + *ebx =0 ; + *ecx =0 ; + *edx =0 ; + } +break ;case 0x80000000 : *eax = env->cpuid_xlevel; *ebx = env->cpuid_vendor1;
Signature · 1 line
1.7.0.1