add support for arm926ejs-based pollux CPU

PATCH New Brian Cavagnolo 2 participants 8 messages Jun 1, 2010 – Jun 21, 2010

Subsystems (2)

Arm (32-bit) Kbuild

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Brian Cavagnolo

author

2010-06-01 18:42 UTC #0 lore raw

PATCH 1/3 add support for arm926ejs-based pollux CPU

Signed-off-by Brian Cavagnolo <[email protected]>

Signed-off-by Andrey Yurovsky <[email protected]>

---
 arch/arm/cpu/arm926ejs/pollux/Makefile    |   51 ++++++++
 arch/arm/cpu/arm926ejs/pollux/reset.S     |   49 ++++++++
 arch/arm/cpu/arm926ejs/pollux/timer.c     |  190 +++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-pollux/clkpwr.h |   83 +++++++++++++
 arch/arm/include/asm/arch-pollux/gpio.h   |  143 ++++++++++++++++++++++
 arch/arm/include/asm/arch-pollux/reg.h    |   39 ++++++
 arch/arm/include/asm/arch-pollux/timer.h  |   59 +++++++++
 arch/arm/include/asm/arch-pollux/uart.h   |  105 ++++++++++++++++
 8 files changed, 719 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/cpu/arm926ejs/pollux/Makefile
 create mode 100644 arch/arm/cpu/arm926ejs/pollux/reset.S
 create mode 100644 arch/arm/cpu/arm926ejs/pollux/timer.c
 create mode 100644 arch/arm/include/asm/arch-pollux/clkpwr.h
 create mode 100644 arch/arm/include/asm/arch-pollux/gpio.h
 create mode 100644 arch/arm/include/asm/arch-pollux/reg.h
 create mode 100644 arch/arm/include/asm/arch-pollux/timer.h
 create mode 100644 arch/arm/include/asm/arch-pollux/uart.h

arch/arm/cpu/arm926ejs/pollux/Makefile new file +51 -0

new file mode 100644
index 0000000..32803ff
@@ -0,0 +1,51 @@
+# (C) Copyright 2010 cozybit, Inc
+# Brian Cavagnolo <[email protected]>
+#
+# Derived from versatile cpu support:
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(SOC).a
+
+COBJS	= timer.o
+SOBJS	= reset.o
+
+SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS) $(SOBJS))
+START	:= $(addprefix $(obj),$(START))
+
+all:	$(obj).depend $(LIB)
+
+$(LIB):	$(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

arch/arm/cpu/arm926ejs/pollux/reset.S new file +49 -0

49 lines not on this page · raw message

arch/arm/cpu/arm926ejs/pollux/timer.c new file +190 -0

190 lines not on this page · raw message

arch/arm/include/asm/arch-pollux/clkpwr.h new file +83 -0

83 lines not on this page · raw message

arch/arm/include/asm/arch-pollux/gpio.h new file +143 -0

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arch/arm/include/asm/arch-pollux/reg.h new file +39 -0

new file mode 100644
index 0000000..fba6216
@@ -0,0 +1,39 @@
+/* (C) Copyright 2010 cozybit, Inc.
+ * Brian Cavagnolo <[email protected]>
+ *
+ * (C) Copyright 2007 Leapfrog, Inc.
+ * Andrey Yurovsky" <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __REG_H__
+#define __REG_H__
+
+/* register access and manipulation helper macros */
+#define REG8(addr)  (*((volatile unsigned char *)(addr)))
+#define REG16(addr) (*((volatile unsigned short *)(addr)))
+#define REG32(addr) (*((volatile unsigned long *)(addr)))
+
+#define BIT_SET(v,b)    ((v) |= (1<<(b)))
+#define BIT_CLR(v,b)    ((v) &= ~(1<<(b)))
+#define IS_SET(v,b)     ((v) & (1<<(b)))
+#define IS_CLR(v,b)     !((v) & (1<<(b)))
+
+#endif /* __REG_H__ */

arch/arm/include/asm/arch-pollux/timer.h new file +59 -0

59 lines not on this page · raw message

arch/arm/include/asm/arch-pollux/uart.h new file +105 -0

105 lines not on this page · raw message

Signature · 1 line

1.6.0.4

Brian Cavagnolo

author

2010-06-01 18:42 UTC #1 lore raw

PATCH 2/3 add serial driver for pollux CPU

Signed-off-by Brian Cavagnolo <[email protected]>

Signed-off-by Andrey Yurovsky <[email protected]>

---
 drivers/serial/Makefile        |    1 +
 drivers/serial/serial_pollux.c |  116 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 117 insertions(+), 0 deletions(-)
 create mode 100644 drivers/serial/serial_pollux.c

drivers/serial/Makefile +1 -0

index c731bfb..87efd15 100644
@@ -56,6 +56,7 @@ COBJS-$(CONFIG_S3C44B0_SERIAL) += serial_s3c44b0.o
 COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o
 COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o
 COBJS-$(CONFIG_USB_TTY) += usbtty.o
+COBJS-$(CONFIG_POLLUX_SERIAL) += serial_pollux.o
 
 COBJS	:= $(sort $(COBJS-y))
 SRCS	:= $(COBJS:.o=.c)

drivers/serial/serial_pollux.c new file +116 -0

116 lines not on this page · raw message

Signature · 1 line

1.6.0.4

Brian Cavagnolo

author

2010-06-01 18:42 UTC #2 lore raw

PATCH 3/3 add support for pollux-based leapfrog didj

Signed-off-by Brian Cavagnolo <[email protected]>

Signed-off-by Andrey Yurovsky <[email protected]>

---
 Makefile               |    7 +++
 board/didj/Makefile    |   54 ++++++++++++++++++++++++
 board/didj/config.mk   |    1 +
 board/didj/didj.c      |  107 ++++++++++++++++++++++++++++++++++++++++++++++++
 include/configs/didj.h |   71 ++++++++++++++++++++++++++++++++
 5 files changed, 240 insertions(+), 0 deletions(-)
 create mode 100644 board/didj/Makefile
 create mode 100644 board/didj/config.mk
 create mode 100644 board/didj/didj.c
 create mode 100644 include/configs/didj.h

Makefile +7 -0

index c26e491..04d47a6 100644
@@ -3120,6 +3120,13 @@ voiceblue_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm925t voiceblue
 
 #########################################################################
+# pollux Systems
+#########################################################################
+
+didj_config	: unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm926ejs didj NULL pollux
+
+#########################################################################
 ## S3C44B0 Systems
 #########################################################################

board/didj/Makefile new file +54 -0

54 lines not on this page · raw message

board/didj/config.mk new file +1 -0

new file mode 100644
index 0000000..245816f
@@ -0,0 +1 @@
+TEXT_BASE = $(CONFIG_TEXT_BASE)

board/didj/didj.c new file +107 -0

107 lines not on this page · raw message

include/configs/didj.h new file +71 -0

71 lines not on this page · raw message

Signature · 1 line

1.6.0.4

Wolfgang Denk

2010-06-01 19:40 UTC #3 lore raw

PATCH 3/3 add support for pollux-based leapfrog didj

Dear Brian Cavagnolo,

Quoted 3 lines · In message <[email protected]> you wrote:

Signed-off-by Brian Cavagnolo <[email protected]>
Signed-off-by Andrey Yurovsky <[email protected]>

You should probably be a bit more verbose. I guess few people understand what a "pollux-based leapfrog didj" might be.

Quoted 10 lines

 Makefile               |    7 +++
 board/didj/Makefile    |   54 ++++++++++++++++++++++++
 board/didj/config.mk   |    1 +
 board/didj/didj.c      |  107 ++++++++++++++++++++++++++++++++++++++++++++++++
 include/configs/didj.h |   71 ++++++++++++++++++++++++++++++++
 5 files changed, 240 insertions(+), 0 deletions(-)
 create mode 100644 board/didj/Makefile
 create mode 100644 board/didj/config.mk
 create mode 100644 board/didj/didj.c
 create mode 100644 include/configs/didj.h

Entries to MAKEALL and MAINTAINERS missing.

Makefile voiceblue_config: unconfig · line 3127

Quoted 13 lines

Makefile +5 -0

index c26e491..04d47a6 100644
@@ -3120,6 +3120,13 @@ voiceblue_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm925t voiceblue
 
 #########################################################################
+# pollux Systems
+#########################################################################
+
+didj_config	: unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm926ejs didj NULL pollux

Please keep lists sorted.

...

Makefile voiceblue_config: unconfig · line 3128

Quoted 1 line

Makefile +1 -0

+#define UARTDIV		((((PLL1_FREQ<<1)/(115200*(DEFAULT_BRD + 1)*16)) + 1)>>1)

Line too long, please fix globally.

Makefile voiceblue_config: unconfig

Quoted 11 lines

Makefile +11 -0

+int board_init (void)
+{
+
+	unsigned long tmp;
+
+	icache_enable();
+
+	/* Didj uses PLL0 for the CPU clock at 393216000 Hz */
+	REG32(PLLSETREG0) = PLL_REG(801, 55, 0);
+	/* PLL1 (bus clock) 147000000 Hz */
+	REG32(PLLSETREG1) = PLL_REG(196, 9, 2);

NAK. Please use C structs with proper I/O accessors instead.

Makefile

Quoted 4 lines

Makefile +4 -0

+	/* UART0 pins can either be a UART or GPIO.  We want UART.  For this we
+	 * must configure GPIOA, pin 8 to be the UART TX, which is it's
+	 * alternative function.
+	 */

Incorrect multiline comment style. please fix globally.

Best regards,

Wolfgang Denk

Signature · 4 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"It's like deja vu all over again."                      - Yogi Berra

Wolfgang Denk

2010-06-01 19:42 UTC #4 lore raw

PATCH 2/3 add serial driver for pollux CPU

In reply to Brian Cavagnolo

Dear Brian Cavagnolo,

Quoted 8 lines · In message <[email protected]> you wrote:

Signed-off-by Brian Cavagnolo <[email protected]>
Signed-off-by Andrey Yurovsky <[email protected]>
---
 drivers/serial/Makefile        |    1 +
 drivers/serial/serial_pollux.c |  116 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 117 insertions(+), 0 deletions(-)
 create mode 100644 drivers/serial/serial_pollux.c

Please see previous comments about using C structs with I/O accessors, coding style etc.

General question: do we really need a new UART driver, or can this be generalized with other drivers?

Best regards,

Wolfgang Denk

Signature · 5 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"Unix is simple, but it takes a genius to understand the simplicity."
					             - Dennis Ritchie

Brian Cavagnolo

author

2010-06-21 12:25 UTC #5 lore raw

PATCH 2/3 add serial driver for pollux CPU

Quoted 12 lines · Wolfgang Denk

Dear Brian Cavagnolo,
Quoted 8 lines · In message <[email protected]> you wrote:
Signed-off-by Brian Cavagnolo <[email protected]>
Signed-off-by Andrey Yurovsky <[email protected]>
---
?drivers/serial/Makefile ? ? ? ?| ? ?1 + ?drivers/serial/serial_pollux.c | ?116 ++++++++++++++++++++++++++++++++++++++++ ?2 files changed, 117 insertions(+), 0 deletions(-)
?create mode 100644 drivers/serial/serial_pollux.c

Quoted 2 lines

Please see previous comments about using C structs with I/O accessors, coding style etc.

Understood.

Quoted 2 lines

General question: do we really need a new UART driver, or can this be generalized with other drivers?

The s3c44b0 serial hardware is quite similar to that of the pollux. There are some quirks (e.g., the pollux's registers are 16 bits and the s3c44b0's are 32), but I think there are some reasonable ways to address that. I'll use that driver in v2.

Thanks,
Brian

Wolfgang Denk

2010-06-01 19:38 UTC #6 lore raw

PATCH 1/3 add support for arm926ejs-based pollux CPU

In reply to Brian Cavagnolo

Dear Brian Cavagnolo,

Quoted 4 lines · In message <[email protected]> you wrote:

Signed-off-by Brian Cavagnolo <[email protected]>
Signed-off-by Andrey Yurovsky <[email protected]>

Please be a bit more verbose - who is manufacturing this pollux thingy, who will be maintaining the code, etc.

Quoted 3 lines

 arch/arm/cpu/arm926ejs/pollux/Makefile    |   51 ++++++++
 arch/arm/cpu/arm926ejs/pollux/reset.S     |   49 ++++++++
 arch/arm/cpu/arm926ejs/pollux/timer.c     |  190 +++++++++++++++++++++++++++++

Why exactly do we need a new directory for it?

Quoted 3 lines

arch/arm/cpu/arm926ejs/pollux/reset.S new file +0 -0
@@ -0,0 +1,49 @@

...

arch/arm/cpu/arm926ejs/pollux/reset.S line 49

Quoted 13 lines

arch/arm/cpu/arm926ejs/pollux/reset.S new file +13 -0

+	.align	5
+.globl reset_cpu
+reset_cpu:
+	ldr	r1, rstctl1	/* get clkm1 reset ctl */
+	mov	r3, #0x0
+	strh	r3, [r1]	/* clear it */
+	mov	r3, #0x8
+	strh	r3, [r1]	/* force dsp+arm reset */
+_loop_forever:
+	b	_loop_forever
+
+rstctl1:
+	.word	0xfffece10

This seems identical to /arm/cpu/arm926ejs/omap/reset.S and arch/arm/cpu/arm926ejs/versatile/reset.S to me. Why do we need a 3rd copy of the same code?

Please factor out common code.

Quoted 5 lines

arch/arm/cpu/arm926ejs/pollux/timer.c new file +0 -0
new file mode 100644
index 0000000..fc6c699

...

arch/arm/cpu/arm926ejs/pollux/timer.c line 59

Quoted 12 lines

arch/arm/cpu/arm926ejs/pollux/timer.c new file +12 -0

+#ifndef CONFIG_SYS_TIMERBASE
+#error "Please define CONFIG_SYS_TIMERBASE to a suitable TIMERx_BASE"
+#endif
+#define TIMERBASE CONFIG_SYS_TIMERBASE
+
+#define TIMER_LOAD_VAL 0xffffffff
+
+static ulong inline read_timer(void)
+{
+	REG32(TIMERBASE + TMRCONTROL) |= (1<<LDCNT);
+	return REG32(TIMERBASE + TMRMATCH);
+}

We don;t allow register accesses through base address + offset any more. Please declare porper C structs and use proper I/O accessors. Please fix globally.

arch/arm/cpu/arm926ejs/pollux/timer.c line 133

Quoted 3 lines

arch/arm/cpu/arm926ejs/pollux/timer.c new file +3 -0

+	if (lastdec >= now) {		/* normal mode (non roll) */
+		/* normal mode */
+		timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */

LIne too long. Please fix globally.

arch/arm/cpu/arm926ejs/pollux/timer.c line 139

Quoted 6 lines

arch/arm/cpu/arm926ejs/pollux/timer.c new file +6 -0

+	} else {			/* we have overflow of the count down timer */
+		/* nts = ts + ld + (TLV - now)
+		 * ts=old stamp, ld=time that passed before passing through -1
+		 * (TLV-now) amount of time after passing though -1
+		 * nts = new "advancing time stamp"...it could also roll and cause problems.
+		 */

Incorrect multiline comment style. Please fix globally.

Quoted 11 lines

arch/arm/cpu/arm926ejs/pollux/timer.c new file +11 -0

+/* Clock and Power Control Registers */
+#define CLKPWR_BASE		0xC000F000
+#define CLKMODEREG		(CLKPWR_BASE + 0x000)
+#define PLLSETREG0		(CLKPWR_BASE + 0x004)
+#define PLLSETREG1		(CLKPWR_BASE + 0x008)
+#define GPIOWAKEUPENB		(CLKPWR_BASE + 0x040)
+#define RTCWAKEUPENB		(CLKPWR_BASE + 0x044)
+#define GPIOWAKEUPRISEENB	(CLKPWR_BASE + 0x048)
+#define GPIOWAKEUPFALLENB	(CLKPWR_BASE + 0x04C)
+#define GPIOPEND		(CLKPWR_BASE + 0x050)
+#define INTPENDSPAD		(CLKPWR_BASE + 0x058)

arch/arm/cpu/arm926ejs/pollux/timer.c

Quoted 10 lines

arch/arm/cpu/arm926ejs/pollux/timer.c new file +10 -0

+#define PWRRSTSTATUS		(CLKPWR_BASE + 0x05C)
+#define INTENB			(CLKPWR_BASE + 0x060)
+#define PWRMODE			(CLKPWR_BASE + 0x07C)
+#define PADSTRENGTHGPIOAL	(CLKPWR_BASE + 0x100)
+#define PADSTRENGTHGPIOAH	(CLKPWR_BASE + 0x104)
+#define PADSTRENGTHGPIOBL	(CLKPWR_BASE + 0x108)
+#define PADSTRENGTHGPIOBH	(CLKPWR_BASE + 0x10C)
+#define PADSTRENGTHGPIOCL	(CLKPWR_BASE + 0x110)
+#define PADSTRENGTHGPIOCH	(CLKPWR_BASE + 0x114)
+#define PADSTRENGTHBUS		(CLKPWR_BASE + 0x118)

NAK! See above - please declare proper C structs instead.

Quoted 5 lines

arch/arm/include/asm/arch-pollux/gpio.h new file +0 -0
new file mode 100644
index 0000000..f6ddd1b

...

arch/arm/include/asm/arch-pollux/gpio.h line 41

Quoted 13 lines

arch/arm/include/asm/arch-pollux/gpio.h new file +13 -0

+/* GPIO registers */
+#define GPIO_BASE		0xC000A000
+
+#define GPIOAOUT		(GPIO_BASE + 0x00)
+#define GPIOAOUTENB		(GPIO_BASE + 0x04)
+#define GPIOADETMODE0		(GPIO_BASE + 0x08)
+#define GPIOADETMODE1		(GPIO_BASE + 0x0C)
+#define GPIOAINTENB		(GPIO_BASE + 0x10)
+#define GPIOADET		(GPIO_BASE + 0x14)
+#define GPIOAPAD		(GPIO_BASE + 0x18)
+#define GPIOAPUENB		(GPIO_BASE + 0x1C)
+#define GPIOAALTFN0		(GPIO_BASE + 0x20)
+#define GPIOAALTFN1		(GPIO_BASE + 0x24)

NAK again.

Quoted 5 lines

arch/arm/include/asm/arch-pollux/reg.h new file +0 -0
new file mode 100644
index 0000000..fba6216

...

arch/arm/include/asm/arch-pollux/reg.h line 32

Quoted 4 lines

arch/arm/include/asm/arch-pollux/reg.h new file +4 -0

+/* register access and manipulation helper macros */
+#define REG8(addr)  (*((volatile unsigned char *)(addr)))
+#define REG16(addr) (*((volatile unsigned short *)(addr)))
+#define REG32(addr) (*((volatile unsigned long *)(addr)))

NAK again! Please use proper I/O accessors instead.

Quoted 6 lines

arch/arm/include/asm/arch-pollux/reg.h new file +6 -0

+/* UART register offsets */
+#define LCON			0x00
+#define UCON			0x02
+#define FCON			0x04
+#define MCON			0x06
+#define TRSTATUS		0x08

arch/arm/include/asm/arch-pollux/reg.h

Quoted 10 lines

arch/arm/include/asm/arch-pollux/reg.h new file +10 -0

+#define ESTATUS			0x0A
+#define FSTATUS			0x0C
+#define MSTATUS			0x0E
+#define THB			0x10
+#define RHB			0x12
+#define BRD			0x14
+#define TIMEOUTREG		0x16
+#define INTSTATUSREG		0x18
+#define UARTCLKENB		0x40
+#define UARTCLKGEN		0x44

Is this really such a new UART that we need new code for it?

Best regards,

Wolfgang Denk

Signature · 4 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
How much net work could a network work, if a network could net work?

Brian Cavagnolo

author

2010-06-21 12:25 UTC #7 lore raw

PATCH 1/3 add support for arm926ejs-based pollux CPU

Quoted 8 lines · Wolfgang Denk

Dear Brian Cavagnolo,
Quoted 4 lines · In message <[email protected]> you wrote:
Signed-off-by Brian Cavagnolo <[email protected]>
Signed-off-by Andrey Yurovsky <[email protected]>

Quoted 8 lines

Please be a bit more verbose - who is manufacturing this pollux thingy, who will be maintaining the code, etc.
Quoted 3 lines
?arch/arm/cpu/arm926ejs/pollux/Makefile ? ?| ? 51 ++++++++
?arch/arm/cpu/arm926ejs/pollux/reset.S ? ? | ? 49 ++++++++
?arch/arm/cpu/arm926ejs/pollux/timer.c ? ? | ?190 +++++++++++++++++++++++++++++
Why exactly do we need a new directory for it?

This appears to be the convention in the source tree and it seems straightforward and clean. Is there a different preferred way to add new CPUs?

I understand your other comments.

Thanks,
Brian

Quoted 150 lines

Quoted 3 lines
arch/arm/cpu/arm926ejs/pollux/reset.S new file +0 -0
@@ -0,0 +1,49 @@
...
arch/arm/cpu/arm926ejs/pollux/reset.S
Quoted 13 lines
+ ? ? .align ?5
+.globl reset_cpu
arch/arm/cpu/arm926ejs/pollux/reset.S new file +11 -0
+reset_cpu:
+ ? ? ldr ? ? r1, rstctl1 ? ? /* get clkm1 reset ctl */
+ ? ? mov ? ? r3, #0x0
+ ? ? strh ? ?r3, [r1] ? ? ? ?/* clear it */
+ ? ? mov ? ? r3, #0x8
+ ? ? strh ? ?r3, [r1] ? ? ? ?/* force dsp+arm reset */
+_loop_forever:
+ ? ? b ? ? ? _loop_forever
+
+rstctl1:
+ ? ? .word ? 0xfffece10
This seems identical to /arm/cpu/arm926ejs/omap/reset.S and arch/arm/cpu/arm926ejs/versatile/reset.S to me. ?Why do we need a 3rd copy of the same code?
Please factor out common code.
Quoted 5 lines
arch/arm/cpu/arm926ejs/pollux/timer.c new file +0 -0
new file mode 100644
index 0000000..fc6c699
...
arch/arm/cpu/arm926ejs/pollux/timer.c line 59
Quoted 12 lines
arch/arm/cpu/arm926ejs/pollux/timer.c new file +12 -0
+#ifndef CONFIG_SYS_TIMERBASE
+#error "Please define CONFIG_SYS_TIMERBASE to a suitable TIMERx_BASE"
+#endif
+#define TIMERBASE CONFIG_SYS_TIMERBASE
+
+#define TIMER_LOAD_VAL 0xffffffff
+
+static ulong inline read_timer(void)
+{
+ ? ? REG32(TIMERBASE + TMRCONTROL) |= (1<<LDCNT);
+ ? ? return REG32(TIMERBASE + TMRMATCH);
+}
We don;t allow register accesses through base address + offset any more. Please declare porper C structs and use proper I/O accessors. Please fix globally.
Quoted 3 lines
+ ? ? if (lastdec >= now) { ? ? ? ? ? /* normal mode (non roll) */
+ ? ? ? ? ? ? /* normal mode */
+ ? ? ? ? ? ? timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */
LIne too long. Please fix globally.
Quoted 6 lines
+ ? ? } else { ? ? ? ? ? ? ? ? ? ? ? ?/* we have overflow of the count down timer */
+ ? ? ? ? ? ? /* nts = ts + ld + (TLV - now)
+ ? ? ? ? ? ? ?* ts=old stamp, ld=time that passed before passing through -1
+ ? ? ? ? ? ? ?* (TLV-now) amount of time after passing though -1
+ ? ? ? ? ? ? ?* nts = new "advancing time stamp"...it could also roll and cause problems.
+ ? ? ? ? ? ? ?*/
Incorrect multiline comment style. Please fix globally.
Quoted 11 lines
arch/arm/cpu/arm926ejs/pollux/timer.c new file +11 -0
+/* Clock and Power Control Registers */
+#define CLKPWR_BASE ? ? ? ? ?0xC000F000
+#define CLKMODEREG ? ? ? ? ? (CLKPWR_BASE + 0x000)
+#define PLLSETREG0 ? ? ? ? ? (CLKPWR_BASE + 0x004)
+#define PLLSETREG1 ? ? ? ? ? (CLKPWR_BASE + 0x008)
+#define GPIOWAKEUPENB ? ? ? ? ? ? ? ?(CLKPWR_BASE + 0x040)
+#define RTCWAKEUPENB ? ? ? ? (CLKPWR_BASE + 0x044)
+#define GPIOWAKEUPRISEENB ? ?(CLKPWR_BASE + 0x048)
+#define GPIOWAKEUPFALLENB ? ?(CLKPWR_BASE + 0x04C)
+#define GPIOPEND ? ? ? ? ? ? (CLKPWR_BASE + 0x050)
+#define INTPENDSPAD ? ? ? ? ?(CLKPWR_BASE + 0x058)
arch/arm/cpu/arm926ejs/pollux/timer.c
Quoted 10 lines
arch/arm/cpu/arm926ejs/pollux/timer.c new file +10 -0
+#define PWRRSTSTATUS ? ? ? ? (CLKPWR_BASE + 0x05C)
+#define INTENB ? ? ? ? ? ? ? ? ? ? ? (CLKPWR_BASE + 0x060)
+#define PWRMODE ? ? ? ? ? ? ? ? ? ? ?(CLKPWR_BASE + 0x07C)
+#define PADSTRENGTHGPIOAL ? ?(CLKPWR_BASE + 0x100)
+#define PADSTRENGTHGPIOAH ? ?(CLKPWR_BASE + 0x104)
+#define PADSTRENGTHGPIOBL ? ?(CLKPWR_BASE + 0x108)
+#define PADSTRENGTHGPIOBH ? ?(CLKPWR_BASE + 0x10C)
+#define PADSTRENGTHGPIOCL ? ?(CLKPWR_BASE + 0x110)
+#define PADSTRENGTHGPIOCH ? ?(CLKPWR_BASE + 0x114)
+#define PADSTRENGTHBUS ? ? ? ? ? ? ? (CLKPWR_BASE + 0x118)
NAK! ?See above - please declare proper C structs instead.
Quoted 5 lines
arch/arm/include/asm/arch-pollux/gpio.h new file +0 -0
new file mode 100644
index 0000000..f6ddd1b
...
arch/arm/include/asm/arch-pollux/gpio.h
Quoted 13 lines
arch/arm/include/asm/arch-pollux/gpio.h new file +13 -0
+/* GPIO registers */
+#define GPIO_BASE ? ? ? ? ? ?0xC000A000
+
+#define GPIOAOUT ? ? ? ? ? ? (GPIO_BASE + 0x00)
+#define GPIOAOUTENB ? ? ? ? ?(GPIO_BASE + 0x04)
+#define GPIOADETMODE0 ? ? ? ? ? ? ? ?(GPIO_BASE + 0x08)
+#define GPIOADETMODE1 ? ? ? ? ? ? ? ?(GPIO_BASE + 0x0C)
+#define GPIOAINTENB ? ? ? ? ?(GPIO_BASE + 0x10)
+#define GPIOADET ? ? ? ? ? ? (GPIO_BASE + 0x14)
+#define GPIOAPAD ? ? ? ? ? ? (GPIO_BASE + 0x18)
+#define GPIOAPUENB ? ? ? ? ? (GPIO_BASE + 0x1C)
+#define GPIOAALTFN0 ? ? ? ? ?(GPIO_BASE + 0x20)
+#define GPIOAALTFN1 ? ? ? ? ?(GPIO_BASE + 0x24)
NAK again.
Quoted 5 lines
arch/arm/include/asm/arch-pollux/reg.h new file +0 -0
new file mode 100644
index 0000000..fba6216
...
arch/arm/include/asm/arch-pollux/reg.h line 32
Quoted 4 lines
arch/arm/include/asm/arch-pollux/reg.h new file +4 -0
+/* register access and manipulation helper macros */
+#define REG8(addr) ?(*((volatile unsigned char *)(addr)))
+#define REG16(addr) (*((volatile unsigned short *)(addr)))
+#define REG32(addr) (*((volatile unsigned long *)(addr)))
NAK again! Please use proper I/O accessors instead.
Quoted 6 lines
arch/arm/include/asm/arch-pollux/reg.h new file +6 -0
+/* UART register offsets */
+#define LCON ? ? ? ? ? ? ? ? 0x00
+#define UCON ? ? ? ? ? ? ? ? 0x02
+#define FCON ? ? ? ? ? ? ? ? 0x04
+#define MCON ? ? ? ? ? ? ? ? 0x06
+#define TRSTATUS ? ? ? ? ? ? 0x08
arch/arm/include/asm/arch-pollux/reg.h
Quoted 10 lines
arch/arm/include/asm/arch-pollux/reg.h new file +10 -0
+#define ESTATUS ? ? ? ? ? ? ? ? ? ? ?0x0A
+#define FSTATUS ? ? ? ? ? ? ? ? ? ? ?0x0C
+#define MSTATUS ? ? ? ? ? ? ? ? ? ? ?0x0E
+#define THB ? ? ? ? ? ? ? ? ?0x10
+#define RHB ? ? ? ? ? ? ? ? ?0x12
+#define BRD ? ? ? ? ? ? ? ? ?0x14
+#define TIMEOUTREG ? ? ? ? ? 0x16
+#define INTSTATUSREG ? ? ? ? 0x18
+#define UARTCLKENB ? ? ? ? ? 0x40
+#define UARTCLKGEN ? ? ? ? ? 0x44
Is this really such a new UART that we need new code for it?
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, ? ? MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de How much net work could a network work, if a network could net work?