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i.MX35: return IPU clock's value for mx3fb

PATCH New Eric Bénard 1 participant 1 message Jun 8, 2010

Subsystems (3)
Arm (32-bit) Arm sub-architectures Arm i.MX and Layerscape
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Eric Bénard

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PATCH 1/1 i.MX35: return IPU clock's value for mx3fb

without this patch, ipu_clk's value is 0 thus preventing mx3fb from calculating the right divisor for pixel clock generator.

Signed-off-by Eric B?nard <[email protected]>
---
 arch/arm/mach-mx3/clock-imx35.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-mx3/clock-imx35.c +1 -1
index 9f3e943..28be011 100644
@@ -359,7 +359,7 @@ DEFINE_CLOCK(i2c1_clk,   0, CCM_CGR1, 10, get_rate_ipg_per, NULL);
 DEFINE_CLOCK(i2c2_clk,   1, CCM_CGR1, 12, get_rate_ipg_per, NULL);
 DEFINE_CLOCK(i2c3_clk,   2, CCM_CGR1, 14, get_rate_ipg_per, NULL);
 DEFINE_CLOCK(iomuxc_clk, 0, CCM_CGR1, 16, NULL, NULL);
-DEFINE_CLOCK(ipu_clk,    0, CCM_CGR1, 18, NULL, NULL);
+DEFINE_CLOCK(ipu_clk,    0, CCM_CGR1, 18, get_rate_ahb, NULL);
 DEFINE_CLOCK(kpp_clk,    0, CCM_CGR1, 20, get_rate_ipg, NULL);
 DEFINE_CLOCK(mlb_clk,    0, CCM_CGR1, 22, get_rate_ahb, NULL);
 DEFINE_CLOCK(mshc_clk,   0, CCM_CGR1, 24, get_rate_mshc, NULL);
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