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DSPBRIDGE: fix a wrong clk index for gpt8

PATCH Applied Omar Ramirez Luna 1 participant 4 messages Jun 10, 2010 – Jun 14, 2010

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#0 lore raw

PATCH 1/2 DSPBRIDGE: fix a wrong clk index for gpt8

Mismatch between index for gpt clocks will result in writting out of bounds into dsp clock timer array when requesting gpt8, for the other gpt the bogus code is being masked as it falls within the array's range.

---
 drivers/dsp/bridge/core/dsp-clock.c |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)
drivers/dsp/bridge/core/dsp-clock.c +3 -2
index 4613de9..dba0535 100644
@@ -212,7 +212,8 @@ int dsp_clk_enable(IN enum dsp_clk_id clk_id)
 		clk_enable(iva2_clk);
 		break;
 	case GPT_CLK:
-		timer[clk_id] = omap_dm_timer_request_specific(DMT_ID(clk_id));
+		timer[clk_id - 1] =
+				omap_dm_timer_request_specific(DMT_ID(clk_id));
 		break;
 	case MCBSP_CLK:
 		mcbsp_clk_prepare(true, clk_id);
@@ -287,7 +288,7 @@ int dsp_clk_disable(IN enum dsp_clk_id clk_id)
 		clk_disable(iva2_clk);
 		break;
 	case GPT_CLK:
-		omap_dm_timer_free(timer[clk_id]);
+		omap_dm_timer_free(timer[clk_id - 1]);
 		break;
 	case MCBSP_CLK:
 		mcbsp_clk_prepare(false, clk_id);
Signature · 1 line
1.7.1
#1 lore raw

PATCH 2/2 DSPBRIDGE: reorganize gpt8 overflow handling

New function to encapsulate previous code to configure gpt overflow, this prevents accessing dmtimer framework outside dsp-clock interface or exposing clock handles to other bridge modules.

Besides that: duplicated and unused defines were removed, conditional test for cnt was replaced for a time after jiffes macro.

---
 arch/arm/plat-omap/include/dspbridge/clk.h |    2 +
 drivers/dsp/bridge/core/dsp-clock.c        |   38 ++++++++++++++++++
 drivers/dsp/bridge/core/ue_deh.c           |   59 ++-------------------------
 3 files changed, 45 insertions(+), 54 deletions(-)
arch/arm/plat-omap/include/dspbridge/clk.h +2 -0
index 0814e92..61474bc 100644
@@ -62,6 +62,8 @@ extern void dsp_clk_exit(void);
  */
 extern void dsp_clk_init(void);
 
+void dsp_gpt_wait_overflow(short int clk_id, unsigned int load);
+
 /*
  *  ======== dsp_clk_enable ========
  *  Purpose:
drivers/dsp/bridge/core/dsp-clock.c +38 -0
index dba0535..dde63bd 100644
@@ -192,6 +192,44 @@ static void mcbsp_clk_prepare(bool flag, u8 id)
 	}
 }
 
+/**
+ * dsp_gpt_wait_overflow - set gpt overflow and wait for fixed timeout
+ * @clk_id:      GP Timer clock id.
+ * @load:        Overflow value.
+ *
+ * Sets an overflow interrupt for the desired GPT waiting for a timeout
+ * of 5 msecs for the interrupt to occur.
+ */
+void dsp_gpt_wait_overflow(short int clk_id, unsigned int load)
+{
+	struct omap_dm_timer *gpt = timer[clk_id - 1];
+	unsigned long timeout;
+
+	if (!gpt)
+		return;
+
+	/* Enable overflow interrupt */
+	omap_dm_timer_set_int_enable(gpt, OMAP_TIMER_INT_OVERFLOW);
+
+	/*
+	 * Set counter value to overflow counter after
+	 * one tick and start timer.
+	 */
+	omap_dm_timer_set_load_start(gpt, 0, load);
+
+	/* Wait 80us for timer to overflow */
+	udelay(80);
+
+	timeout = msecs_to_jiffies(5);
+	/* Check interrupt status and wait for interrupt */
+	while (!(omap_dm_timer_read_status(gpt) & OMAP_TIMER_INT_OVERFLOW)) {
+		if (time_is_after_jiffies(timeout)) {
+			pr_err("%s: GPTimer interrupt failed\n", __func__);
+			break;
+		}
+	}
+}
+
 /*
  *  ======== dsp_clk_enable ========
  *  Purpose:
drivers/dsp/bridge/core/ue_deh.c +5 -54

107 lines not on this page · raw message

Signature · 1 line
1.7.1
author Applied
#2 lore raw

RE: [PATCH 2/2] DSPBRIDGE: reorganize gpt8 overflow handling

Quoted 9 lines

From: Ramirez Luna, Omar

New function to encapsulate previous code to configure gpt overflow, this prevents accessing dmtimer framework outside dsp-clock interface or exposing clock handles to other bridge modules.

Besides that: duplicated and unused defines were removed, conditional test for cnt was replaced for a time after jiffes macro.

Quoted 8 lines

---

arch/arm/plat-omap/include/dspbridge/clk.h |    2 +
drivers/dsp/bridge/core/dsp-clock.c        |   38 ++++++++++++++++++
drivers/dsp/bridge/core/ue_deh.c           |   59 ++-------------------------
3 files changed, 45 insertions(+), 54 deletions(-)

Pushed to dspbridge.

- omar

author Applied
#3 lore raw
In reply to Omar Ramirez Luna
Quoted 7 lines

From: Ramirez Luna, Omar

Mismatch between index for gpt clocks will result in writting out of bounds into dsp clock timer array when requesting gpt8, for the other gpt the bogus code is being masked as it falls within the array's range.

Quoted 6 lines

---
drivers/dsp/bridge/core/dsp-clock.c | 5 +++--

1 files changed, 3 insertions(+), 2 deletions(-)

Pushed to dspbridge.

- omar